test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*'  -o - %s 2> %t | FileCheck -check-prefix=GCN  %s
   3 # RUN: FileCheck -check-prefix=ERR %s < %t
   4
   5 # ERR-NOT: remark:
   6 # ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s64), %2:sgpr(s64), %3:sgpr(s64) = G_UNMERGE_VALUES %0:sgpr(s192) (in function: test_unmerge_values_s_s64_s_s64_s64_s_s192)
   7 # ERR-NOT: remark:
   8
   9 ---
  10 name: test_unmerge_values_v_s32_v_s32_v_s64
  11 legalized:       true
  12 regBankSelected: true
  13 tracksRegLiveness: true
  14
  15 body: |
  16   bb.0:
  17     liveins: $vgpr0_vgpr1
  18
  19     ; GCN-LABEL: name: test_unmerge_values_v_s32_v_s32_v_s64
  20     ; GCN: liveins: $vgpr0_vgpr1
  21     ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
  22     ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
  23     ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
  24     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
  25     %0:vgpr(s64) = COPY $vgpr0_vgpr1
  26     %1:vgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
  27     S_ENDPGM 0, implicit %1, implicit %2
  28 ...
  29
  30 ---
  31 name: test_unmerge_values_s_s32_s_s32_s_s64
  32 legalized:       true
  33 regBankSelected: true
  34 tracksRegLiveness: true
  35
  36 body: |
  37   bb.0:
  38     liveins: $sgpr0_sgpr1
  39
  40     ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s_s64
  41     ; GCN: liveins: $sgpr0_sgpr1
  42     ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  43     ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  44     ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  45     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
  46     %0:sgpr(s64) = COPY $sgpr0_sgpr1
  47     %1:sgpr(s32), %2:sgpr(s32) = G_UNMERGE_VALUES %0
  48     S_ENDPGM 0, implicit %1, implicit %2
  49 ...
  50
  51 ---
  52 name: test_unmerge_values_v_s32_s_s32_s_s64
  53 legalized:       true
  54 regBankSelected: true
  55 tracksRegLiveness: true
  56
  57 body: |
  58   bb.0:
  59     liveins: $sgpr0_sgpr1
  60
  61     ; GCN-LABEL: name: test_unmerge_values_v_s32_s_s32_s_s64
  62     ; GCN: liveins: $sgpr0_sgpr1
  63     ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  64     ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
  65     ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  66     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
  67     %0:sgpr(s64) = COPY $sgpr0_sgpr1
  68     %1:vgpr(s32), %2:sgpr(s32) = G_UNMERGE_VALUES %0
  69     S_ENDPGM 0, implicit %1, implicit %2
  70 ...
  71
  72 ---
  73 name: test_unmerge_values_s_s32_v_s32_s_s64
  74 legalized:       true
  75 regBankSelected: true
  76 tracksRegLiveness: true
  77
  78 body: |
  79   bb.0:
  80     liveins: $sgpr0_sgpr1
  81
  82     ; GCN-LABEL: name: test_unmerge_values_s_s32_v_s32_s_s64
  83     ; GCN: liveins: $sgpr0_sgpr1
  84     ; GCN: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  85     ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  86     ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
  87     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
  88     %0:sgpr(s64) = COPY $sgpr0_sgpr1
  89     %1:sgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
  90     S_ENDPGM 0, implicit %1, implicit %2
  91 ...
  92
  93 ---
  94 name: test_unmerge_values_s_s32_v_s32_s_s64_undef_src
  95 legalized:       true
  96 regBankSelected: true
  97 tracksRegLiveness: true
  98
  99 body: |
 100   bb.0:
 101
 102     ; GCN-LABEL: name: test_unmerge_values_s_s32_v_s32_s_s64_undef_src
 103     ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY undef %2.sub0:sreg_64_xexec
 104     ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY undef %2.sub1:sreg_64_xexec
 105     ; GCN: S_ENDPGM 0, implicit [[COPY]], implicit [[COPY1]]
 106     %1:sgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES undef %0:sgpr(s64)
 107     S_ENDPGM 0, implicit %1, implicit %2
 108 ...
 109
 110 ---
 111 name: test_unmerge_values_s_s32_s_s32_s32_s_s96
 112 legalized:       true
 113 regBankSelected: true
 114 tracksRegLiveness: true
 115
 116 body: |
 117   bb.0:
 118     liveins: $sgpr0_sgpr1_sgpr2
 119
 120     ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s32_s_s96
 121     ; GCN: liveins: $sgpr0_sgpr1_sgpr2
 122     ; GCN: [[COPY:%[0-9]+]]:sreg_96 = COPY $sgpr0_sgpr1_sgpr2
 123     ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 124     ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 125     ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub2
 126     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]]
 127     %0:sgpr(s96) = COPY $sgpr0_sgpr1_sgpr2
 128     %1:sgpr(s32), %2:sgpr(s32), %3:sgpr(s32) = G_UNMERGE_VALUES %0
 129     S_ENDPGM 0, implicit %1, implicit %2, implicit %3
 130 ...
 131
 132 ---
 133 name: test_unmerge_values_s_s32_s_s32_s32_s_s32_s_s128
 134 legalized:       true
 135 regBankSelected: true
 136 tracksRegLiveness: true
 137
 138 body: |
 139   bb.0:
 140     liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 141
 142     ; GCN-LABEL: name: test_unmerge_values_s_s32_s_s32_s32_s_s32_s_s128
 143     ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 144     ; GCN: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
 145     ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
 146     ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
 147     ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub2
 148     ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub3
 149     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
 150     %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
 151     %1:sgpr(s32), %2:sgpr(s32), %3:sgpr(s32), %4:sgpr(s32) = G_UNMERGE_VALUES %0
 152     S_ENDPGM 0, implicit %1, implicit %2, implicit %3, implicit %4
 153 ...
 154
 155 ---
 156 name: test_unmerge_values_s_s64_s_s64_s_s128
 157 legalized:       true
 158 regBankSelected: true
 159 tracksRegLiveness: true
 160
 161 body: |
 162   bb.0:
 163     liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 164
 165     ; GCN-LABEL: name: test_unmerge_values_s_s64_s_s64_s_s128
 166     ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 167     ; GCN: [[COPY:%[0-9]+]]:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
 168     ; GCN: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]].sub0_sub1
 169     ; GCN: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]].sub2_sub3
 170     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
 171     %0:sgpr(s128) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
 172     %1:sgpr(s64), %2:sgpr(s64) = G_UNMERGE_VALUES %0
 173     S_ENDPGM 0, implicit %1, implicit %2
 174 ...
 175
 176 ---
 177 name: test_unmerge_values_s_s64_s_s64_s64_s_s192
 178 legalized:       true
 179 regBankSelected: true
 180 tracksRegLiveness: true
 181
 182 body: |
 183   bb.0:
 184     liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 185
 186     ; GCN-LABEL: name: test_unmerge_values_s_s64_s_s64_s64_s_s192
 187     ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 188     ; GCN: [[DEF:%[0-9]+]]:sgpr(s192) = G_IMPLICIT_DEF
 189     ; GCN: [[UV:%[0-9]+]]:sgpr(s64), [[UV1:%[0-9]+]]:sgpr(s64), [[UV2:%[0-9]+]]:sgpr(s64) = G_UNMERGE_VALUES [[DEF]](s192)
 190     ; GCN: S_ENDPGM 0, implicit [[UV]](s64), implicit [[UV1]](s64), implicit [[UV2]](s64)
 191     %0:sgpr(s192) = G_IMPLICIT_DEF
 192     %1:sgpr(s64), %2:sgpr(s64), %3:sgpr(s64) = G_UNMERGE_VALUES %0
 193     S_ENDPGM 0, implicit %1, implicit %2, implicit %3
 194 ...
 195
 196 ---
 197 name: test_unmerge_values_rc_set_def_v_s32_v_s32_v_s64
 198 legalized:       true
 199 regBankSelected: true
 200 tracksRegLiveness: true
 201
 202 body: |
 203   bb.0:
 204     liveins: $vgpr0_vgpr1
 205
 206     ; GCN-LABEL: name: test_unmerge_values_rc_set_def_v_s32_v_s32_v_s64
 207     ; GCN: liveins: $vgpr0_vgpr1
 208     ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 209     ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 210     ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 211     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
 212     %0:vgpr(s64) = COPY $vgpr0_vgpr1
 213     %1:vgpr_32(s32), %2:vgpr_32(s32) = G_UNMERGE_VALUES %0
 214     S_ENDPGM 0, implicit %1, implicit %2
 215 ...
 216
 217 ---
 218 name: test_unmerge_values_rc_set_use_v_s32_v_s32_v_s64
 219 legalized:       true
 220 regBankSelected: true
 221 tracksRegLiveness: true
 222
 223 body: |
 224   bb.0:
 225     liveins: $vgpr0_vgpr1
 226
 227     ; GCN-LABEL: name: test_unmerge_values_rc_set_use_v_s32_v_s32_v_s64
 228     ; GCN: liveins: $vgpr0_vgpr1
 229     ; GCN: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 230     ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 231     ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 232     ; GCN: S_ENDPGM 0, implicit [[COPY1]], implicit [[COPY2]]
 233     %0:vreg_64(s64) = COPY $vgpr0_vgpr1
 234     %1:vgpr(s32), %2:vgpr(s32) = G_UNMERGE_VALUES %0
 235     S_ENDPGM 0, implicit %1, implicit %2
 236 ...
 237
 238 ---
 239 name: test_unmerge_values_s_s256_s_s1024
 240 legalized:       true
 241 regBankSelected: true
 242 tracksRegLiveness: true
 243
 244 body: |
 245   bb.0:
 246     liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 247
 248     ; GCN-LABEL: name: test_unmerge_values_s_s256_s_s1024
 249     ; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
 250     ; GCN: [[DEF:%[0-9]+]]:sreg_1024 = IMPLICIT_DEF
 251     ; GCN: [[COPY:%[0-9]+]]:sreg_256 = COPY [[DEF]].sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7
 252     ; GCN: [[COPY1:%[0-9]+]]:sreg_256 = COPY [[DEF]].sub8_sub9_sub10_sub11_sub12_sub13_sub14_sub15
 253     ; GCN: [[COPY2:%[0-9]+]]:sreg_256 = COPY [[DEF]].sub16_sub17_sub18_sub19_sub20_sub21_sub22_sub23
 254     ; GCN: [[COPY3:%[0-9]+]]:sreg_256 = COPY [[DEF]].sub24_sub25_sub26_sub27_sub28_sub29_sub30_sub31
 255     ; GCN: S_ENDPGM 0, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]]
 256     %0:sgpr(s1024) = G_IMPLICIT_DEF
 257     %1:sgpr(s256), %2:sgpr(s256), %3:sgpr(s256), %4:sgpr(s256) = G_UNMERGE_VALUES %0
 258     S_ENDPGM 0, implicit %1, implicit %2, implicit %3, implicit %4
 259 ...