1 ; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-annotate-kernel-features %s | FileCheck -check-prefix=HSA %s
3 declare i32 @llvm.amdgcn.workgroup.id.x() #0
4 declare i32 @llvm.amdgcn.workgroup.id.y() #0
5 declare i32 @llvm.amdgcn.workgroup.id.z() #0
7 declare i32 @llvm.amdgcn.workitem.id.x() #0
8 declare i32 @llvm.amdgcn.workitem.id.y() #0
9 declare i32 @llvm.amdgcn.workitem.id.z() #0
11 declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() #0
12 declare i8 addrspace(4)* @llvm.amdgcn.queue.ptr() #0
13 declare i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #0
14 declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr() #0
15 declare i64 @llvm.amdgcn.dispatch.id() #0
17 ; HSA: define void @use_workitem_id_x() #1 {
18 define void @use_workitem_id_x() #1 {
19 %val = call i32 @llvm.amdgcn.workitem.id.x()
20 store volatile i32 %val, i32 addrspace(1)* undef
24 ; HSA: define void @use_workitem_id_y() #2 {
25 define void @use_workitem_id_y() #1 {
26 %val = call i32 @llvm.amdgcn.workitem.id.y()
27 store volatile i32 %val, i32 addrspace(1)* undef
31 ; HSA: define void @use_workitem_id_z() #3 {
32 define void @use_workitem_id_z() #1 {
33 %val = call i32 @llvm.amdgcn.workitem.id.z()
34 store volatile i32 %val, i32 addrspace(1)* undef
38 ; HSA: define void @use_workgroup_id_x() #4 {
39 define void @use_workgroup_id_x() #1 {
40 %val = call i32 @llvm.amdgcn.workgroup.id.x()
41 store volatile i32 %val, i32 addrspace(1)* undef
45 ; HSA: define void @use_workgroup_id_y() #5 {
46 define void @use_workgroup_id_y() #1 {
47 %val = call i32 @llvm.amdgcn.workgroup.id.y()
48 store volatile i32 %val, i32 addrspace(1)* undef
52 ; HSA: define void @use_workgroup_id_z() #6 {
53 define void @use_workgroup_id_z() #1 {
54 %val = call i32 @llvm.amdgcn.workgroup.id.z()
55 store volatile i32 %val, i32 addrspace(1)* undef
59 ; HSA: define void @use_dispatch_ptr() #7 {
60 define void @use_dispatch_ptr() #1 {
61 %dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
62 store volatile i8 addrspace(4)* %dispatch.ptr, i8 addrspace(4)* addrspace(1)* undef
66 ; HSA: define void @use_queue_ptr() #8 {
67 define void @use_queue_ptr() #1 {
68 %queue.ptr = call i8 addrspace(4)* @llvm.amdgcn.queue.ptr()
69 store volatile i8 addrspace(4)* %queue.ptr, i8 addrspace(4)* addrspace(1)* undef
73 ; HSA: define void @use_dispatch_id() #9 {
74 define void @use_dispatch_id() #1 {
75 %val = call i64 @llvm.amdgcn.dispatch.id()
76 store volatile i64 %val, i64 addrspace(1)* undef
80 ; HSA: define void @use_workgroup_id_y_workgroup_id_z() #10 {
81 define void @use_workgroup_id_y_workgroup_id_z() #1 {
82 %val0 = call i32 @llvm.amdgcn.workgroup.id.y()
83 %val1 = call i32 @llvm.amdgcn.workgroup.id.z()
84 store volatile i32 %val0, i32 addrspace(1)* undef
85 store volatile i32 %val1, i32 addrspace(1)* undef
89 ; HSA: define void @func_indirect_use_workitem_id_x() #1 {
90 define void @func_indirect_use_workitem_id_x() #1 {
91 call void @use_workitem_id_x()
95 ; HSA: define void @kernel_indirect_use_workitem_id_x() #1 {
96 define void @kernel_indirect_use_workitem_id_x() #1 {
97 call void @use_workitem_id_x()
101 ; HSA: define void @func_indirect_use_workitem_id_y() #2 {
102 define void @func_indirect_use_workitem_id_y() #1 {
103 call void @use_workitem_id_y()
107 ; HSA: define void @func_indirect_use_workitem_id_z() #3 {
108 define void @func_indirect_use_workitem_id_z() #1 {
109 call void @use_workitem_id_z()
113 ; HSA: define void @func_indirect_use_workgroup_id_x() #4 {
114 define void @func_indirect_use_workgroup_id_x() #1 {
115 call void @use_workgroup_id_x()
119 ; HSA: define void @kernel_indirect_use_workgroup_id_x() #4 {
120 define void @kernel_indirect_use_workgroup_id_x() #1 {
121 call void @use_workgroup_id_x()
125 ; HSA: define void @func_indirect_use_workgroup_id_y() #5 {
126 define void @func_indirect_use_workgroup_id_y() #1 {
127 call void @use_workgroup_id_y()
131 ; HSA: define void @func_indirect_use_workgroup_id_z() #6 {
132 define void @func_indirect_use_workgroup_id_z() #1 {
133 call void @use_workgroup_id_z()
137 ; HSA: define void @func_indirect_indirect_use_workgroup_id_y() #5 {
138 define void @func_indirect_indirect_use_workgroup_id_y() #1 {
139 call void @func_indirect_use_workgroup_id_y()
143 ; HSA: define void @indirect_x2_use_workgroup_id_y() #5 {
144 define void @indirect_x2_use_workgroup_id_y() #1 {
145 call void @func_indirect_indirect_use_workgroup_id_y()
149 ; HSA: define void @func_indirect_use_dispatch_ptr() #7 {
150 define void @func_indirect_use_dispatch_ptr() #1 {
151 call void @use_dispatch_ptr()
155 ; HSA: define void @func_indirect_use_queue_ptr() #8 {
156 define void @func_indirect_use_queue_ptr() #1 {
157 call void @use_queue_ptr()
161 ; HSA: define void @func_indirect_use_dispatch_id() #9 {
162 define void @func_indirect_use_dispatch_id() #1 {
163 call void @use_dispatch_id()
167 ; HSA: define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #11 {
168 define void @func_indirect_use_workgroup_id_y_workgroup_id_z() #1 {
169 call void @func_indirect_use_workgroup_id_y_workgroup_id_z()
173 ; HSA: define void @recursive_use_workitem_id_y() #2 {
174 define void @recursive_use_workitem_id_y() #1 {
175 %val = call i32 @llvm.amdgcn.workitem.id.y()
176 store volatile i32 %val, i32 addrspace(1)* undef
177 call void @recursive_use_workitem_id_y()
181 ; HSA: define void @call_recursive_use_workitem_id_y() #2 {
182 define void @call_recursive_use_workitem_id_y() #1 {
183 call void @recursive_use_workitem_id_y()
187 ; HSA: define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #8 {
188 define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 {
189 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
190 store volatile i32 0, i32 addrspace(4)* %stof
194 ; HSA: define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #12 {
195 define void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* %ptr) #2 {
196 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
197 store volatile i32 0, i32 addrspace(4)* %stof
201 ; HSA: define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #13 {
202 define void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* %ptr) #2 {
203 %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)*
204 store volatile i32 0, i32 addrspace(4)* %stof
205 call void @func_indirect_use_queue_ptr()
209 ; HSA: define void @indirect_use_group_to_flat_addrspacecast() #8 {
210 define void @indirect_use_group_to_flat_addrspacecast() #1 {
211 call void @use_group_to_flat_addrspacecast(i32 addrspace(3)* null)
215 ; HSA: define void @indirect_use_group_to_flat_addrspacecast_gfx9() #11 {
216 define void @indirect_use_group_to_flat_addrspacecast_gfx9() #1 {
217 call void @use_group_to_flat_addrspacecast_gfx9(i32 addrspace(3)* null)
221 ; HSA: define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #8 {
222 define void @indirect_use_group_to_flat_addrspacecast_queue_ptr_gfx9() #1 {
223 call void @use_group_to_flat_addrspacecast_queue_ptr_gfx9(i32 addrspace(3)* null)
227 ; HSA: define void @use_kernarg_segment_ptr() #14 {
228 define void @use_kernarg_segment_ptr() #1 {
229 %kernarg.segment.ptr = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
230 store volatile i8 addrspace(4)* %kernarg.segment.ptr, i8 addrspace(4)* addrspace(1)* undef
234 ; HSA: define void @func_indirect_use_kernarg_segment_ptr() #14 {
235 define void @func_indirect_use_kernarg_segment_ptr() #1 {
236 call void @use_kernarg_segment_ptr()
240 ; HSA: define amdgpu_kernel void @kern_use_implicitarg_ptr() #15 {
241 define amdgpu_kernel void @kern_use_implicitarg_ptr() #1 {
242 %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
243 store volatile i8 addrspace(4)* %implicitarg.ptr, i8 addrspace(4)* addrspace(1)* undef
247 ; HSA: define void @use_implicitarg_ptr() #16 {
248 define void @use_implicitarg_ptr() #1 {
249 %implicitarg.ptr = call i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()
250 store volatile i8 addrspace(4)* %implicitarg.ptr, i8 addrspace(4)* addrspace(1)* undef
254 ; HSA: define void @func_indirect_use_implicitarg_ptr() #16 {
255 define void @func_indirect_use_implicitarg_ptr() #1 {
256 call void @use_implicitarg_ptr()
260 ; HSA: declare void @external.func() #17
261 declare void @external.func() #3
263 ; HSA: define internal void @defined.func() #17 {
264 define internal void @defined.func() #3 {
268 ; HSA: define void @func_call_external() #17 {
269 define void @func_call_external() #3 {
270 call void @external.func()
274 ; HSA: define void @func_call_defined() #17 {
275 define void @func_call_defined() #3 {
276 call void @defined.func()
280 ; HSA: define void @func_call_asm() #18 {
281 define void @func_call_asm() #3 {
282 call void asm sideeffect "", ""() #3
286 ; HSA: define amdgpu_kernel void @kern_call_external() #19 {
287 define amdgpu_kernel void @kern_call_external() #3 {
288 call void @external.func()
292 ; HSA: define amdgpu_kernel void @func_kern_defined() #19 {
293 define amdgpu_kernel void @func_kern_defined() #3 {
294 call void @defined.func()
298 attributes #0 = { nounwind readnone speculatable }
299 attributes #1 = { nounwind "target-cpu"="fiji" }
300 attributes #2 = { nounwind "target-cpu"="gfx900" }
301 attributes #3 = { nounwind }
303 ; HSA: attributes #0 = { nounwind readnone speculatable }
304 ; HSA: attributes #1 = { nounwind "amdgpu-work-item-id-x" "target-cpu"="fiji" "uniform-work-group-size"="false" }
305 ; HSA: attributes #2 = { nounwind "amdgpu-work-item-id-y" "target-cpu"="fiji" "uniform-work-group-size"="false" }
306 ; HSA: attributes #3 = { nounwind "amdgpu-work-item-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
307 ; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-x" "target-cpu"="fiji" "uniform-work-group-size"="false" }
308 ; HSA: attributes #5 = { nounwind "amdgpu-work-group-id-y" "target-cpu"="fiji" "uniform-work-group-size"="false" }
309 ; HSA: attributes #6 = { nounwind "amdgpu-work-group-id-z" "target-cpu"="fiji" "uniform-work-group-size"="false" }
310 ; HSA: attributes #7 = { nounwind "amdgpu-dispatch-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }
311 ; HSA: attributes #8 = { nounwind "amdgpu-queue-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }
312 ; HSA: attributes #9 = { nounwind "amdgpu-dispatch-id" "target-cpu"="fiji" "uniform-work-group-size"="false" }
313 ; HSA: attributes #10 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "target-cpu"="fiji" }
314 ; HSA: attributes #11 = { nounwind "target-cpu"="fiji" "uniform-work-group-size"="false" }
315 ; HSA: attributes #12 = { nounwind "target-cpu"="gfx900" "uniform-work-group-size"="false" }
316 ; HSA: attributes #13 = { nounwind "amdgpu-queue-ptr" "target-cpu"="gfx900" "uniform-work-group-size"="false" }
317 ; HSA: attributes #14 = { nounwind "amdgpu-kernarg-segment-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }
318 ; HSA: attributes #15 = { nounwind "amdgpu-implicitarg-ptr" "target-cpu"="fiji" }
319 ; HSA: attributes #16 = { nounwind "amdgpu-implicitarg-ptr" "target-cpu"="fiji" "uniform-work-group-size"="false" }
320 ; HSA: attributes #17 = { nounwind "uniform-work-group-size"="false" }
321 ; HSA: attributes #18 = { nounwind }
322 ; HSA: attributes #19 = { nounwind "amdgpu-flat-scratch" "uniform-work-group-size"="false" }