1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
4 declare i32 @llvm.amdgcn.workitem.id.x() #1
5 declare double @llvm.fabs.f64(double) #1
7 ; FUNC-LABEL: @fp_to_sint_f64_i32
8 ; SI: v_cvt_i32_f64_e32
9 define amdgpu_kernel void @fp_to_sint_f64_i32(i32 addrspace(1)* %out, double %in) {
10 %result = fptosi double %in to i32
11 store i32 %result, i32 addrspace(1)* %out
15 ; FUNC-LABEL: @fp_to_sint_v2f64_v2i32
16 ; SI: v_cvt_i32_f64_e32
17 ; SI: v_cvt_i32_f64_e32
18 define amdgpu_kernel void @fp_to_sint_v2f64_v2i32(<2 x i32> addrspace(1)* %out, <2 x double> %in) {
19 %result = fptosi <2 x double> %in to <2 x i32>
20 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
24 ; FUNC-LABEL: @fp_to_sint_v4f64_v4i32
25 ; SI: v_cvt_i32_f64_e32
26 ; SI: v_cvt_i32_f64_e32
27 ; SI: v_cvt_i32_f64_e32
28 ; SI: v_cvt_i32_f64_e32
29 define amdgpu_kernel void @fp_to_sint_v4f64_v4i32(<4 x i32> addrspace(1)* %out, <4 x double> %in) {
30 %result = fptosi <4 x double> %in to <4 x i32>
31 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
35 ; FUNC-LABEL: @fp_to_sint_i64_f64
36 ; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
37 ; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
38 ; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
39 ; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
41 ; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}}
42 ; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
44 ; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
46 ; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]{{\]}}, [[TRUNC]]
47 ; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
48 ; CI-DAG: v_cvt_i32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
49 ; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
50 define amdgpu_kernel void @fp_to_sint_i64_f64(i64 addrspace(1)* %out, double addrspace(1)* %in) {
51 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
52 %gep = getelementptr double, double addrspace(1)* %in, i32 %tid
53 %val = load double, double addrspace(1)* %gep, align 8
54 %cast = fptosi double %val to i64
55 store i64 %cast, i64 addrspace(1)* %out, align 8
59 ; FUNC-LABEL: {{^}}fp_to_sint_f64_to_i1:
60 ; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, -1.0, s{{\[[0-9]+:[0-9]+\]}}
61 define amdgpu_kernel void @fp_to_sint_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
62 %conv = fptosi double %in to i1
63 store i1 %conv, i1 addrspace(1)* %out
67 ; FUNC-LABEL: {{^}}fp_to_sint_fabs_f64_to_i1:
68 ; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, -1.0, |s{{\[[0-9]+:[0-9]+\]}}|
69 define amdgpu_kernel void @fp_to_sint_fabs_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
70 %in.fabs = call double @llvm.fabs.f64(double %in)
71 %conv = fptosi double %in.fabs to i1
72 store i1 %conv, i1 addrspace(1)* %out
76 attributes #0 = { nounwind }
77 attributes #1 = { nounwind readnone }