1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=kaveri -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s
2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s
4 ; Test that non-entry function frame indices are expanded properly to
5 ; give an index relative to the scratch wave offset register
7 ; Materialize into a mov. Make sure there isn't an unnecessary copy.
8 ; GCN-LABEL: {{^}}func_mov_fi_i32:
9 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
10 ; GCN: s_sub_u32 [[SUB:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
12 ; CI-NEXT: v_lshr_b32_e64 v0, [[SUB]], 6
13 ; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, [[SUB]]
16 ; GCN: ds_write_b32 v0, v0
17 define void @func_mov_fi_i32() #0 {
18 %alloca = alloca i32, addrspace(5)
19 store volatile i32 addrspace(5)* %alloca, i32 addrspace(5)* addrspace(3)* undef
23 ; Offset due to different objects
24 ; GCN-LABEL: {{^}}func_mov_fi_i32_offset:
25 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
27 ; CI: s_sub_u32 [[SUB0:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
28 ; CI-NEXT: s_sub_u32 [[SUB1:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
29 ; CI-DAG: v_lshr_b32_e64 v0, [[SUB0]], 6
30 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[SUB1]], 6
32 ; CI: ds_write_b32 v0, v0
33 ; CI-NEXT: v_add_i32_e64 v0, s{{\[[0-9]+:[0-9]+\]}}, 4, [[SCALED]]
34 ; CI-NEXT: ds_write_b32 v0, v0
36 ; GFX9: s_sub_u32 [[SUB0:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
37 ; GFX9-NEXT: s_sub_u32 [[SUB1:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
38 ; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, [[SUB0]]
39 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, [[SUB1]]
40 ; GFX9-DAG: ds_write_b32 v0, v0
41 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]]
42 ; GFX9-NEXT: ds_write_b32 v0, v0
43 define void @func_mov_fi_i32_offset() #0 {
44 %alloca0 = alloca i32, addrspace(5)
45 %alloca1 = alloca i32, addrspace(5)
46 store volatile i32 addrspace(5)* %alloca0, i32 addrspace(5)* addrspace(3)* undef
47 store volatile i32 addrspace(5)* %alloca1, i32 addrspace(5)* addrspace(3)* undef
51 ; Materialize into an add of a constant offset from the FI.
52 ; FIXME: Should be able to merge adds
54 ; GCN-LABEL: {{^}}func_add_constant_to_fi_i32:
55 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
56 ; GCN: s_sub_u32 [[SUB:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
58 ; CI-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[SUB]], 6
59 ; CI-NEXT: v_add_i32_e32 v0, vcc, 4, [[SCALED]]
61 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, [[SUB]]
62 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]]
66 ; GCN: ds_write_b32 v0, v0
67 define void @func_add_constant_to_fi_i32() #0 {
68 %alloca = alloca [2 x i32], align 4, addrspace(5)
69 %gep0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(5)* %alloca, i32 0, i32 1
70 store volatile i32 addrspace(5)* %gep0, i32 addrspace(5)* addrspace(3)* undef
74 ; A user the materialized frame index can't be meaningfully folded
77 ; GCN-LABEL: {{^}}func_other_fi_user_i32:
78 ; GCN: s_sub_u32 [[SUB:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
80 ; CI-NEXT: v_lshr_b32_e64 v0, [[SUB]], 6
82 ; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, [[SUB]]
84 ; GCN-NEXT: v_mul_u32_u24_e32 v0, 9, v0
86 ; GCN: ds_write_b32 v0, v0
87 define void @func_other_fi_user_i32() #0 {
88 %alloca = alloca [2 x i32], align 4, addrspace(5)
89 %ptrtoint = ptrtoint [2 x i32] addrspace(5)* %alloca to i32
90 %mul = mul i32 %ptrtoint, 9
91 store volatile i32 %mul, i32 addrspace(3)* undef
95 ; GCN-LABEL: {{^}}func_store_private_arg_i32_ptr:
96 ; GCN: v_mov_b32_e32 v1, 15{{$}}
97 ; GCN: buffer_store_dword v1, v0, s[0:3], s33 offen{{$}}
98 define void @func_store_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
99 store volatile i32 15, i32 addrspace(5)* %ptr
103 ; GCN-LABEL: {{^}}func_load_private_arg_i32_ptr:
105 ; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], s33 offen{{$}}
106 define void @func_load_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 {
107 %val = load volatile i32, i32 addrspace(5)* %ptr
111 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr:
113 ; GCN-NEXT: s_sub_u32 [[SUB_OFFSET:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
115 ; CI-NEXT: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], [[SUB_OFFSET]], 6
116 ; CI-NEXT: v_or_b32_e32 v0, 4, [[SHIFT]]
118 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, [[SUB_OFFSET]]
119 ; GFX9-NEXT: v_or_b32_e32 v0, 4, [[SHIFT]]
122 ; GCN: ds_write_b32 v0, v0
123 define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 } addrspace(5)* byval %arg0) #0 {
124 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
125 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
126 %load1 = load i32, i32 addrspace(5)* %gep1
127 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
131 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_value:
132 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
133 ; GCN-NEXT: buffer_load_ubyte v0, off, s[0:3], s32
134 ; GCN_NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:4
135 define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 } addrspace(5)* byval %arg0) #0 {
136 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
137 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
138 %load0 = load i8, i8 addrspace(5)* %gep0
139 %load1 = load i32, i32 addrspace(5)* %gep1
140 store volatile i8 %load0, i8 addrspace(3)* undef
141 store volatile i32 %load1, i32 addrspace(3)* undef
145 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_nonentry_block:
146 ; GCN: s_sub_u32 [[SUB_OFFSET:s[0-9]+]], s32, s33
148 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], [[SUB_OFFSET]], 6
150 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, [[SUB_OFFSET]]
152 ; GCN: s_and_saveexec_b64
154 ; CI: v_add_i32_e32 [[GEP:v[0-9]+]], vcc, 4, [[SHIFT]]
155 ; CI: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4{{$}}
157 ; GFX9: v_add_u32_e32 [[GEP:v[0-9]+]], 4, [[SHIFT]]
158 ; GFX9: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4{{$}}
160 ; GCN: ds_write_b32 v{{[0-9]+}}, [[GEP]]
161 define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 } addrspace(5)* byval %arg0, i32 %arg2) #0 {
162 %cmp = icmp eq i32 %arg2, 0
163 br i1 %cmp, label %bb, label %ret
166 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0
167 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1
168 %load1 = load volatile i32, i32 addrspace(5)* %gep1
169 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
176 ; Added offset can't be used with VOP3 add
177 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32:
178 ; GCN: s_sub_u32 [[SUB:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
179 ; CI-DAG: s_movk_i32 [[K:s[0-9]+|vcc_lo|vcc_hi]], 0x200
181 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[SUB]], 6
182 ; CI: v_add_i32_e32 [[VZ:v[0-9]+]], vcc, [[K]], [[SCALED]]
184 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, [[SUB]]
185 ; GFX9: v_add_u32_e32 [[VZ:v[0-9]+]], 0x200, [[SCALED]]
187 ; GCN: v_mul_u32_u24_e32 [[VZ]], 9, [[VZ]]
188 ; GCN: ds_write_b32 v0, [[VZ]]
189 define void @func_other_fi_user_non_inline_imm_offset_i32() #0 {
190 %alloca0 = alloca [128 x i32], align 4, addrspace(5)
191 %alloca1 = alloca [8 x i32], align 4, addrspace(5)
192 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
193 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
194 store volatile i32 7, i32 addrspace(5)* %gep0
195 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
196 %mul = mul i32 %ptrtoint, 9
197 store volatile i32 %mul, i32 addrspace(3)* undef
201 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32_vcc_live:
202 ; GCN: s_sub_u32 [[DIFF:s[0-9]+]], s32, s33
203 ; CI-DAG: s_movk_i32 [[OFFSET:s[0-9]+]], 0x200
205 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[DIFF]], 6
206 ; CI: v_add_i32_e64 [[VZ:v[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, [[OFFSET]], [[SCALED]]
208 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, [[DIFF]]
209 ; GFX9: v_add_u32_e32 [[VZ:v[0-9]+]], 0x200, [[SCALED]]
211 ; GCN: v_mul_u32_u24_e32 [[VZ]], 9, [[VZ]]
212 ; GCN: ds_write_b32 v0, [[VZ]]
213 define void @func_other_fi_user_non_inline_imm_offset_i32_vcc_live() #0 {
214 %alloca0 = alloca [128 x i32], align 4, addrspace(5)
215 %alloca1 = alloca [8 x i32], align 4, addrspace(5)
216 %vcc = call i64 asm sideeffect "; def $0", "={vcc}"()
217 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65
218 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0
219 store volatile i32 7, i32 addrspace(5)* %gep0
220 call void asm sideeffect "; use $0", "{vcc}"(i64 %vcc)
221 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32
222 %mul = mul i32 %ptrtoint, 9
223 store volatile i32 %mul, i32 addrspace(3)* undef
227 declare void @func(<4 x float> addrspace(5)* nocapture) #0
229 ; undef flag not preserved in eliminateFrameIndex when handling the
230 ; stores in the middle block.
232 ; GCN-LABEL: {{^}}undefined_stack_store_reg:
233 ; GCN: s_and_saveexec_b64
234 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s34 offset:
235 ; GCN: buffer_store_dword v0, off, s[0:3], s34 offset:
236 ; GCN: buffer_store_dword v0, off, s[0:3], s34 offset:
237 ; GCN: buffer_store_dword v0, off, s[0:3], s34 offset:
238 define void @undefined_stack_store_reg(float %arg, i32 %arg1) #0 {
240 %tmp = alloca <4 x float>, align 16, addrspace(5)
241 %tmp2 = insertelement <4 x float> undef, float %arg, i32 0
242 store <4 x float> %tmp2, <4 x float> addrspace(5)* undef
243 %tmp3 = icmp eq i32 %arg1, 0
244 br i1 %tmp3, label %bb4, label %bb5
247 call void @func(<4 x float> addrspace(5)* nonnull undef)
248 store <4 x float> %tmp2, <4 x float> addrspace(5)* %tmp, align 16
249 call void @func(<4 x float> addrspace(5)* nonnull %tmp)
256 ; GCN-LABEL: {{^}}alloca_ptr_nonentry_block:
257 ; GCN: s_and_saveexec_b64
258 ; GCN: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:4
259 ; GCN: s_sub_u32 [[SUB_OFFSET:s[0-9]+|vcc_lo|vcc_hi]], s32, s33
261 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], [[SUB_OFFSET]], 6
262 ; CI-NEXT: v_or_b32_e32 [[PTR:v[0-9]+]], 4, [[SHIFT]]
264 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, [[SUB_OFFSET]]
265 ; GFX9-NEXT: v_or_b32_e32 [[PTR:v[0-9]+]], 4, [[SHIFT]]
267 ; GCN: ds_write_b32 v{{[0-9]+}}, [[PTR]]
268 define void @alloca_ptr_nonentry_block(i32 %arg0) #0 {
269 %alloca0 = alloca { i8, i32 }, align 4, addrspace(5)
270 %cmp = icmp eq i32 %arg0, 0
271 br i1 %cmp, label %bb, label %ret
274 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 0
275 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 1
276 %load1 = load volatile i32, i32 addrspace(5)* %gep1
277 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef
284 attributes #0 = { nounwind }