1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG
2 ;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM
7 ;CM: EXP_IEEE T{{[0-9]+}}.X, -|T{{[0-9]+}}.X|
8 ;CM: EXP_IEEE T{{[0-9]+}}.Y (MASKED), -|T{{[0-9]+}}.X|
9 ;CM: EXP_IEEE T{{[0-9]+}}.Z (MASKED), -|T{{[0-9]+}}.X|
10 ;CM: EXP_IEEE * T{{[0-9]+}}.W (MASKED), -|T{{[0-9]+}}.X|
12 define amdgpu_ps void @test(<4 x float> inreg %reg0) {
13 %r0 = extractelement <4 x float> %reg0, i32 0
14 %r1 = call float @llvm.fabs.f32(float %r0)
15 %r2 = fsub float -0.000000e+00, %r1
16 %r3 = call float @llvm.exp2.f32(float %r2)
17 %vec = insertelement <4 x float> undef, float %r3, i32 0
18 call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
22 declare float @llvm.exp2.f32(float) readnone
23 declare float @llvm.fabs.f32(float) readnone
24 declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)