1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
6 declare float @llvm.amdgcn.fmad.ftz.f32(float %a, float %b, float %c)
8 ; GCN-LABEL: {{^}}mad_f32:
9 ; GCN: v_ma{{[dc]}}_f32
10 define amdgpu_kernel void @mad_f32(
11 float addrspace(1)* %r,
12 float addrspace(1)* %a,
13 float addrspace(1)* %b,
14 float addrspace(1)* %c) {
15 %a.val = load float, float addrspace(1)* %a
16 %b.val = load float, float addrspace(1)* %b
17 %c.val = load float, float addrspace(1)* %c
18 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float %c.val)
19 store float %r.val, float addrspace(1)* %r
23 ; GCN-LABEL: {{^}}mad_f32_imm_a:
24 ; GCN: v_madmk_f32 {{v[0-9]+}}, {{v[0-9]+}}, 0x41000000,
25 define amdgpu_kernel void @mad_f32_imm_a(
26 float addrspace(1)* %r,
27 float addrspace(1)* %b,
28 float addrspace(1)* %c) {
29 %b.val = load float, float addrspace(1)* %b
30 %c.val = load float, float addrspace(1)* %c
31 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float 8.0, float %b.val, float %c.val)
32 store float %r.val, float addrspace(1)* %r
36 ; GCN-LABEL: {{^}}mad_f32_imm_b:
37 ; GCN: v_mov_b32_e32 [[KB:v[0-9]+]], 0x41000000
38 ; GCN: v_ma{{[dc]}}_f32 {{v[0-9]+}}, {{[vs][0-9]+}}, [[KB]],
39 define amdgpu_kernel void @mad_f32_imm_b(
40 float addrspace(1)* %r,
41 float addrspace(1)* %a,
42 float addrspace(1)* %c) {
43 %a.val = load float, float addrspace(1)* %a
44 %c.val = load float, float addrspace(1)* %c
45 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float 8.0, float %c.val)
46 store float %r.val, float addrspace(1)* %r
50 ; GCN-LABEL: {{^}}mad_f32_imm_c:
51 ; GCN: v_mov_b32_e32 [[KC:v[0-9]+]], 0x41000000
52 ; GCN: v_ma{{[dc]}}_f32 {{v[0-9]+}}, {{[vs][0-9]+}}, {{v[0-9]+}}, [[KC]]{{$}}
53 define amdgpu_kernel void @mad_f32_imm_c(
54 float addrspace(1)* %r,
55 float addrspace(1)* %a,
56 float addrspace(1)* %b) {
57 %a.val = load float, float addrspace(1)* %a
58 %b.val = load float, float addrspace(1)* %b
59 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float 8.0)
60 store float %r.val, float addrspace(1)* %r
64 ; GCN-LABEL: {{^}}mad_f32_neg_b:
65 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}
66 define amdgpu_kernel void @mad_f32_neg_b(
67 float addrspace(1)* %r,
68 float addrspace(1)* %a,
69 float addrspace(1)* %b,
70 float addrspace(1)* %c) {
71 %a.val = load float, float addrspace(1)* %a
72 %b.val = load float, float addrspace(1)* %b
73 %c.val = load float, float addrspace(1)* %c
74 %neg.b = fsub float -0.0, %b.val
75 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.b, float %c.val)
76 store float %r.val, float addrspace(1)* %r
80 ; GCN-LABEL: {{^}}mad_f32_abs_b:
81 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, |v{{[0-9]+}}|, v{{[0-9]+}}
82 define amdgpu_kernel void @mad_f32_abs_b(
83 float addrspace(1)* %r,
84 float addrspace(1)* %a,
85 float addrspace(1)* %b,
86 float addrspace(1)* %c) {
87 %a.val = load float, float addrspace(1)* %a
88 %b.val = load float, float addrspace(1)* %b
89 %c.val = load float, float addrspace(1)* %c
90 %abs.b = call float @llvm.fabs.f32(float %b.val)
91 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %abs.b, float %c.val)
92 store float %r.val, float addrspace(1)* %r
96 ; GCN-LABEL: {{^}}mad_f32_neg_abs_b:
97 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -|v{{[0-9]+}}|, v{{[0-9]+}}
98 define amdgpu_kernel void @mad_f32_neg_abs_b(
99 float addrspace(1)* %r,
100 float addrspace(1)* %a,
101 float addrspace(1)* %b,
102 float addrspace(1)* %c) {
103 %a.val = load float, float addrspace(1)* %a
104 %b.val = load float, float addrspace(1)* %b
105 %c.val = load float, float addrspace(1)* %c
106 %abs.b = call float @llvm.fabs.f32(float %b.val)
107 %neg.abs.b = fsub float -0.0, %abs.b
108 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.abs.b, float %c.val)
109 store float %r.val, float addrspace(1)* %r
113 declare float @llvm.fabs.f32(float)