| blob | c721de658129ea550939abca72c292bb1b0b40ab |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefix=GCN %s
4 define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
5 ; GCN-LABEL: vector_clause:
6 ; GCN: ; %bb.0: ; %bb
7 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
8 ; GCN-NEXT: v_mov_b32_e32 v17, 0
9 ; GCN-NEXT: v_lshlrev_b32_e32 v16, 4, v0
10 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
11 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
12 ; GCN-NEXT: global_load_dwordx4 v[0:3], v[16:17], s[2:3]
13 ; GCN-NEXT: global_load_dwordx4 v[4:7], v[16:17], s[2:3] offset:16
14 ; GCN-NEXT: global_load_dwordx4 v[8:11], v[16:17], s[2:3] offset:32
15 ; GCN-NEXT: global_load_dwordx4 v[12:15], v[16:17], s[2:3] offset:48
16 ; GCN-NEXT: s_nop 0
17 ; GCN-NEXT: s_waitcnt vmcnt(3)
18 ; GCN-NEXT: s_nop 0
19 ; GCN-NEXT: global_store_dwordx4 v[16:17], v[0:3], s[4:5]
20 ; GCN-NEXT: s_waitcnt vmcnt(3)
21 ; GCN-NEXT: global_store_dwordx4 v[16:17], v[4:7], s[4:5] offset:16
22 ; GCN-NEXT: s_waitcnt vmcnt(3)
23 ; GCN-NEXT: global_store_dwordx4 v[16:17], v[8:11], s[4:5] offset:32
24 ; GCN-NEXT: s_waitcnt vmcnt(3)
25 ; GCN-NEXT: global_store_dwordx4 v[16:17], v[12:15], s[4:5] offset:48
26 ; GCN-NEXT: s_endpgm
27 bb:
28 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
29 %tmp2 = zext i32 %tmp to i64
30 %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2
31 %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16
32 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2
33 %tmp6 = add nuw nsw i64 %tmp2, 1
34 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
35 %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
36 %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
37 %tmp10 = add nuw nsw i64 %tmp2, 2
38 %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10
39 %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16
40 %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10
41 %tmp14 = add nuw nsw i64 %tmp2, 3
42 %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14
43 %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16
44 %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14
45 store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16
46 store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
47 store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16
48 store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16
49 ret void
50 }
52 define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
53 ; GCN-LABEL: scalar_clause:
54 ; GCN: ; %bb.0: ; %bb
55 ; GCN-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24
56 ; GCN-NEXT: s_load_dwordx2 s[18:19], s[0:1], 0x2c
57 ; GCN-NEXT: s_nop 0
58 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
59 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[16:17], 0x0
60 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x10
61 ; GCN-NEXT: s_load_dwordx4 s[8:11], s[16:17], 0x20
62 ; GCN-NEXT: s_load_dwordx4 s[12:15], s[16:17], 0x30
63 ; GCN-NEXT: v_mov_b32_e32 v12, s18
64 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
65 ; GCN-NEXT: v_mov_b32_e32 v0, s0
66 ; GCN-NEXT: v_mov_b32_e32 v4, s4
67 ; GCN-NEXT: v_mov_b32_e32 v13, s19
68 ; GCN-NEXT: v_mov_b32_e32 v1, s1
69 ; GCN-NEXT: v_mov_b32_e32 v2, s2
70 ; GCN-NEXT: v_mov_b32_e32 v3, s3
71 ; GCN-NEXT: v_mov_b32_e32 v5, s5
72 ; GCN-NEXT: v_mov_b32_e32 v6, s6
73 ; GCN-NEXT: v_mov_b32_e32 v7, s7
74 ; GCN-NEXT: v_mov_b32_e32 v8, s8
75 ; GCN-NEXT: v_mov_b32_e32 v9, s9
76 ; GCN-NEXT: v_mov_b32_e32 v10, s10
77 ; GCN-NEXT: v_mov_b32_e32 v11, s11
78 ; GCN-NEXT: s_nop 0
79 ; GCN-NEXT: s_nop 0
80 ; GCN-NEXT: global_store_dwordx4 v[12:13], v[0:3], off
81 ; GCN-NEXT: global_store_dwordx4 v[12:13], v[4:7], off offset:16
82 ; GCN-NEXT: v_mov_b32_e32 v0, s12
83 ; GCN-NEXT: v_mov_b32_e32 v1, s13
84 ; GCN-NEXT: v_mov_b32_e32 v2, s14
85 ; GCN-NEXT: v_mov_b32_e32 v3, s15
86 ; GCN-NEXT: s_nop 0
87 ; GCN-NEXT: s_nop 0
88 ; GCN-NEXT: global_store_dwordx4 v[12:13], v[8:11], off offset:32
89 ; GCN-NEXT: global_store_dwordx4 v[12:13], v[0:3], off offset:48
90 ; GCN-NEXT: s_endpgm
91 bb:
92 %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16
93 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1
94 %tmp3 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp2, align 16
95 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 1
96 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 2
97 %tmp6 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp5, align 16
98 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 2
99 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 3
100 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
101 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 3
102 store <4 x i32> %tmp, <4 x i32> addrspace(1)* %arg1, align 16
103 store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %tmp4, align 16
104 store <4 x i32> %tmp6, <4 x i32> addrspace(1)* %tmp7, align 16
105 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
106 ret void
107 }
109 define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) {
110 ; GCN-LABEL: mubuf_clause:
111 ; GCN: ; %bb.0: ; %bb
112 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
113 ; GCN-NEXT: v_and_b32_e32 v2, 0x3ff, v2
114 ; GCN-NEXT: v_lshlrev_b32_e32 v2, 4, v2
115 ; GCN-NEXT: v_add_u32_e32 v0, v0, v2
116 ; GCN-NEXT: v_add_u32_e32 v1, v1, v2
117 ; GCN-NEXT: s_nop 0
118 ; GCN-NEXT: s_nop 0
119 ; GCN-NEXT: buffer_load_dword v3, v0, s[0:3], s33 offen
120 ; GCN-NEXT: buffer_load_dword v4, v0, s[0:3], s33 offen offset:4
121 ; GCN-NEXT: buffer_load_dword v5, v0, s[0:3], s33 offen offset:8
122 ; GCN-NEXT: buffer_load_dword v6, v0, s[0:3], s33 offen offset:12
123 ; GCN-NEXT: buffer_load_dword v7, v0, s[0:3], s33 offen offset:16
124 ; GCN-NEXT: buffer_load_dword v8, v0, s[0:3], s33 offen offset:20
125 ; GCN-NEXT: buffer_load_dword v9, v0, s[0:3], s33 offen offset:24
126 ; GCN-NEXT: buffer_load_dword v10, v0, s[0:3], s33 offen offset:28
127 ; GCN-NEXT: buffer_load_dword v11, v0, s[0:3], s33 offen offset:32
128 ; GCN-NEXT: buffer_load_dword v12, v0, s[0:3], s33 offen offset:36
129 ; GCN-NEXT: buffer_load_dword v13, v0, s[0:3], s33 offen offset:40
130 ; GCN-NEXT: buffer_load_dword v14, v0, s[0:3], s33 offen offset:44
131 ; GCN-NEXT: buffer_load_dword v15, v0, s[0:3], s33 offen offset:48
132 ; GCN-NEXT: buffer_load_dword v16, v0, s[0:3], s33 offen offset:52
133 ; GCN-NEXT: buffer_load_dword v17, v0, s[0:3], s33 offen offset:56
134 ; GCN-NEXT: s_nop 0
135 ; GCN-NEXT: s_nop 0
136 ; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], s33 offen offset:60
137 ; GCN-NEXT: s_nop 0
138 ; GCN-NEXT: s_waitcnt vmcnt(15)
139 ; GCN-NEXT: s_nop 0
140 ; GCN-NEXT: buffer_store_dword v3, v1, s[0:3], s33 offen
141 ; GCN-NEXT: s_waitcnt vmcnt(15)
142 ; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], s33 offen offset:4
143 ; GCN-NEXT: s_waitcnt vmcnt(15)
144 ; GCN-NEXT: buffer_store_dword v5, v1, s[0:3], s33 offen offset:8
145 ; GCN-NEXT: s_waitcnt vmcnt(15)
146 ; GCN-NEXT: buffer_store_dword v6, v1, s[0:3], s33 offen offset:12
147 ; GCN-NEXT: s_waitcnt vmcnt(15)
148 ; GCN-NEXT: buffer_store_dword v7, v1, s[0:3], s33 offen offset:16
149 ; GCN-NEXT: s_waitcnt vmcnt(15)
150 ; GCN-NEXT: buffer_store_dword v8, v1, s[0:3], s33 offen offset:20
151 ; GCN-NEXT: s_waitcnt vmcnt(15)
152 ; GCN-NEXT: buffer_store_dword v9, v1, s[0:3], s33 offen offset:24
153 ; GCN-NEXT: s_waitcnt vmcnt(15)
154 ; GCN-NEXT: buffer_store_dword v10, v1, s[0:3], s33 offen offset:28
155 ; GCN-NEXT: s_waitcnt vmcnt(15)
156 ; GCN-NEXT: buffer_store_dword v11, v1, s[0:3], s33 offen offset:32
157 ; GCN-NEXT: s_waitcnt vmcnt(15)
158 ; GCN-NEXT: buffer_store_dword v12, v1, s[0:3], s33 offen offset:36
159 ; GCN-NEXT: s_waitcnt vmcnt(15)
160 ; GCN-NEXT: buffer_store_dword v13, v1, s[0:3], s33 offen offset:40
161 ; GCN-NEXT: s_waitcnt vmcnt(15)
162 ; GCN-NEXT: buffer_store_dword v14, v1, s[0:3], s33 offen offset:44
163 ; GCN-NEXT: s_waitcnt vmcnt(15)
164 ; GCN-NEXT: buffer_store_dword v15, v1, s[0:3], s33 offen offset:48
165 ; GCN-NEXT: s_waitcnt vmcnt(15)
166 ; GCN-NEXT: buffer_store_dword v16, v1, s[0:3], s33 offen offset:52
167 ; GCN-NEXT: s_waitcnt vmcnt(15)
168 ; GCN-NEXT: buffer_store_dword v17, v1, s[0:3], s33 offen offset:56
169 ; GCN-NEXT: s_waitcnt vmcnt(15)
170 ; GCN-NEXT: buffer_store_dword v0, v1, s[0:3], s33 offen offset:60
171 ; GCN-NEXT: s_waitcnt vmcnt(0)
172 ; GCN-NEXT: s_setpc_b64 s[30:31]
173 bb:
174 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
175 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp
176 %tmp3 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp2, align 16
177 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp
178 %tmp5 = add nuw nsw i32 %tmp, 1
179 %tmp6 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp5
180 %tmp7 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp6, align 16
181 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp5
182 %tmp9 = add nuw nsw i32 %tmp, 2
183 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp9
184 %tmp11 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp10, align 16
185 %tmp12 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp9
186 %tmp13 = add nuw nsw i32 %tmp, 3
187 %tmp14 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp13
188 %tmp15 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp14, align 16
189 %tmp16 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp13
190 store <4 x i32> %tmp3, <4 x i32> addrspace(5)* %tmp4, align 16
191 store <4 x i32> %tmp7, <4 x i32> addrspace(5)* %tmp8, align 16
192 store <4 x i32> %tmp11, <4 x i32> addrspace(5)* %tmp12, align 16
193 store <4 x i32> %tmp15, <4 x i32> addrspace(5)* %tmp16, align 16
194 ret void
195 }
197 define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) {
198 ; GCN-LABEL: vector_clause_indirect:
199 ; GCN: ; %bb.0: ; %bb
200 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
201 ; GCN-NEXT: v_mov_b32_e32 v1, 0
202 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
203 ; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
204 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
205 ; GCN-NEXT: global_load_dwordx2 v[8:9], v[0:1], s[2:3]
206 ; GCN-NEXT: s_nop 0
207 ; GCN-NEXT: s_waitcnt vmcnt(0)
208 ; GCN-NEXT: s_nop 0
209 ; GCN-NEXT: global_load_dwordx4 v[0:3], v[8:9], off
210 ; GCN-NEXT: global_load_dwordx4 v[4:7], v[8:9], off offset:16
211 ; GCN-NEXT: v_mov_b32_e32 v9, s5
212 ; GCN-NEXT: v_mov_b32_e32 v8, s4
213 ; GCN-NEXT: s_nop 0
214 ; GCN-NEXT: s_waitcnt vmcnt(1)
215 ; GCN-NEXT: s_nop 0
216 ; GCN-NEXT: global_store_dwordx4 v[8:9], v[0:3], off
217 ; GCN-NEXT: s_waitcnt vmcnt(1)
218 ; GCN-NEXT: global_store_dwordx4 v[8:9], v[4:7], off offset:16
219 ; GCN-NEXT: s_endpgm
220 bb:
221 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
222 %tmp3 = zext i32 %tmp to i64
223 %tmp4 = getelementptr inbounds i64, i64 addrspace(1)* %arg, i64 %tmp3
224 %tmp5 = bitcast i64 addrspace(1)* %tmp4 to <4 x i32> addrspace(1)* addrspace(1)*
225 %tmp6 = load <4 x i32> addrspace(1)*, <4 x i32> addrspace(1)* addrspace(1)* %tmp5, align 8
226 %tmp7 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp6, align 16
227 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %tmp6, i64 1
228 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
229 store <4 x i32> %tmp7, <4 x i32> addrspace(1)* %arg2, align 16
230 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg2, i64 1
231 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
232 ret void
233 }
235 define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) {
236 ; GCN-LABEL: load_global_d16_hi:
237 ; GCN: ; %bb.0: ; %entry
238 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
239 ; GCN-NEXT: v_mov_b32_e32 v5, v2
240 ; GCN-NEXT: s_nop 0
241 ; GCN-NEXT: s_nop 0
242 ; GCN-NEXT: global_load_short_d16_hi v5, v[0:1], off
243 ; GCN-NEXT: s_nop 0
244 ; GCN-NEXT: s_nop 0
245 ; GCN-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:64
246 ; GCN-NEXT: s_nop 0
247 ; GCN-NEXT: s_waitcnt vmcnt(1)
248 ; GCN-NEXT: s_nop 0
249 ; GCN-NEXT: global_store_dword v[3:4], v5, off
250 ; GCN-NEXT: s_waitcnt vmcnt(1)
251 ; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128
252 ; GCN-NEXT: s_waitcnt vmcnt(0)
253 ; GCN-NEXT: s_setpc_b64 s[30:31]
254 entry:
255 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
256 %load1 = load i16, i16 addrspace(1)* %in
257 %load2 = load i16, i16 addrspace(1)* %gep
258 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
259 %build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
260 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
261 %build2 = insertelement <2 x i16> undef, i16 %reg, i32 0
262 %build3 = insertelement <2 x i16> %build2, i16 %load2, i32 1
263 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
264 store <2 x i16> %build3, <2 x i16> addrspace(1)* %gep2
265 ret void
266 }
268 define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) {
269 ; GCN-LABEL: load_global_d16_lo:
270 ; GCN: ; %bb.0: ; %entry
271 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
272 ; GCN-NEXT: v_mov_b32_e32 v5, v2
273 ; GCN-NEXT: s_nop 0
274 ; GCN-NEXT: s_nop 0
275 ; GCN-NEXT: global_load_short_d16 v5, v[0:1], off
276 ; GCN-NEXT: s_nop 0
277 ; GCN-NEXT: s_nop 0
278 ; GCN-NEXT: global_load_short_d16 v2, v[0:1], off offset:64
279 ; GCN-NEXT: s_nop 0
280 ; GCN-NEXT: s_waitcnt vmcnt(1)
281 ; GCN-NEXT: s_nop 0
282 ; GCN-NEXT: global_store_dword v[3:4], v5, off
283 ; GCN-NEXT: s_waitcnt vmcnt(1)
284 ; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128
285 ; GCN-NEXT: s_waitcnt vmcnt(0)
286 ; GCN-NEXT: s_setpc_b64 s[30:31]
287 entry:
288 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
289 %reg.bc1 = bitcast i32 %reg to <2 x i16>
290 %reg.bc2 = bitcast i32 %reg to <2 x i16>
291 %load1 = load i16, i16 addrspace(1)* %in
292 %load2 = load i16, i16 addrspace(1)* %gep
293 %build1 = insertelement <2 x i16> %reg.bc1, i16 %load1, i32 0
294 %build2 = insertelement <2 x i16> %reg.bc2, i16 %load2, i32 0
295 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
296 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
297 store <2 x i16> %build2, <2 x i16> addrspace(1)* %gep2
298 ret void
299 }
301 declare i32 @llvm.amdgcn.workitem.id.x()