1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck %s
4 # The wrong form of scavengeRegister was used, so it wasn't accounting
5 # for the iterator passed to eliminateFrameIndex. It was instead using
6 # the current iterator in the scavenger, which was not yet set if the
7 # spill was the first instruction in the block.
10 name: scavenge_register_position
11 tracksRegLiveness: true
13 # Force a frame larger than the immediate field with a large alignment.
15 - { id: 0, type: default, offset: 4096, size: 4, alignment: 8192 }
19 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
20 scratchWaveOffsetReg: $sgpr33
21 frameOffsetReg: $sgpr5
22 stackPtrOffsetReg: $sgpr32
25 ; CHECK-LABEL: name: scavenge_register_position
27 ; CHECK: successors: %bb.1(0x80000000)
28 ; CHECK: liveins: $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3
29 ; CHECK: $sgpr4 = S_ADD_U32 $sgpr32, 524288, implicit-def $scc
30 ; CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.0, align 8192, addrspace 5)
31 ; CHECK: S_BRANCH %bb.1
33 ; CHECK: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
34 ; CHECK: $sgpr4 = S_ADD_U32 $sgpr32, 524288, implicit-def $scc
35 ; CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr4, 0, 0, 0, 0, 0, 0, implicit $exec :: (load 4 from %stack.0, align 8192, addrspace 5)
36 ; CHECK: S_ENDPGM 0, implicit $vgpr0
38 $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, implicit $exec :: (load 4 from %stack.0, addrspace 5)
42 $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, implicit $exec :: (load 4 from %stack.0, addrspace 5)
43 S_ENDPGM 0, implicit $vgpr0