1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=CI %s
3 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
5 ; GCN-LABEL: {{^}}reduce_i64_load_align_4_width_to_i32:
6 ; GCN: buffer_load_dword [[VAL:v[0-9]+]]
7 ; GCN: v_and_b32_e32 v{{[0-9]+}}, 0x12d687, [[VAL]]
8 ; GCN: buffer_store_dwordx2
9 define amdgpu_kernel void @reduce_i64_load_align_4_width_to_i32(i64 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
10 %a = load i64, i64 addrspace(1)* %in, align 4
11 %and = and i64 %a, 1234567
12 store i64 %and, i64 addrspace(1)* %out, align 8
16 ; GCN-LABEL: {{^}}reduce_i64_align_4_bitcast_v2i32_elt0:
17 ; GCN: buffer_load_dword [[VAL:v[0-9]+]]
18 ; GCN: buffer_store_dword [[VAL]]
19 define amdgpu_kernel void @reduce_i64_align_4_bitcast_v2i32_elt0(i32 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
20 %a = load i64, i64 addrspace(1)* %in, align 4
21 %vec = bitcast i64 %a to <2 x i32>
22 %elt0 = extractelement <2 x i32> %vec, i32 0
23 store i32 %elt0, i32 addrspace(1)* %out
27 ; GCN-LABEL: {{^}}reduce_i64_align_4_bitcast_v2i32_elt1:
28 ; GCN: buffer_load_dword [[VAL:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:4
29 ; GCN: buffer_store_dword [[VAL]]
30 define amdgpu_kernel void @reduce_i64_align_4_bitcast_v2i32_elt1(i32 addrspace(1)* %out, i64 addrspace(1)* %in) #0 {
31 %a = load i64, i64 addrspace(1)* %in, align 4
32 %vec = bitcast i64 %a to <2 x i32>
33 %elt0 = extractelement <2 x i32> %vec, i32 1
34 store i32 %elt0, i32 addrspace(1)* %out
38 attributes #0 = { nounwind }