1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn < %s | FileCheck -check-prefix=SI %s
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI %s
4 ; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store:
5 ; SI: buffer_load_dwordx4
6 ; SI: buffer_load_dwordx4
7 ; SI: buffer_store_dwordx4
8 ; SI: buffer_store_dwordx4
10 define amdgpu_kernel void @no_reorder_v2f64_global_load_store(<2 x double> addrspace(1)* nocapture %x, <2 x double> addrspace(1)* nocapture %y) nounwind {
11 %tmp1 = load <2 x double>, <2 x double> addrspace(1)* %x, align 16
12 %tmp4 = load <2 x double>, <2 x double> addrspace(1)* %y, align 16
13 store <2 x double> %tmp4, <2 x double> addrspace(1)* %x, align 16
14 store <2 x double> %tmp1, <2 x double> addrspace(1)* %y, align 16
18 ; SI-LABEL: {{^}}no_reorder_scalarized_v2f64_local_load_store:
22 define amdgpu_kernel void @no_reorder_scalarized_v2f64_local_load_store(<2 x double> addrspace(3)* nocapture %x, <2 x double> addrspace(3)* nocapture %y) nounwind {
23 %tmp1 = load <2 x double>, <2 x double> addrspace(3)* %x, align 16
24 %tmp4 = load <2 x double>, <2 x double> addrspace(3)* %y, align 16
25 store <2 x double> %tmp4, <2 x double> addrspace(3)* %x, align 16
26 store <2 x double> %tmp1, <2 x double> addrspace(3)* %y, align 16
30 ; SI-LABEL: {{^}}no_reorder_split_v8i32_global_load_store:
31 ; SI: buffer_load_dwordx4
32 ; SI: buffer_load_dwordx4
33 ; SI: buffer_load_dwordx4
34 ; SI: buffer_load_dwordx4
37 ; SI: buffer_store_dwordx4
38 ; SI: buffer_store_dwordx4
39 ; SI: buffer_store_dwordx4
40 ; SI: buffer_store_dwordx4
42 define amdgpu_kernel void @no_reorder_split_v8i32_global_load_store(<8 x i32> addrspace(1)* nocapture %x, <8 x i32> addrspace(1)* nocapture %y) nounwind {
43 %tmp1 = load <8 x i32>, <8 x i32> addrspace(1)* %x, align 32
44 %tmp4 = load <8 x i32>, <8 x i32> addrspace(1)* %y, align 32
45 store <8 x i32> %tmp4, <8 x i32> addrspace(1)* %x, align 32
46 store <8 x i32> %tmp1, <8 x i32> addrspace(1)* %y, align 32
50 ; SI-LABEL: {{^}}no_reorder_extload_64:
57 define amdgpu_kernel void @no_reorder_extload_64(<2 x i32> addrspace(3)* nocapture %x, <2 x i32> addrspace(3)* nocapture %y) nounwind {
58 %tmp1 = load <2 x i32>, <2 x i32> addrspace(3)* %x, align 8
59 %tmp4 = load <2 x i32>, <2 x i32> addrspace(3)* %y, align 8
60 %tmp1ext = zext <2 x i32> %tmp1 to <2 x i64>
61 %tmp4ext = zext <2 x i32> %tmp4 to <2 x i64>
62 %tmp7 = add <2 x i64> %tmp1ext, <i64 1, i64 1>
63 %tmp9 = add <2 x i64> %tmp4ext, <i64 1, i64 1>
64 %trunctmp9 = trunc <2 x i64> %tmp9 to <2 x i32>
65 %trunctmp7 = trunc <2 x i64> %tmp7 to <2 x i32>
66 store <2 x i32> %trunctmp9, <2 x i32> addrspace(3)* %x, align 8
67 store <2 x i32> %trunctmp7, <2 x i32> addrspace(3)* %y, align 8