1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=BOTH %s
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=BOTH %s
4 ; BOTH-LABEL: {{^}}s_rotr_i64:
9 define amdgpu_kernel void @s_rotr_i64(i64 addrspace(1)* %in, i64 %x, i64 %y) {
11 %tmp0 = sub i64 64, %y
12 %tmp1 = shl i64 %x, %tmp0
13 %tmp2 = lshr i64 %x, %y
14 %tmp3 = or i64 %tmp1, %tmp2
15 store i64 %tmp3, i64 addrspace(1)* %in
19 ; BOTH-LABEL: {{^}}v_rotr_i64:
20 ; BOTH-DAG: v_sub_{{[iu]}}32
23 ; VI-DAG: v_lshrrev_b64
24 ; VI-DAG: v_lshlrev_b64
27 define amdgpu_kernel void @v_rotr_i64(i64 addrspace(1)* %in, i64 addrspace(1)* %xptr, i64 addrspace(1)* %yptr) {
29 %x = load i64, i64 addrspace(1)* %xptr, align 8
30 %y = load i64, i64 addrspace(1)* %yptr, align 8
31 %tmp0 = sub i64 64, %y
32 %tmp1 = shl i64 %x, %tmp0
33 %tmp2 = lshr i64 %x, %y
34 %tmp3 = or i64 %tmp1, %tmp2
35 store i64 %tmp3, i64 addrspace(1)* %in
39 ; BOTH-LABEL: {{^}}s_rotr_v2i64:
40 define amdgpu_kernel void @s_rotr_v2i64(<2 x i64> addrspace(1)* %in, <2 x i64> %x, <2 x i64> %y) {
42 %tmp0 = sub <2 x i64> <i64 64, i64 64>, %y
43 %tmp1 = shl <2 x i64> %x, %tmp0
44 %tmp2 = lshr <2 x i64> %x, %y
45 %tmp3 = or <2 x i64> %tmp1, %tmp2
46 store <2 x i64> %tmp3, <2 x i64> addrspace(1)* %in
50 ; BOTH-LABEL: {{^}}v_rotr_v2i64:
51 define amdgpu_kernel void @v_rotr_v2i64(<2 x i64> addrspace(1)* %in, <2 x i64> addrspace(1)* %xptr, <2 x i64> addrspace(1)* %yptr) {
53 %x = load <2 x i64>, <2 x i64> addrspace(1)* %xptr, align 8
54 %y = load <2 x i64>, <2 x i64> addrspace(1)* %yptr, align 8
55 %tmp0 = sub <2 x i64> <i64 64, i64 64>, %y
56 %tmp1 = shl <2 x i64> %x, %tmp0
57 %tmp2 = lshr <2 x i64> %x, %y
58 %tmp3 = or <2 x i64> %tmp1, %tmp2
59 store <2 x i64> %tmp3, <2 x i64> addrspace(1)* %in