1 ; RUN: llc -march=hexagon -mattr=-packets -hexagon-check-bank-conflict=0 < %s | FileCheck %s
2 ; Do not check stores. They undergo some optimizations in the DAG combiner
3 ; resulting in getting out of order. There is likely little that can be
4 ; done to keep the original order.
6 target triple = "hexagon"
8 %s.0 = type { i32, i32, i32 }
10 ; Function Attrs: nounwind
11 define void @f0(%s.0* %a0, %s.0* %a1) #0 {
13 ; CHECK: = memw({{.*}}+#0)
14 ; CHECK: = memw({{.*}}+#4)
15 ; CHECK: = memw({{.*}}+#8)
16 %v0 = alloca %s.0*, align 4
17 %v1 = alloca %s.0*, align 4
18 store %s.0* %a0, %s.0** %v0, align 4
19 store %s.0* %a1, %s.0** %v1, align 4
20 %v2 = load %s.0*, %s.0** %v0, align 4
21 %v3 = load %s.0*, %s.0** %v1, align 4
22 %v4 = bitcast %s.0* %v2 to i8*
23 %v5 = bitcast %s.0* %v3 to i8*
24 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %v4, i8* align 4 %v5, i32 12, i1 false)
28 ; Function Attrs: argmemonly nounwind
29 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1) #1
31 attributes #0 = { nounwind }
32 attributes #1 = { argmemonly nounwind }