1 ; RUN: llc -march=hexagon -enable-pipeliner < %s
4 ; Function Attrs: nounwind
5 define void @f0(i32* nocapture %a0) #0 {
7 br i1 undef, label %b1, label %b2
10 %v0 = phi i64 [ %v9, %b1 ], [ 0, %b0 ]
11 %v1 = phi i32 [ %v10, %b1 ], [ 0, %b0 ]
12 %v2 = getelementptr inbounds i32, i32* %a0, i32 %v1
13 %v3 = load i32, i32* %v2, align 4, !tbaa !0
14 %v4 = zext i32 %v3 to i64
15 %v5 = load i32, i32* undef, align 4, !tbaa !0
16 %v6 = zext i32 %v5 to i64
17 %v7 = shl nuw i64 %v6, 32
19 %v9 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v0, i64 %v8, i64 %v8)
20 %v10 = add nsw i32 %v1, 4
21 %v11 = icmp slt i32 %v10, undef
22 br i1 %v11, label %b1, label %b2
24 b2: ; preds = %b1, %b0
25 %v12 = phi i64 [ 0, %b0 ], [ %v9, %b1 ]
29 ; Function Attrs: nounwind readnone
30 declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
32 attributes #0 = { nounwind }
33 attributes #1 = { nounwind readnone }
37 !2 = !{!"omnipotent char", !3}
38 !3 = !{!"Simple C/C++ TBAA"}