1 ; RUN: llc -march=hexagon < %s
4 ; Test that the pipeliner doesn't assert in orderDependence because
5 ; the check for OrderAfterDef precedeence is in the wrong spot.
7 %s.0 = type <{ i8, [20 x %s.1] }>
8 %s.1 = type { i16, i16 }
10 ; Function Attrs: nounwind optsize ssp
11 define void @f0() #0 {
13 br i1 undef, label %b1, label %b2
15 b1: ; preds = %b1, %b0
16 %v0 = phi i32 [ %v3, %b1 ], [ 0, %b0 ]
17 %v1 = getelementptr inbounds %s.0, %s.0* undef, i32 0, i32 1, i32 %v0, i32 0
18 store i16 0, i16* %v1, align 1
19 %v2 = getelementptr inbounds %s.0, %s.0* undef, i32 0, i32 1, i32 %v0, i32 1
20 store i16 -1, i16* %v2, align 1
21 %v3 = add nsw i32 %v0, 1
22 %v4 = icmp eq i32 %v3, 20
23 br i1 %v4, label %b2, label %b1
25 b2: ; preds = %b1, %b0
29 attributes #0 = { nounwind optsize ssp "target-cpu"="hexagonv55" }