1 ; RUN: llc -march=hexagon < %s | FileCheck %s
4 ; CHECK: [[P00:p[0-9]+]] = vcmpb.eq(r1:0,r3:2)
5 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
6 ; CHECK: r1:0 = mask([[P01]])
8 define <8 x i8> @test_00(<8 x i8> %a0, <8 x i8> %a1) #0 {
9 %v0 = icmp ne <8 x i8> %a0, %a1
10 %v1 = sext <8 x i1> %v0 to <8 x i8>
14 ; CHECK-LABEL: test_01
15 ; CHECK: [[P00:p[0-9]+]] = vcmpb.gt(r1:0,r3:2)
16 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
17 ; CHECK: r1:0 = mask([[P01]])
19 define <8 x i8> @test_01(<8 x i8> %a0, <8 x i8> %a1) #0 {
20 %v0 = icmp sle <8 x i8> %a0, %a1
21 %v1 = sext <8 x i1> %v0 to <8 x i8>
25 ; CHECK-LABEL: test_02
26 ; CHECK: [[P00:p[0-9]+]] = vcmpb.gtu(r1:0,r3:2)
27 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
28 ; CHECK: r1:0 = mask([[P01]])
30 define <8 x i8> @test_02(<8 x i8> %a0, <8 x i8> %a1) #0 {
31 %v0 = icmp ule <8 x i8> %a0, %a1
32 %v1 = sext <8 x i1> %v0 to <8 x i8>
36 ; CHECK-LABEL: test_10
37 ; CHECK: [[P00:p[0-9]+]] = vcmph.eq(r1:0,r3:2)
38 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
39 ; CHECK: r1:0 = mask([[P01]])
41 define <4 x i16> @test_10(<4 x i16> %a0, <4 x i16> %a1) #0 {
42 %v0 = icmp ne <4 x i16> %a0, %a1
43 %v1 = sext <4 x i1> %v0 to <4 x i16>
47 ; CHECK-LABEL: test_11
48 ; CHECK: [[P00:p[0-9]+]] = vcmph.gt(r1:0,r3:2)
49 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
50 ; CHECK: r1:0 = mask([[P01]])
52 define <4 x i16> @test_11(<4 x i16> %a0, <4 x i16> %a1) #0 {
53 %v0 = icmp sle <4 x i16> %a0, %a1
54 %v1 = sext <4 x i1> %v0 to <4 x i16>
58 ; CHECK-LABEL: test_12
59 ; CHECK: [[P00:p[0-9]+]] = vcmph.gtu(r1:0,r3:2)
60 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
61 ; CHECK: r1:0 = mask([[P01]])
63 define <4 x i16> @test_12(<4 x i16> %a0, <4 x i16> %a1) #0 {
64 %v0 = icmp ule <4 x i16> %a0, %a1
65 %v1 = sext <4 x i1> %v0 to <4 x i16>
69 ; CHECK-LABEL: test_20
70 ; CHECK: [[P00:p[0-9]+]] = vcmpw.eq(r1:0,r3:2)
71 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
72 ; CHECK: r1:0 = mask([[P01]])
74 define <2 x i32> @test_20(<2 x i32> %a0, <2 x i32> %a1) #0 {
75 %v0 = icmp ne <2 x i32> %a0, %a1
76 %v1 = sext <2 x i1> %v0 to <2 x i32>
80 ; CHECK-LABEL: test_21
81 ; CHECK: [[P00:p[0-9]+]] = vcmpw.gt(r1:0,r3:2)
82 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
83 ; CHECK: r1:0 = mask([[P01]])
85 define <2 x i32> @test_21(<2 x i32> %a0, <2 x i32> %a1) #0 {
86 %v0 = icmp sle <2 x i32> %a0, %a1
87 %v1 = sext <2 x i1> %v0 to <2 x i32>
91 ; CHECK-LABEL: test_22
92 ; CHECK: [[P00:p[0-9]+]] = vcmpw.gtu(r1:0,r3:2)
93 ; CHECK: [[P01:p[0-9]+]] = not([[P00]])
94 ; CHECK: r1:0 = mask([[P01]])
96 define <2 x i32> @test_22(<2 x i32> %a0, <2 x i32> %a1) #0 {
97 %v0 = icmp ule <2 x i32> %a0, %a1
98 %v1 = sext <2 x i1> %v0 to <2 x i32>
102 attributes #0 = { nounwind readnone }