1 # RUN: llc -march=amdgcn -run-pass none -o - %s | FileCheck %s
2 # This test verifies that the MIR parser can parse target index operands.
6 %struct.foo = type { float, [5 x i32] }
8 @float_gv = internal unnamed_addr addrspace(4) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4
10 define amdgpu_kernel void @float(float addrspace(1)* %out, i32 %index) #0 {
12 %0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
13 %1 = load float, float addrspace(4)* %0
14 store float %1, float addrspace(1)* %out
18 define amdgpu_kernel void @float2(float addrspace(1)* %out, i32 %index) #0 {
20 %0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
21 %1 = load float, float addrspace(4)* %0
22 store float %1, float addrspace(1)* %out
25 attributes #0 = { nounwind }
31 - { reg: '$sgpr0_sgpr1' }
38 $sgpr2_sgpr3 = S_GETPC_B64
39 ; CHECK: $sgpr2 = S_ADD_U32 $sgpr2, target-index(amdgpu-constdata-start), implicit-def $scc, implicit-def $scc
40 $sgpr2 = S_ADD_U32 $sgpr2, target-index(amdgpu-constdata-start), implicit-def $scc, implicit-def $scc
41 $sgpr3 = S_ADDC_U32 $sgpr3, 0, implicit-def $scc, implicit $scc, implicit-def $scc, implicit $scc
42 $sgpr4_sgpr5 = S_LSHR_B64 $sgpr2_sgpr3, 32, implicit-def dead $scc
43 $sgpr6 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 11, 0, 0
44 $sgpr7 = S_ASHR_I32 $sgpr6, 31, implicit-def dead $scc
45 $sgpr6_sgpr7 = S_LSHL_B64 $sgpr6_sgpr7, 2, implicit-def dead $scc
46 $sgpr2 = S_ADD_U32 $sgpr2, @float_gv, implicit-def $scc
47 $sgpr3 = S_ADDC_U32 $sgpr4, 0, implicit-def dead $scc, implicit $scc
48 $sgpr4 = S_ADD_U32 $sgpr2, $sgpr6, implicit-def $scc
49 $sgpr5 = S_ADDC_U32 $sgpr3, $sgpr7, implicit-def dead $scc, implicit $scc
50 $sgpr2 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 0, 0, 0
51 $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 9, 0, 0
52 $sgpr7 = S_MOV_B32 61440
54 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec
55 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec
61 - { reg: '$sgpr0_sgpr1' }
68 $sgpr2_sgpr3 = S_GETPC_B64
69 ; CHECK: $sgpr2 = S_ADD_U32 $sgpr2, target-index(amdgpu-constdata-start) + 1, implicit-def $scc, implicit-def $scc
70 $sgpr2 = S_ADD_U32 $sgpr2, target-index(amdgpu-constdata-start) + 1, implicit-def $scc, implicit-def $scc
71 $sgpr3 = S_ADDC_U32 $sgpr3, 0, implicit-def $scc, implicit $scc, implicit-def $scc, implicit $scc
72 $sgpr4_sgpr5 = S_LSHR_B64 $sgpr2_sgpr3, 32, implicit-def dead $scc
73 $sgpr6 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 11, 0, 0
74 $sgpr7 = S_ASHR_I32 $sgpr6, 31, implicit-def dead $scc
75 $sgpr6_sgpr7 = S_LSHL_B64 $sgpr6_sgpr7, 2, implicit-def dead $scc
76 $sgpr2 = S_ADD_U32 $sgpr2, @float_gv, implicit-def $scc
77 $sgpr3 = S_ADDC_U32 $sgpr4, 0, implicit-def dead $scc, implicit $scc
78 $sgpr4 = S_ADD_U32 $sgpr2, $sgpr6, implicit-def $scc
79 $sgpr5 = S_ADDC_U32 $sgpr3, $sgpr7, implicit-def dead $scc, implicit $scc
80 $sgpr2 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 0, 0, 0
81 $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 9, 0, 0
82 $sgpr7 = S_MOV_B32 61440
84 $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec
85 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec