1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
3 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
6 define void @false_s() {entry: ret void}
7 define void @true_s() {entry: ret void}
8 define void @uno_s() {entry: ret void}
9 define void @ord_s() {entry: ret void}
10 define void @oeq_s() {entry: ret void}
11 define void @une_s() {entry: ret void}
12 define void @ueq_s() {entry: ret void}
13 define void @one_s() {entry: ret void}
14 define void @olt_s() {entry: ret void}
15 define void @uge_s() {entry: ret void}
16 define void @ult_s() {entry: ret void}
17 define void @oge_s() {entry: ret void}
18 define void @ole_s() {entry: ret void}
19 define void @ugt_s() {entry: ret void}
20 define void @ule_s() {entry: ret void}
21 define void @ogt_s() {entry: ret void}
23 define void @false_d() {entry: ret void}
24 define void @true_d() {entry: ret void}
25 define void @uno_d() {entry: ret void}
26 define void @ord_d() {entry: ret void}
27 define void @oeq_d() {entry: ret void}
28 define void @une_d() {entry: ret void}
29 define void @ueq_d() {entry: ret void}
30 define void @one_d() {entry: ret void}
31 define void @olt_d() {entry: ret void}
32 define void @uge_d() {entry: ret void}
33 define void @ult_d() {entry: ret void}
34 define void @oge_d() {entry: ret void}
35 define void @ole_d() {entry: ret void}
36 define void @ugt_d() {entry: ret void}
37 define void @ule_d() {entry: ret void}
38 define void @ogt_d() {entry: ret void}
46 tracksRegLiveness: true
51 ; FP32-LABEL: name: false_s
52 ; FP32: liveins: $f12, $f14
53 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
54 ; FP32: $v0 = COPY [[ORi]]
55 ; FP32: RetRA implicit $v0
56 ; FP64-LABEL: name: false_s
57 ; FP64: liveins: $f12, $f14
58 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
59 ; FP64: $v0 = COPY [[ORi]]
60 ; FP64: RetRA implicit $v0
61 %5:gprb(s32) = G_CONSTANT i32 0
62 %4:gprb(s32) = COPY %5(s32)
72 tracksRegLiveness: true
77 ; FP32-LABEL: name: true_s
78 ; FP32: liveins: $f12, $f14
79 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65535
80 ; FP32: $v0 = COPY [[ADDiu]]
81 ; FP32: RetRA implicit $v0
82 ; FP64-LABEL: name: true_s
83 ; FP64: liveins: $f12, $f14
84 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65535
85 ; FP64: $v0 = COPY [[ADDiu]]
86 ; FP64: RetRA implicit $v0
87 %5:gprb(s32) = G_CONSTANT i32 -1
88 %4:gprb(s32) = COPY %5(s32)
98 tracksRegLiveness: true
103 ; FP32-LABEL: name: uno_s
104 ; FP32: liveins: $f12, $f14
105 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
106 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
107 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
108 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
109 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
110 ; FP32: $v0 = COPY [[MOVF_I]]
111 ; FP32: RetRA implicit $v0
112 ; FP64-LABEL: name: uno_s
113 ; FP64: liveins: $f12, $f14
114 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
115 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
116 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
117 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
118 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
119 ; FP64: $v0 = COPY [[MOVF_I]]
120 ; FP64: RetRA implicit $v0
121 %0:fprb(s32) = COPY $f12
122 %1:fprb(s32) = COPY $f14
123 %4:gprb(s32) = G_FCMP floatpred(uno), %0(s32), %1
124 %3:gprb(s32) = COPY %4(s32)
133 regBankSelected: true
134 tracksRegLiveness: true
139 ; FP32-LABEL: name: ord_s
140 ; FP32: liveins: $f12, $f14
141 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
142 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
143 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
144 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
145 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
146 ; FP32: $v0 = COPY [[MOVT_I]]
147 ; FP32: RetRA implicit $v0
148 ; FP64-LABEL: name: ord_s
149 ; FP64: liveins: $f12, $f14
150 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
151 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
152 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
153 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
154 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
155 ; FP64: $v0 = COPY [[MOVT_I]]
156 ; FP64: RetRA implicit $v0
157 %0:fprb(s32) = COPY $f12
158 %1:fprb(s32) = COPY $f14
159 %4:gprb(s32) = G_FCMP floatpred(ord), %0(s32), %1
160 %3:gprb(s32) = COPY %4(s32)
169 regBankSelected: true
170 tracksRegLiveness: true
175 ; FP32-LABEL: name: oeq_s
176 ; FP32: liveins: $f12, $f14
177 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
178 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
179 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
180 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
181 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
182 ; FP32: $v0 = COPY [[MOVF_I]]
183 ; FP32: RetRA implicit $v0
184 ; FP64-LABEL: name: oeq_s
185 ; FP64: liveins: $f12, $f14
186 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
187 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
188 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
189 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
190 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
191 ; FP64: $v0 = COPY [[MOVF_I]]
192 ; FP64: RetRA implicit $v0
193 %0:fprb(s32) = COPY $f12
194 %1:fprb(s32) = COPY $f14
195 %4:gprb(s32) = G_FCMP floatpred(oeq), %0(s32), %1
196 %3:gprb(s32) = COPY %4(s32)
205 regBankSelected: true
206 tracksRegLiveness: true
211 ; FP32-LABEL: name: une_s
212 ; FP32: liveins: $f12, $f14
213 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
214 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
215 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
216 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
217 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
218 ; FP32: $v0 = COPY [[MOVT_I]]
219 ; FP32: RetRA implicit $v0
220 ; FP64-LABEL: name: une_s
221 ; FP64: liveins: $f12, $f14
222 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
223 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
224 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
225 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
226 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
227 ; FP64: $v0 = COPY [[MOVT_I]]
228 ; FP64: RetRA implicit $v0
229 %0:fprb(s32) = COPY $f12
230 %1:fprb(s32) = COPY $f14
231 %4:gprb(s32) = G_FCMP floatpred(une), %0(s32), %1
232 %3:gprb(s32) = COPY %4(s32)
241 regBankSelected: true
242 tracksRegLiveness: true
247 ; FP32-LABEL: name: ueq_s
248 ; FP32: liveins: $f12, $f14
249 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
250 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
251 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
252 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
253 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
254 ; FP32: $v0 = COPY [[MOVF_I]]
255 ; FP32: RetRA implicit $v0
256 ; FP64-LABEL: name: ueq_s
257 ; FP64: liveins: $f12, $f14
258 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
259 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
260 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
261 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
262 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
263 ; FP64: $v0 = COPY [[MOVF_I]]
264 ; FP64: RetRA implicit $v0
265 %0:fprb(s32) = COPY $f12
266 %1:fprb(s32) = COPY $f14
267 %4:gprb(s32) = G_FCMP floatpred(ueq), %0(s32), %1
268 %3:gprb(s32) = COPY %4(s32)
277 regBankSelected: true
278 tracksRegLiveness: true
283 ; FP32-LABEL: name: one_s
284 ; FP32: liveins: $f12, $f14
285 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
286 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
287 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
288 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
289 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
290 ; FP32: $v0 = COPY [[MOVT_I]]
291 ; FP32: RetRA implicit $v0
292 ; FP64-LABEL: name: one_s
293 ; FP64: liveins: $f12, $f14
294 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
295 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
296 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
297 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
298 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
299 ; FP64: $v0 = COPY [[MOVT_I]]
300 ; FP64: RetRA implicit $v0
301 %0:fprb(s32) = COPY $f12
302 %1:fprb(s32) = COPY $f14
303 %4:gprb(s32) = G_FCMP floatpred(one), %0(s32), %1
304 %3:gprb(s32) = COPY %4(s32)
313 regBankSelected: true
314 tracksRegLiveness: true
319 ; FP32-LABEL: name: olt_s
320 ; FP32: liveins: $f12, $f14
321 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
322 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
323 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
324 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
325 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
326 ; FP32: $v0 = COPY [[MOVF_I]]
327 ; FP32: RetRA implicit $v0
328 ; FP64-LABEL: name: olt_s
329 ; FP64: liveins: $f12, $f14
330 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
331 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
332 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
333 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
334 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
335 ; FP64: $v0 = COPY [[MOVF_I]]
336 ; FP64: RetRA implicit $v0
337 %0:fprb(s32) = COPY $f12
338 %1:fprb(s32) = COPY $f14
339 %4:gprb(s32) = G_FCMP floatpred(olt), %0(s32), %1
340 %3:gprb(s32) = COPY %4(s32)
349 regBankSelected: true
350 tracksRegLiveness: true
355 ; FP32-LABEL: name: uge_s
356 ; FP32: liveins: $f12, $f14
357 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
358 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
359 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
360 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
361 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
362 ; FP32: $v0 = COPY [[MOVT_I]]
363 ; FP32: RetRA implicit $v0
364 ; FP64-LABEL: name: uge_s
365 ; FP64: liveins: $f12, $f14
366 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
367 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
368 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
369 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
370 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
371 ; FP64: $v0 = COPY [[MOVT_I]]
372 ; FP64: RetRA implicit $v0
373 %0:fprb(s32) = COPY $f12
374 %1:fprb(s32) = COPY $f14
375 %4:gprb(s32) = G_FCMP floatpred(uge), %0(s32), %1
376 %3:gprb(s32) = COPY %4(s32)
385 regBankSelected: true
386 tracksRegLiveness: true
391 ; FP32-LABEL: name: ult_s
392 ; FP32: liveins: $f12, $f14
393 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
394 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
395 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
396 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
397 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
398 ; FP32: $v0 = COPY [[MOVF_I]]
399 ; FP32: RetRA implicit $v0
400 ; FP64-LABEL: name: ult_s
401 ; FP64: liveins: $f12, $f14
402 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
403 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
404 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
405 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
406 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
407 ; FP64: $v0 = COPY [[MOVF_I]]
408 ; FP64: RetRA implicit $v0
409 %0:fprb(s32) = COPY $f12
410 %1:fprb(s32) = COPY $f14
411 %4:gprb(s32) = G_FCMP floatpred(ult), %0(s32), %1
412 %3:gprb(s32) = COPY %4(s32)
421 regBankSelected: true
422 tracksRegLiveness: true
427 ; FP32-LABEL: name: oge_s
428 ; FP32: liveins: $f12, $f14
429 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
430 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
431 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
432 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
433 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
434 ; FP32: $v0 = COPY [[MOVT_I]]
435 ; FP32: RetRA implicit $v0
436 ; FP64-LABEL: name: oge_s
437 ; FP64: liveins: $f12, $f14
438 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
439 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
440 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
441 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
442 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
443 ; FP64: $v0 = COPY [[MOVT_I]]
444 ; FP64: RetRA implicit $v0
445 %0:fprb(s32) = COPY $f12
446 %1:fprb(s32) = COPY $f14
447 %4:gprb(s32) = G_FCMP floatpred(oge), %0(s32), %1
448 %3:gprb(s32) = COPY %4(s32)
457 regBankSelected: true
458 tracksRegLiveness: true
463 ; FP32-LABEL: name: ole_s
464 ; FP32: liveins: $f12, $f14
465 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
466 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
467 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
468 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
469 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
470 ; FP32: $v0 = COPY [[MOVF_I]]
471 ; FP32: RetRA implicit $v0
472 ; FP64-LABEL: name: ole_s
473 ; FP64: liveins: $f12, $f14
474 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
475 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
476 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
477 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
478 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
479 ; FP64: $v0 = COPY [[MOVF_I]]
480 ; FP64: RetRA implicit $v0
481 %0:fprb(s32) = COPY $f12
482 %1:fprb(s32) = COPY $f14
483 %4:gprb(s32) = G_FCMP floatpred(ole), %0(s32), %1
484 %3:gprb(s32) = COPY %4(s32)
493 regBankSelected: true
494 tracksRegLiveness: true
499 ; FP32-LABEL: name: ugt_s
500 ; FP32: liveins: $f12, $f14
501 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
502 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
503 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
504 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
505 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
506 ; FP32: $v0 = COPY [[MOVT_I]]
507 ; FP32: RetRA implicit $v0
508 ; FP64-LABEL: name: ugt_s
509 ; FP64: liveins: $f12, $f14
510 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
511 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
512 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
513 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
514 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
515 ; FP64: $v0 = COPY [[MOVT_I]]
516 ; FP64: RetRA implicit $v0
517 %0:fprb(s32) = COPY $f12
518 %1:fprb(s32) = COPY $f14
519 %4:gprb(s32) = G_FCMP floatpred(ugt), %0(s32), %1
520 %3:gprb(s32) = COPY %4(s32)
529 regBankSelected: true
530 tracksRegLiveness: true
535 ; FP32-LABEL: name: ule_s
536 ; FP32: liveins: $f12, $f14
537 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
538 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
539 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
540 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
541 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
542 ; FP32: $v0 = COPY [[MOVF_I]]
543 ; FP32: RetRA implicit $v0
544 ; FP64-LABEL: name: ule_s
545 ; FP64: liveins: $f12, $f14
546 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
547 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
548 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
549 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
550 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
551 ; FP64: $v0 = COPY [[MOVF_I]]
552 ; FP64: RetRA implicit $v0
553 %0:fprb(s32) = COPY $f12
554 %1:fprb(s32) = COPY $f14
555 %4:gprb(s32) = G_FCMP floatpred(ule), %0(s32), %1
556 %3:gprb(s32) = COPY %4(s32)
565 regBankSelected: true
566 tracksRegLiveness: true
571 ; FP32-LABEL: name: ogt_s
572 ; FP32: liveins: $f12, $f14
573 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
574 ; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
575 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
576 ; FP32: FCMP_S32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
577 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
578 ; FP32: $v0 = COPY [[MOVT_I]]
579 ; FP32: RetRA implicit $v0
580 ; FP64-LABEL: name: ogt_s
581 ; FP64: liveins: $f12, $f14
582 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
583 ; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
584 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
585 ; FP64: FCMP_S32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
586 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
587 ; FP64: $v0 = COPY [[MOVT_I]]
588 ; FP64: RetRA implicit $v0
589 %0:fprb(s32) = COPY $f12
590 %1:fprb(s32) = COPY $f14
591 %4:gprb(s32) = G_FCMP floatpred(ogt), %0(s32), %1
592 %3:gprb(s32) = COPY %4(s32)
601 regBankSelected: true
602 tracksRegLiveness: true
607 ; FP32-LABEL: name: false_d
608 ; FP32: liveins: $d6, $d7
609 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
610 ; FP32: $v0 = COPY [[ORi]]
611 ; FP32: RetRA implicit $v0
612 ; FP64-LABEL: name: false_d
613 ; FP64: liveins: $d6, $d7
614 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
615 ; FP64: $v0 = COPY [[ORi]]
616 ; FP64: RetRA implicit $v0
617 %5:gprb(s32) = G_CONSTANT i32 0
618 %4:gprb(s32) = COPY %5(s32)
627 regBankSelected: true
628 tracksRegLiveness: true
633 ; FP32-LABEL: name: true_d
634 ; FP32: liveins: $d6, $d7
635 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65535
636 ; FP32: $v0 = COPY [[ADDiu]]
637 ; FP32: RetRA implicit $v0
638 ; FP64-LABEL: name: true_d
639 ; FP64: liveins: $d6, $d7
640 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 65535
641 ; FP64: $v0 = COPY [[ADDiu]]
642 ; FP64: RetRA implicit $v0
643 %5:gprb(s32) = G_CONSTANT i32 -1
644 %4:gprb(s32) = COPY %5(s32)
653 regBankSelected: true
654 tracksRegLiveness: true
659 ; FP32-LABEL: name: uno_d
660 ; FP32: liveins: $d6, $d7
661 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
662 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
663 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
664 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
665 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
666 ; FP32: $v0 = COPY [[MOVF_I]]
667 ; FP32: RetRA implicit $v0
668 ; FP64-LABEL: name: uno_d
669 ; FP64: liveins: $d6, $d7
670 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
671 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
672 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
673 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
674 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
675 ; FP64: $v0 = COPY [[MOVF_I]]
676 ; FP64: RetRA implicit $v0
677 %0:fprb(s64) = COPY $d6
678 %1:fprb(s64) = COPY $d7
679 %4:gprb(s32) = G_FCMP floatpred(uno), %0(s64), %1
680 %3:gprb(s32) = COPY %4(s32)
689 regBankSelected: true
690 tracksRegLiveness: true
695 ; FP32-LABEL: name: ord_d
696 ; FP32: liveins: $d6, $d7
697 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
698 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
699 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
700 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
701 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
702 ; FP32: $v0 = COPY [[MOVT_I]]
703 ; FP32: RetRA implicit $v0
704 ; FP64-LABEL: name: ord_d
705 ; FP64: liveins: $d6, $d7
706 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
707 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
708 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
709 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 1, implicit-def $fcc0
710 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
711 ; FP64: $v0 = COPY [[MOVT_I]]
712 ; FP64: RetRA implicit $v0
713 %0:fprb(s64) = COPY $d6
714 %1:fprb(s64) = COPY $d7
715 %4:gprb(s32) = G_FCMP floatpred(ord), %0(s64), %1
716 %3:gprb(s32) = COPY %4(s32)
725 regBankSelected: true
726 tracksRegLiveness: true
731 ; FP32-LABEL: name: oeq_d
732 ; FP32: liveins: $d6, $d7
733 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
734 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
735 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
736 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
737 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
738 ; FP32: $v0 = COPY [[MOVF_I]]
739 ; FP32: RetRA implicit $v0
740 ; FP64-LABEL: name: oeq_d
741 ; FP64: liveins: $d6, $d7
742 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
743 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
744 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
745 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
746 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
747 ; FP64: $v0 = COPY [[MOVF_I]]
748 ; FP64: RetRA implicit $v0
749 %0:fprb(s64) = COPY $d6
750 %1:fprb(s64) = COPY $d7
751 %4:gprb(s32) = G_FCMP floatpred(oeq), %0(s64), %1
752 %3:gprb(s32) = COPY %4(s32)
761 regBankSelected: true
762 tracksRegLiveness: true
767 ; FP32-LABEL: name: une_d
768 ; FP32: liveins: $d6, $d7
769 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
770 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
771 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
772 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
773 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
774 ; FP32: $v0 = COPY [[MOVT_I]]
775 ; FP32: RetRA implicit $v0
776 ; FP64-LABEL: name: une_d
777 ; FP64: liveins: $d6, $d7
778 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
779 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
780 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
781 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 2, implicit-def $fcc0
782 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
783 ; FP64: $v0 = COPY [[MOVT_I]]
784 ; FP64: RetRA implicit $v0
785 %0:fprb(s64) = COPY $d6
786 %1:fprb(s64) = COPY $d7
787 %4:gprb(s32) = G_FCMP floatpred(une), %0(s64), %1
788 %3:gprb(s32) = COPY %4(s32)
797 regBankSelected: true
798 tracksRegLiveness: true
803 ; FP32-LABEL: name: ueq_d
804 ; FP32: liveins: $d6, $d7
805 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
806 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
807 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
808 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
809 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
810 ; FP32: $v0 = COPY [[MOVF_I]]
811 ; FP32: RetRA implicit $v0
812 ; FP64-LABEL: name: ueq_d
813 ; FP64: liveins: $d6, $d7
814 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
815 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
816 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
817 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
818 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
819 ; FP64: $v0 = COPY [[MOVF_I]]
820 ; FP64: RetRA implicit $v0
821 %0:fprb(s64) = COPY $d6
822 %1:fprb(s64) = COPY $d7
823 %4:gprb(s32) = G_FCMP floatpred(ueq), %0(s64), %1
824 %3:gprb(s32) = COPY %4(s32)
833 regBankSelected: true
834 tracksRegLiveness: true
839 ; FP32-LABEL: name: one_d
840 ; FP32: liveins: $d6, $d7
841 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
842 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
843 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
844 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
845 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
846 ; FP32: $v0 = COPY [[MOVT_I]]
847 ; FP32: RetRA implicit $v0
848 ; FP64-LABEL: name: one_d
849 ; FP64: liveins: $d6, $d7
850 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
851 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
852 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
853 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 3, implicit-def $fcc0
854 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
855 ; FP64: $v0 = COPY [[MOVT_I]]
856 ; FP64: RetRA implicit $v0
857 %0:fprb(s64) = COPY $d6
858 %1:fprb(s64) = COPY $d7
859 %4:gprb(s32) = G_FCMP floatpred(one), %0(s64), %1
860 %3:gprb(s32) = COPY %4(s32)
869 regBankSelected: true
870 tracksRegLiveness: true
875 ; FP32-LABEL: name: olt_d
876 ; FP32: liveins: $d6, $d7
877 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
878 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
879 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
880 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
881 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
882 ; FP32: $v0 = COPY [[MOVF_I]]
883 ; FP32: RetRA implicit $v0
884 ; FP64-LABEL: name: olt_d
885 ; FP64: liveins: $d6, $d7
886 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
887 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
888 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
889 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
890 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
891 ; FP64: $v0 = COPY [[MOVF_I]]
892 ; FP64: RetRA implicit $v0
893 %0:fprb(s64) = COPY $d6
894 %1:fprb(s64) = COPY $d7
895 %4:gprb(s32) = G_FCMP floatpred(olt), %0(s64), %1
896 %3:gprb(s32) = COPY %4(s32)
905 regBankSelected: true
906 tracksRegLiveness: true
911 ; FP32-LABEL: name: uge_d
912 ; FP32: liveins: $d6, $d7
913 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
914 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
915 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
916 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
917 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
918 ; FP32: $v0 = COPY [[MOVT_I]]
919 ; FP32: RetRA implicit $v0
920 ; FP64-LABEL: name: uge_d
921 ; FP64: liveins: $d6, $d7
922 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
923 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
924 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
925 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 4, implicit-def $fcc0
926 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
927 ; FP64: $v0 = COPY [[MOVT_I]]
928 ; FP64: RetRA implicit $v0
929 %0:fprb(s64) = COPY $d6
930 %1:fprb(s64) = COPY $d7
931 %4:gprb(s32) = G_FCMP floatpred(uge), %0(s64), %1
932 %3:gprb(s32) = COPY %4(s32)
941 regBankSelected: true
942 tracksRegLiveness: true
947 ; FP32-LABEL: name: ult_d
948 ; FP32: liveins: $d6, $d7
949 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
950 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
951 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
952 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
953 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
954 ; FP32: $v0 = COPY [[MOVF_I]]
955 ; FP32: RetRA implicit $v0
956 ; FP64-LABEL: name: ult_d
957 ; FP64: liveins: $d6, $d7
958 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
959 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
960 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
961 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
962 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
963 ; FP64: $v0 = COPY [[MOVF_I]]
964 ; FP64: RetRA implicit $v0
965 %0:fprb(s64) = COPY $d6
966 %1:fprb(s64) = COPY $d7
967 %4:gprb(s32) = G_FCMP floatpred(ult), %0(s64), %1
968 %3:gprb(s32) = COPY %4(s32)
977 regBankSelected: true
978 tracksRegLiveness: true
983 ; FP32-LABEL: name: oge_d
984 ; FP32: liveins: $d6, $d7
985 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
986 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
987 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
988 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
989 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
990 ; FP32: $v0 = COPY [[MOVT_I]]
991 ; FP32: RetRA implicit $v0
992 ; FP64-LABEL: name: oge_d
993 ; FP64: liveins: $d6, $d7
994 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
995 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
996 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
997 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 5, implicit-def $fcc0
998 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
999 ; FP64: $v0 = COPY [[MOVT_I]]
1000 ; FP64: RetRA implicit $v0
1001 %0:fprb(s64) = COPY $d6
1002 %1:fprb(s64) = COPY $d7
1003 %4:gprb(s32) = G_FCMP floatpred(oge), %0(s64), %1
1004 %3:gprb(s32) = COPY %4(s32)
1013 regBankSelected: true
1014 tracksRegLiveness: true
1019 ; FP32-LABEL: name: ole_d
1020 ; FP32: liveins: $d6, $d7
1021 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
1022 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
1023 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1024 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
1025 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
1026 ; FP32: $v0 = COPY [[MOVF_I]]
1027 ; FP32: RetRA implicit $v0
1028 ; FP64-LABEL: name: ole_d
1029 ; FP64: liveins: $d6, $d7
1030 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
1031 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
1032 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1033 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
1034 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
1035 ; FP64: $v0 = COPY [[MOVF_I]]
1036 ; FP64: RetRA implicit $v0
1037 %0:fprb(s64) = COPY $d6
1038 %1:fprb(s64) = COPY $d7
1039 %4:gprb(s32) = G_FCMP floatpred(ole), %0(s64), %1
1040 %3:gprb(s32) = COPY %4(s32)
1049 regBankSelected: true
1050 tracksRegLiveness: true
1055 ; FP32-LABEL: name: ugt_d
1056 ; FP32: liveins: $d6, $d7
1057 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
1058 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
1059 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1060 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
1061 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
1062 ; FP32: $v0 = COPY [[MOVT_I]]
1063 ; FP32: RetRA implicit $v0
1064 ; FP64-LABEL: name: ugt_d
1065 ; FP64: liveins: $d6, $d7
1066 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
1067 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
1068 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1069 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 6, implicit-def $fcc0
1070 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
1071 ; FP64: $v0 = COPY [[MOVT_I]]
1072 ; FP64: RetRA implicit $v0
1073 %0:fprb(s64) = COPY $d6
1074 %1:fprb(s64) = COPY $d7
1075 %4:gprb(s32) = G_FCMP floatpred(ugt), %0(s64), %1
1076 %3:gprb(s32) = COPY %4(s32)
1085 regBankSelected: true
1086 tracksRegLiveness: true
1091 ; FP32-LABEL: name: ule_d
1092 ; FP32: liveins: $d6, $d7
1093 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
1094 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
1095 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1096 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
1097 ; FP32: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
1098 ; FP32: $v0 = COPY [[MOVF_I]]
1099 ; FP32: RetRA implicit $v0
1100 ; FP64-LABEL: name: ule_d
1101 ; FP64: liveins: $d6, $d7
1102 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
1103 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
1104 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1105 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
1106 ; FP64: [[MOVF_I:%[0-9]+]]:gpr32 = MOVF_I $zero, $fcc0, [[ADDiu]]
1107 ; FP64: $v0 = COPY [[MOVF_I]]
1108 ; FP64: RetRA implicit $v0
1109 %0:fprb(s64) = COPY $d6
1110 %1:fprb(s64) = COPY $d7
1111 %4:gprb(s32) = G_FCMP floatpred(ule), %0(s64), %1
1112 %3:gprb(s32) = COPY %4(s32)
1121 regBankSelected: true
1122 tracksRegLiveness: true
1127 ; FP32-LABEL: name: ogt_d
1128 ; FP32: liveins: $d6, $d7
1129 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
1130 ; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
1131 ; FP32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1132 ; FP32: FCMP_D32 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
1133 ; FP32: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
1134 ; FP32: $v0 = COPY [[MOVT_I]]
1135 ; FP32: RetRA implicit $v0
1136 ; FP64-LABEL: name: ogt_d
1137 ; FP64: liveins: $d6, $d7
1138 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
1139 ; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
1140 ; FP64: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 1
1141 ; FP64: FCMP_D64 [[COPY]], [[COPY1]], 7, implicit-def $fcc0
1142 ; FP64: [[MOVT_I:%[0-9]+]]:gpr32 = MOVT_I $zero, $fcc0, [[ADDiu]]
1143 ; FP64: $v0 = COPY [[MOVT_I]]
1144 ; FP64: RetRA implicit $v0
1145 %0:fprb(s64) = COPY $d6
1146 %1:fprb(s64) = COPY $d7
1147 %4:gprb(s32) = G_FCMP floatpred(ogt), %0(s64), %1
1148 %3:gprb(s32) = COPY %4(s32)