1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=mips-mti-linux-gnu -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS
3 # RUN: llc -mtriple=mips-mti-linux-gnu -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
5 # Test the long branch expansion of various branches
8 define void @expand_BEQ(i1 %a) {
9 br i1 %a, label %iftrue, label %tail
12 call void asm sideeffect ".space 131068", ""()
19 define void @expand_BGEZ(i1 %a) {
20 br i1 %a, label %iftrue, label %tail
23 call void asm sideeffect ".space 131068", ""()
30 define void @expand_BGTZ(i1 %a) {
31 br i1 %a, label %iftrue, label %tail
34 call void asm sideeffect ".space 131068", ""()
41 define void @expand_BLEZ(i1 %a) {
42 br i1 %a, label %iftrue, label %tail
45 call void asm sideeffect ".space 131068", ""()
52 define void @expand_BLTZ(i1 %a) {
53 br i1 %a, label %iftrue, label %tail
56 call void asm sideeffect ".space 131068", ""()
63 define void @expand_BNE(i1 %a) {
64 br i1 %a, label %iftrue, label %tail
67 call void asm sideeffect ".space 131068", ""()
79 exposesReturnsTwice: false
81 regBankSelected: false
84 tracksRegLiveness: true
87 - { reg: '$a0', virtual-reg: '' }
89 isFrameAddressTaken: false
90 isReturnAddressTaken: false
100 hasOpaqueSPAdjustment: false
102 hasMustTailInVarArgFunc: false
110 ; MIPS-LABEL: name: expand_BEQ
111 ; MIPS: bb.0 (%ir-block.0):
112 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
113 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
114 ; MIPS: BNE $at, $zero, %bb.2, implicit-def $at {
117 ; MIPS: bb.1 (%ir-block.0):
118 ; MIPS: successors: %bb.3(0x80000000)
119 ; MIPS: J %bb.3, implicit-def $at {
123 ; MIPS: successors: %bb.3(0x80000000)
124 ; MIPS: INLINEASM &".space 131068", 1
126 ; MIPS: PseudoReturn undef $ra {
129 ; PIC-LABEL: name: expand_BEQ
130 ; PIC: bb.0 (%ir-block.0):
131 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
132 ; PIC: renamable $at = ANDi killed renamable $a0, 1
133 ; PIC: BNE $at, $zero, %bb.3, implicit-def $at {
136 ; PIC: bb.1 (%ir-block.0):
137 ; PIC: successors: %bb.2(0x80000000)
138 ; PIC: $sp = ADDiu $sp, -8
139 ; PIC: SW $ra, $sp, 0
140 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
141 ; PIC: BAL_BR %bb.2, implicit-def $ra {
142 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
144 ; PIC: bb.2 (%ir-block.0):
145 ; PIC: successors: %bb.4(0x80000000)
146 ; PIC: $at = ADDu $ra, $at
147 ; PIC: $ra = LW $sp, 0
149 ; PIC: $sp = ADDiu $sp, 8
152 ; PIC: successors: %bb.4(0x80000000)
153 ; PIC: INLINEASM &".space 131068", 1
155 ; PIC: PseudoReturn undef $ra {
159 successors: %bb.1(0x40000000), %bb.2(0x40000000)
162 renamable $at = ANDi killed renamable $a0, 1
163 BEQ killed renamable $at, $zero, %bb.2, implicit-def $at
166 successors: %bb.2(0x80000000)
168 INLINEASM &".space 131068", 1
171 PseudoReturn undef $ra
178 exposesReturnsTwice: false
180 regBankSelected: false
183 tracksRegLiveness: true
186 - { reg: '$a0', virtual-reg: '' }
188 isFrameAddressTaken: false
189 isReturnAddressTaken: false
199 hasOpaqueSPAdjustment: false
201 hasMustTailInVarArgFunc: false
209 ; MIPS-LABEL: name: expand_BGEZ
210 ; MIPS: bb.0 (%ir-block.0):
211 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
212 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
213 ; MIPS: BLTZ $at, %bb.2, implicit-def $at {
216 ; MIPS: bb.1 (%ir-block.0):
217 ; MIPS: successors: %bb.3(0x80000000)
218 ; MIPS: J %bb.3, implicit-def $at {
222 ; MIPS: successors: %bb.3(0x80000000)
223 ; MIPS: INLINEASM &".space 131068", 1
225 ; MIPS: PseudoReturn undef $ra {
228 ; PIC-LABEL: name: expand_BGEZ
229 ; PIC: bb.0 (%ir-block.0):
230 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
231 ; PIC: renamable $at = ANDi killed renamable $a0, 1
232 ; PIC: BLTZ $at, %bb.3, implicit-def $at {
235 ; PIC: bb.1 (%ir-block.0):
236 ; PIC: successors: %bb.2(0x80000000)
237 ; PIC: $sp = ADDiu $sp, -8
238 ; PIC: SW $ra, $sp, 0
239 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
240 ; PIC: BAL_BR %bb.2, implicit-def $ra {
241 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
243 ; PIC: bb.2 (%ir-block.0):
244 ; PIC: successors: %bb.4(0x80000000)
245 ; PIC: $at = ADDu $ra, $at
246 ; PIC: $ra = LW $sp, 0
248 ; PIC: $sp = ADDiu $sp, 8
251 ; PIC: successors: %bb.4(0x80000000)
252 ; PIC: INLINEASM &".space 131068", 1
254 ; PIC: PseudoReturn undef $ra {
258 successors: %bb.1(0x40000000), %bb.2(0x40000000)
261 renamable $at = ANDi killed renamable $a0, 1
262 BGEZ killed renamable $at, %bb.2, implicit-def $at
265 successors: %bb.2(0x80000000)
267 INLINEASM &".space 131068", 1
270 PseudoReturn undef $ra
277 exposesReturnsTwice: false
279 regBankSelected: false
282 tracksRegLiveness: true
285 - { reg: '$a0', virtual-reg: '' }
287 isFrameAddressTaken: false
288 isReturnAddressTaken: false
298 hasOpaqueSPAdjustment: false
300 hasMustTailInVarArgFunc: false
308 ; MIPS-LABEL: name: expand_BGTZ
309 ; MIPS: bb.0 (%ir-block.0):
310 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
311 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
312 ; MIPS: BLEZ $at, %bb.2, implicit-def $at {
315 ; MIPS: bb.1 (%ir-block.0):
316 ; MIPS: successors: %bb.3(0x80000000)
317 ; MIPS: J %bb.3, implicit-def $at {
321 ; MIPS: successors: %bb.3(0x80000000)
322 ; MIPS: INLINEASM &".space 131068", 1
324 ; MIPS: PseudoReturn undef $ra {
327 ; PIC-LABEL: name: expand_BGTZ
328 ; PIC: bb.0 (%ir-block.0):
329 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
330 ; PIC: renamable $at = ANDi killed renamable $a0, 1
331 ; PIC: BLEZ $at, %bb.3, implicit-def $at {
334 ; PIC: bb.1 (%ir-block.0):
335 ; PIC: successors: %bb.2(0x80000000)
336 ; PIC: $sp = ADDiu $sp, -8
337 ; PIC: SW $ra, $sp, 0
338 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
339 ; PIC: BAL_BR %bb.2, implicit-def $ra {
340 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
342 ; PIC: bb.2 (%ir-block.0):
343 ; PIC: successors: %bb.4(0x80000000)
344 ; PIC: $at = ADDu $ra, $at
345 ; PIC: $ra = LW $sp, 0
347 ; PIC: $sp = ADDiu $sp, 8
350 ; PIC: successors: %bb.4(0x80000000)
351 ; PIC: INLINEASM &".space 131068", 1
353 ; PIC: PseudoReturn undef $ra {
357 successors: %bb.1(0x40000000), %bb.2(0x40000000)
360 renamable $at = ANDi killed renamable $a0, 1
361 BGTZ killed renamable $at, %bb.2, implicit-def $at
364 successors: %bb.2(0x80000000)
366 INLINEASM &".space 131068", 1
369 PseudoReturn undef $ra
376 exposesReturnsTwice: false
378 regBankSelected: false
381 tracksRegLiveness: true
384 - { reg: '$a0', virtual-reg: '' }
386 isFrameAddressTaken: false
387 isReturnAddressTaken: false
397 hasOpaqueSPAdjustment: false
399 hasMustTailInVarArgFunc: false
407 ; MIPS-LABEL: name: expand_BLEZ
408 ; MIPS: bb.0 (%ir-block.0):
409 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
410 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
411 ; MIPS: BGTZ $at, %bb.2, implicit-def $at {
414 ; MIPS: bb.1 (%ir-block.0):
415 ; MIPS: successors: %bb.3(0x80000000)
416 ; MIPS: J %bb.3, implicit-def $at {
420 ; MIPS: successors: %bb.3(0x80000000)
421 ; MIPS: INLINEASM &".space 131068", 1
423 ; MIPS: PseudoReturn undef $ra {
426 ; PIC-LABEL: name: expand_BLEZ
427 ; PIC: bb.0 (%ir-block.0):
428 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
429 ; PIC: renamable $at = ANDi killed renamable $a0, 1
430 ; PIC: BGTZ $at, %bb.3, implicit-def $at {
433 ; PIC: bb.1 (%ir-block.0):
434 ; PIC: successors: %bb.2(0x80000000)
435 ; PIC: $sp = ADDiu $sp, -8
436 ; PIC: SW $ra, $sp, 0
437 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
438 ; PIC: BAL_BR %bb.2, implicit-def $ra {
439 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
441 ; PIC: bb.2 (%ir-block.0):
442 ; PIC: successors: %bb.4(0x80000000)
443 ; PIC: $at = ADDu $ra, $at
444 ; PIC: $ra = LW $sp, 0
446 ; PIC: $sp = ADDiu $sp, 8
449 ; PIC: successors: %bb.4(0x80000000)
450 ; PIC: INLINEASM &".space 131068", 1
452 ; PIC: PseudoReturn undef $ra {
456 successors: %bb.1(0x40000000), %bb.2(0x40000000)
459 renamable $at = ANDi killed renamable $a0, 1
460 BLEZ killed renamable $at, %bb.2, implicit-def $at
463 successors: %bb.2(0x80000000)
465 INLINEASM &".space 131068", 1
468 PseudoReturn undef $ra
475 exposesReturnsTwice: false
477 regBankSelected: false
480 tracksRegLiveness: true
483 - { reg: '$a0', virtual-reg: '' }
485 isFrameAddressTaken: false
486 isReturnAddressTaken: false
496 hasOpaqueSPAdjustment: false
498 hasMustTailInVarArgFunc: false
506 ; MIPS-LABEL: name: expand_BLTZ
507 ; MIPS: bb.0 (%ir-block.0):
508 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
509 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
510 ; MIPS: BGEZ $at, %bb.2, implicit-def $at {
513 ; MIPS: bb.1 (%ir-block.0):
514 ; MIPS: successors: %bb.3(0x80000000)
515 ; MIPS: J %bb.3, implicit-def $at {
519 ; MIPS: successors: %bb.3(0x80000000)
520 ; MIPS: INLINEASM &".space 131068", 1
522 ; MIPS: PseudoReturn undef $ra {
525 ; PIC-LABEL: name: expand_BLTZ
526 ; PIC: bb.0 (%ir-block.0):
527 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
528 ; PIC: renamable $at = ANDi killed renamable $a0, 1
529 ; PIC: BGEZ $at, %bb.3, implicit-def $at {
532 ; PIC: bb.1 (%ir-block.0):
533 ; PIC: successors: %bb.2(0x80000000)
534 ; PIC: $sp = ADDiu $sp, -8
535 ; PIC: SW $ra, $sp, 0
536 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
537 ; PIC: BAL_BR %bb.2, implicit-def $ra {
538 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
540 ; PIC: bb.2 (%ir-block.0):
541 ; PIC: successors: %bb.4(0x80000000)
542 ; PIC: $at = ADDu $ra, $at
543 ; PIC: $ra = LW $sp, 0
545 ; PIC: $sp = ADDiu $sp, 8
548 ; PIC: successors: %bb.4(0x80000000)
549 ; PIC: INLINEASM &".space 131068", 1
551 ; PIC: PseudoReturn undef $ra {
555 successors: %bb.1(0x40000000), %bb.2(0x40000000)
558 renamable $at = ANDi killed renamable $a0, 1
559 BLTZ killed renamable $at, %bb.2, implicit-def $at
562 successors: %bb.2(0x80000000)
564 INLINEASM &".space 131068", 1
567 PseudoReturn undef $ra
574 exposesReturnsTwice: false
576 regBankSelected: false
579 tracksRegLiveness: true
582 - { reg: '$a0', virtual-reg: '' }
584 isFrameAddressTaken: false
585 isReturnAddressTaken: false
595 hasOpaqueSPAdjustment: false
597 hasMustTailInVarArgFunc: false
605 ; MIPS-LABEL: name: expand_BNE
606 ; MIPS: bb.0 (%ir-block.0):
607 ; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
608 ; MIPS: renamable $at = ANDi killed renamable $a0, 1
609 ; MIPS: BEQ $at, $zero, %bb.2, implicit-def $at {
612 ; MIPS: bb.1 (%ir-block.0):
613 ; MIPS: successors: %bb.3(0x80000000)
614 ; MIPS: J %bb.3, implicit-def $at {
618 ; MIPS: successors: %bb.3(0x80000000)
619 ; MIPS: INLINEASM &".space 131068", 1
621 ; MIPS: PseudoReturn undef $ra {
624 ; PIC-LABEL: name: expand_BNE
625 ; PIC: bb.0 (%ir-block.0):
626 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
627 ; PIC: renamable $at = ANDi killed renamable $a0, 1
628 ; PIC: BEQ $at, $zero, %bb.3, implicit-def $at {
631 ; PIC: bb.1 (%ir-block.0):
632 ; PIC: successors: %bb.2(0x80000000)
633 ; PIC: $sp = ADDiu $sp, -8
634 ; PIC: SW $ra, $sp, 0
635 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
636 ; PIC: BAL_BR %bb.2, implicit-def $ra {
637 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
639 ; PIC: bb.2 (%ir-block.0):
640 ; PIC: successors: %bb.4(0x80000000)
641 ; PIC: $at = ADDu $ra, $at
642 ; PIC: $ra = LW $sp, 0
644 ; PIC: $sp = ADDiu $sp, 8
647 ; PIC: successors: %bb.4(0x80000000)
648 ; PIC: INLINEASM &".space 131068", 1
650 ; PIC: PseudoReturn undef $ra {
654 successors: %bb.1(0x40000000), %bb.2(0x40000000)
657 renamable $at = ANDi killed renamable $a0, 1
658 BNE killed renamable $at, $zero, %bb.2, implicit-def $at
661 successors: %bb.2(0x80000000)
663 INLINEASM &".space 131068", 1
666 PseudoReturn undef $ra