1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O3 -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 -run-pass=ppc-mi-peepholes \
3 # RUN: -simplify-mir %s -o - | FileCheck %s
7 tracksRegLiveness: true
9 ; CHECK-LABEL: name: poc
11 ; CHECK: successors: %bb.1, %bb.2
12 ; CHECK: liveins: $x3, $x4, $x5, $x6
13 ; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x6
14 ; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x5
15 ; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x4
16 ; CHECK: [[COPY3:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
17 ; CHECK: [[ANDIo8_:%[0-9]+]]:g8rc = ANDIo8 [[COPY1]], 1, implicit-def $cr0
18 ; CHECK: [[COPY4:%[0-9]+]]:crbitrc = COPY $cr0gt
19 ; CHECK: BCn killed [[COPY4]], %bb.2
23 ; CHECK: [[EXTSW:%[0-9]+]]:g8rc = EXTSW $x3
24 ; CHECK: [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[ANDIo8_]], 2, 61
25 ; CHECK: $x3 = COPY [[RLDICR]]
26 ; CHECK: [[RLDICR1:%[0-9]+]]:g8rc = RLDICR [[EXTSW]], 2, 61
27 ; CHECK: [[ADD8_:%[0-9]+]]:g8rc = ADD8 [[COPY3]], [[RLDICR1]]
28 ; CHECK: $x3 = COPY [[ADD8_]]
29 ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
31 ; CHECK: [[COPY5:%[0-9]+]]:gprc = COPY [[COPY]].sub_32
32 ; CHECK: [[DEF:%[0-9]+]]:g8rc = IMPLICIT_DEF
33 ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:g8rc = INSERT_SUBREG [[DEF]], [[COPY5]], %subreg.sub_32
34 ; CHECK: $x3 = COPY [[INSERT_SUBREG]]
35 ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
37 successors: %bb.1, %bb.2
38 liveins: $x3, $x4, $x5, $x6
43 %1:g8rc_and_g8rc_nox0 = COPY $x3
44 %11:g8rc = ANDIo8 %3, 1, implicit-def $cr0
45 %6:crbitrc = COPY $cr0gt
53 %12:g8rc = RLDICR %11, 2, 61
55 %9:g8rc = RLDICR %0, 2, 61
56 %10:g8rc = ADD8 %1, %9
58 BLR8 implicit $lr8, implicit $rm, implicit $x3
61 %5:gprc = COPY %4.sub_32
62 %8:g8rc = IMPLICIT_DEF
63 %7:g8rc = INSERT_SUBREG %8, %5, %subreg.sub_32
65 BLR8 implicit $lr8, implicit $rm, implicit $x3