| blob | 3089add42298606fef8a35d2f2866919e6588db5 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse | FileCheck %s --check-prefixes=X64,X64-SSE
3 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck %s --check-prefixes=X64,X64-SSE
4 ; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X32
5 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX
6 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX
7 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
8 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
10 ; Check soft floating point conversion function calls.
12 @vi32 = common global i32 0, align 4
13 @vi64 = common global i64 0, align 8
14 @vi128 = common global i128 0, align 16
15 @vu32 = common global i32 0, align 4
16 @vu64 = common global i64 0, align 8
17 @vu128 = common global i128 0, align 16
18 @vf32 = common global float 0.000000e+00, align 4
19 @vf64 = common global double 0.000000e+00, align 8
20 @vf80 = common global x86_fp80 0xK00000000000000000000, align 8
21 @vf128 = common global fp128 0xL00000000000000000000000000000000, align 16
23 define void @TestFPExtF32_F128() nounwind {
24 ; X64-SSE-LABEL: TestFPExtF32_F128:
25 ; X64-SSE: # %bb.0: # %entry
26 ; X64-SSE-NEXT: pushq %rax
27 ; X64-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
28 ; X64-SSE-NEXT: callq __extendsftf2
29 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
30 ; X64-SSE-NEXT: popq %rax
31 ; X64-SSE-NEXT: retq
32 ;
33 ; X32-LABEL: TestFPExtF32_F128:
34 ; X32: # %bb.0: # %entry
35 ; X32-NEXT: pushl %esi
36 ; X32-NEXT: subl $24, %esp
37 ; X32-NEXT: flds vf32
38 ; X32-NEXT: fstps {{[0-9]+}}(%esp)
39 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
40 ; X32-NEXT: movl %eax, (%esp)
41 ; X32-NEXT: calll __extendsftf2
42 ; X32-NEXT: subl $4, %esp
43 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
44 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
45 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
46 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
47 ; X32-NEXT: movl %esi, vf128+12
48 ; X32-NEXT: movl %edx, vf128+8
49 ; X32-NEXT: movl %ecx, vf128+4
50 ; X32-NEXT: movl %eax, vf128
51 ; X32-NEXT: addl $24, %esp
52 ; X32-NEXT: popl %esi
53 ; X32-NEXT: retl
54 ;
55 ; X64-AVX-LABEL: TestFPExtF32_F128:
56 ; X64-AVX: # %bb.0: # %entry
57 ; X64-AVX-NEXT: pushq %rax
58 ; X64-AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
59 ; X64-AVX-NEXT: callq __extendsftf2
60 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
61 ; X64-AVX-NEXT: popq %rax
62 ; X64-AVX-NEXT: retq
63 entry:
64 %0 = load float, float* @vf32, align 4
65 %conv = fpext float %0 to fp128
66 store fp128 %conv, fp128* @vf128, align 16
67 ret void
68 }
70 define void @TestFPExtF64_F128() nounwind {
71 ; X64-SSE-LABEL: TestFPExtF64_F128:
72 ; X64-SSE: # %bb.0: # %entry
73 ; X64-SSE-NEXT: pushq %rax
74 ; X64-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
75 ; X64-SSE-NEXT: callq __extenddftf2
76 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
77 ; X64-SSE-NEXT: popq %rax
78 ; X64-SSE-NEXT: retq
79 ;
80 ; X32-LABEL: TestFPExtF64_F128:
81 ; X32: # %bb.0: # %entry
82 ; X32-NEXT: pushl %esi
83 ; X32-NEXT: subl $40, %esp
84 ; X32-NEXT: fldl vf64
85 ; X32-NEXT: fstpl {{[0-9]+}}(%esp)
86 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
87 ; X32-NEXT: movl %eax, (%esp)
88 ; X32-NEXT: calll __extenddftf2
89 ; X32-NEXT: subl $4, %esp
90 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
91 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
92 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
93 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
94 ; X32-NEXT: movl %esi, vf128+12
95 ; X32-NEXT: movl %edx, vf128+8
96 ; X32-NEXT: movl %ecx, vf128+4
97 ; X32-NEXT: movl %eax, vf128
98 ; X32-NEXT: addl $40, %esp
99 ; X32-NEXT: popl %esi
100 ; X32-NEXT: retl
101 ;
102 ; X64-AVX-LABEL: TestFPExtF64_F128:
103 ; X64-AVX: # %bb.0: # %entry
104 ; X64-AVX-NEXT: pushq %rax
105 ; X64-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
106 ; X64-AVX-NEXT: callq __extenddftf2
107 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
108 ; X64-AVX-NEXT: popq %rax
109 ; X64-AVX-NEXT: retq
110 entry:
111 %0 = load double, double* @vf64, align 8
112 %conv = fpext double %0 to fp128
113 store fp128 %conv, fp128* @vf128, align 16
114 ret void
115 }
117 define void @TestFPExtF80_F128() nounwind {
118 ; X64-SSE-LABEL: TestFPExtF80_F128:
119 ; X64-SSE: # %bb.0: # %entry
120 ; X64-SSE-NEXT: subq $24, %rsp
121 ; X64-SSE-NEXT: fldt {{.*}}(%rip)
122 ; X64-SSE-NEXT: fstpt (%rsp)
123 ; X64-SSE-NEXT: callq __extendxftf2
124 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
125 ; X64-SSE-NEXT: addq $24, %rsp
126 ; X64-SSE-NEXT: retq
127 ;
128 ; X32-LABEL: TestFPExtF80_F128:
129 ; X32: # %bb.0: # %entry
130 ; X32-NEXT: pushl %esi
131 ; X32-NEXT: subl $40, %esp
132 ; X32-NEXT: fldt vf80
133 ; X32-NEXT: fstpt {{[0-9]+}}(%esp)
134 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
135 ; X32-NEXT: movl %eax, (%esp)
136 ; X32-NEXT: calll __extendxftf2
137 ; X32-NEXT: subl $4, %esp
138 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
139 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
140 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
141 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
142 ; X32-NEXT: movl %esi, vf128+12
143 ; X32-NEXT: movl %edx, vf128+8
144 ; X32-NEXT: movl %ecx, vf128+4
145 ; X32-NEXT: movl %eax, vf128
146 ; X32-NEXT: addl $40, %esp
147 ; X32-NEXT: popl %esi
148 ; X32-NEXT: retl
149 ;
150 ; X64-AVX-LABEL: TestFPExtF80_F128:
151 ; X64-AVX: # %bb.0: # %entry
152 ; X64-AVX-NEXT: subq $24, %rsp
153 ; X64-AVX-NEXT: fldt {{.*}}(%rip)
154 ; X64-AVX-NEXT: fstpt (%rsp)
155 ; X64-AVX-NEXT: callq __extendxftf2
156 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
157 ; X64-AVX-NEXT: addq $24, %rsp
158 ; X64-AVX-NEXT: retq
159 entry:
160 %0 = load x86_fp80, x86_fp80* @vf80, align 8
161 %conv = fpext x86_fp80 %0 to fp128
162 store fp128 %conv, fp128* @vf128, align 16
163 ret void
164 }
166 define void @TestFPToSIF128_I32() nounwind {
167 ; X64-SSE-LABEL: TestFPToSIF128_I32:
168 ; X64-SSE: # %bb.0: # %entry
169 ; X64-SSE-NEXT: pushq %rax
170 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
171 ; X64-SSE-NEXT: callq __fixtfsi
172 ; X64-SSE-NEXT: movl %eax, {{.*}}(%rip)
173 ; X64-SSE-NEXT: popq %rax
174 ; X64-SSE-NEXT: retq
175 ;
176 ; X32-LABEL: TestFPToSIF128_I32:
177 ; X32: # %bb.0: # %entry
178 ; X32-NEXT: subl $12, %esp
179 ; X32-NEXT: pushl vf128+12
180 ; X32-NEXT: pushl vf128+8
181 ; X32-NEXT: pushl vf128+4
182 ; X32-NEXT: pushl vf128
183 ; X32-NEXT: calll __fixtfsi
184 ; X32-NEXT: addl $16, %esp
185 ; X32-NEXT: movl %eax, vi32
186 ; X32-NEXT: addl $12, %esp
187 ; X32-NEXT: retl
188 ;
189 ; X64-AVX-LABEL: TestFPToSIF128_I32:
190 ; X64-AVX: # %bb.0: # %entry
191 ; X64-AVX-NEXT: pushq %rax
192 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
193 ; X64-AVX-NEXT: callq __fixtfsi
194 ; X64-AVX-NEXT: movl %eax, {{.*}}(%rip)
195 ; X64-AVX-NEXT: popq %rax
196 ; X64-AVX-NEXT: retq
197 entry:
198 %0 = load fp128, fp128* @vf128, align 16
199 %conv = fptosi fp128 %0 to i32
200 store i32 %conv, i32* @vi32, align 4
201 ret void
202 }
204 define void @TestFPToUIF128_U32() nounwind {
205 ; X64-SSE-LABEL: TestFPToUIF128_U32:
206 ; X64-SSE: # %bb.0: # %entry
207 ; X64-SSE-NEXT: pushq %rax
208 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
209 ; X64-SSE-NEXT: callq __fixunstfsi
210 ; X64-SSE-NEXT: movl %eax, {{.*}}(%rip)
211 ; X64-SSE-NEXT: popq %rax
212 ; X64-SSE-NEXT: retq
213 ;
214 ; X32-LABEL: TestFPToUIF128_U32:
215 ; X32: # %bb.0: # %entry
216 ; X32-NEXT: subl $12, %esp
217 ; X32-NEXT: pushl vf128+12
218 ; X32-NEXT: pushl vf128+8
219 ; X32-NEXT: pushl vf128+4
220 ; X32-NEXT: pushl vf128
221 ; X32-NEXT: calll __fixunstfsi
222 ; X32-NEXT: addl $16, %esp
223 ; X32-NEXT: movl %eax, vu32
224 ; X32-NEXT: addl $12, %esp
225 ; X32-NEXT: retl
226 ;
227 ; X64-AVX-LABEL: TestFPToUIF128_U32:
228 ; X64-AVX: # %bb.0: # %entry
229 ; X64-AVX-NEXT: pushq %rax
230 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
231 ; X64-AVX-NEXT: callq __fixunstfsi
232 ; X64-AVX-NEXT: movl %eax, {{.*}}(%rip)
233 ; X64-AVX-NEXT: popq %rax
234 ; X64-AVX-NEXT: retq
235 entry:
236 %0 = load fp128, fp128* @vf128, align 16
237 %conv = fptoui fp128 %0 to i32
238 store i32 %conv, i32* @vu32, align 4
239 ret void
240 }
242 define void @TestFPToSIF128_I64() nounwind {
243 ; X64-SSE-LABEL: TestFPToSIF128_I64:
244 ; X64-SSE: # %bb.0: # %entry
245 ; X64-SSE-NEXT: pushq %rax
246 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
247 ; X64-SSE-NEXT: callq __fixtfsi
248 ; X64-SSE-NEXT: cltq
249 ; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
250 ; X64-SSE-NEXT: popq %rax
251 ; X64-SSE-NEXT: retq
252 ;
253 ; X32-LABEL: TestFPToSIF128_I64:
254 ; X32: # %bb.0: # %entry
255 ; X32-NEXT: subl $12, %esp
256 ; X32-NEXT: pushl vf128+12
257 ; X32-NEXT: pushl vf128+8
258 ; X32-NEXT: pushl vf128+4
259 ; X32-NEXT: pushl vf128
260 ; X32-NEXT: calll __fixtfsi
261 ; X32-NEXT: addl $16, %esp
262 ; X32-NEXT: movl %eax, vi64
263 ; X32-NEXT: sarl $31, %eax
264 ; X32-NEXT: movl %eax, vi64+4
265 ; X32-NEXT: addl $12, %esp
266 ; X32-NEXT: retl
267 ;
268 ; X64-AVX-LABEL: TestFPToSIF128_I64:
269 ; X64-AVX: # %bb.0: # %entry
270 ; X64-AVX-NEXT: pushq %rax
271 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
272 ; X64-AVX-NEXT: callq __fixtfsi
273 ; X64-AVX-NEXT: cltq
274 ; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
275 ; X64-AVX-NEXT: popq %rax
276 ; X64-AVX-NEXT: retq
277 entry:
278 %0 = load fp128, fp128* @vf128, align 16
279 %conv = fptosi fp128 %0 to i32
280 %conv1 = sext i32 %conv to i64
281 store i64 %conv1, i64* @vi64, align 8
282 ret void
283 }
285 define void @TestFPToUIF128_U64() nounwind {
286 ; X64-SSE-LABEL: TestFPToUIF128_U64:
287 ; X64-SSE: # %bb.0: # %entry
288 ; X64-SSE-NEXT: pushq %rax
289 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
290 ; X64-SSE-NEXT: callq __fixunstfsi
291 ; X64-SSE-NEXT: movl %eax, %eax
292 ; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
293 ; X64-SSE-NEXT: popq %rax
294 ; X64-SSE-NEXT: retq
295 ;
296 ; X32-LABEL: TestFPToUIF128_U64:
297 ; X32: # %bb.0: # %entry
298 ; X32-NEXT: subl $12, %esp
299 ; X32-NEXT: pushl vf128+12
300 ; X32-NEXT: pushl vf128+8
301 ; X32-NEXT: pushl vf128+4
302 ; X32-NEXT: pushl vf128
303 ; X32-NEXT: calll __fixunstfsi
304 ; X32-NEXT: addl $16, %esp
305 ; X32-NEXT: movl %eax, vu64
306 ; X32-NEXT: movl $0, vu64+4
307 ; X32-NEXT: addl $12, %esp
308 ; X32-NEXT: retl
309 ;
310 ; X64-AVX-LABEL: TestFPToUIF128_U64:
311 ; X64-AVX: # %bb.0: # %entry
312 ; X64-AVX-NEXT: pushq %rax
313 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
314 ; X64-AVX-NEXT: callq __fixunstfsi
315 ; X64-AVX-NEXT: movl %eax, %eax
316 ; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
317 ; X64-AVX-NEXT: popq %rax
318 ; X64-AVX-NEXT: retq
319 entry:
320 %0 = load fp128, fp128* @vf128, align 16
321 %conv = fptoui fp128 %0 to i32
322 %conv1 = zext i32 %conv to i64
323 store i64 %conv1, i64* @vu64, align 8
324 ret void
325 }
327 define void @TestFPToSIF128_I128() nounwind {
328 ; X64-SSE-LABEL: TestFPToSIF128_I128:
329 ; X64-SSE: # %bb.0: # %entry
330 ; X64-SSE-NEXT: pushq %rax
331 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
332 ; X64-SSE-NEXT: callq __fixtfti
333 ; X64-SSE-NEXT: movq %rdx, vi128+{{.*}}(%rip)
334 ; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
335 ; X64-SSE-NEXT: popq %rax
336 ; X64-SSE-NEXT: retq
337 ;
338 ; X32-LABEL: TestFPToSIF128_I128:
339 ; X32: # %bb.0: # %entry
340 ; X32-NEXT: pushl %esi
341 ; X32-NEXT: subl $36, %esp
342 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
343 ; X32-NEXT: pushl vf128+12
344 ; X32-NEXT: pushl vf128+8
345 ; X32-NEXT: pushl vf128+4
346 ; X32-NEXT: pushl vf128
347 ; X32-NEXT: pushl %eax
348 ; X32-NEXT: calll __fixtfti
349 ; X32-NEXT: addl $28, %esp
350 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
351 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
352 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
353 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
354 ; X32-NEXT: movl %esi, vi128+12
355 ; X32-NEXT: movl %edx, vi128+8
356 ; X32-NEXT: movl %ecx, vi128+4
357 ; X32-NEXT: movl %eax, vi128
358 ; X32-NEXT: addl $24, %esp
359 ; X32-NEXT: popl %esi
360 ; X32-NEXT: retl
361 ;
362 ; X64-AVX-LABEL: TestFPToSIF128_I128:
363 ; X64-AVX: # %bb.0: # %entry
364 ; X64-AVX-NEXT: pushq %rax
365 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
366 ; X64-AVX-NEXT: callq __fixtfti
367 ; X64-AVX-NEXT: movq %rdx, vi128+{{.*}}(%rip)
368 ; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
369 ; X64-AVX-NEXT: popq %rax
370 ; X64-AVX-NEXT: retq
371 entry:
372 %0 = load fp128, fp128* @vf128, align 16
373 %conv = fptosi fp128 %0 to i128
374 store i128 %conv, i128* @vi128, align 16
375 ret void
376 }
378 define void @TestFPToUIF128_U128() nounwind {
379 ; X64-SSE-LABEL: TestFPToUIF128_U128:
380 ; X64-SSE: # %bb.0: # %entry
381 ; X64-SSE-NEXT: pushq %rax
382 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
383 ; X64-SSE-NEXT: callq __fixunstfti
384 ; X64-SSE-NEXT: movq %rdx, vu128+{{.*}}(%rip)
385 ; X64-SSE-NEXT: movq %rax, {{.*}}(%rip)
386 ; X64-SSE-NEXT: popq %rax
387 ; X64-SSE-NEXT: retq
388 ;
389 ; X32-LABEL: TestFPToUIF128_U128:
390 ; X32: # %bb.0: # %entry
391 ; X32-NEXT: pushl %esi
392 ; X32-NEXT: subl $36, %esp
393 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
394 ; X32-NEXT: pushl vf128+12
395 ; X32-NEXT: pushl vf128+8
396 ; X32-NEXT: pushl vf128+4
397 ; X32-NEXT: pushl vf128
398 ; X32-NEXT: pushl %eax
399 ; X32-NEXT: calll __fixunstfti
400 ; X32-NEXT: addl $28, %esp
401 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
402 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
403 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
404 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
405 ; X32-NEXT: movl %esi, vu128+12
406 ; X32-NEXT: movl %edx, vu128+8
407 ; X32-NEXT: movl %ecx, vu128+4
408 ; X32-NEXT: movl %eax, vu128
409 ; X32-NEXT: addl $24, %esp
410 ; X32-NEXT: popl %esi
411 ; X32-NEXT: retl
412 ;
413 ; X64-AVX-LABEL: TestFPToUIF128_U128:
414 ; X64-AVX: # %bb.0: # %entry
415 ; X64-AVX-NEXT: pushq %rax
416 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
417 ; X64-AVX-NEXT: callq __fixunstfti
418 ; X64-AVX-NEXT: movq %rdx, vu128+{{.*}}(%rip)
419 ; X64-AVX-NEXT: movq %rax, {{.*}}(%rip)
420 ; X64-AVX-NEXT: popq %rax
421 ; X64-AVX-NEXT: retq
422 entry:
423 %0 = load fp128, fp128* @vf128, align 16
424 %conv = fptoui fp128 %0 to i128
425 store i128 %conv, i128* @vu128, align 16
426 ret void
427 }
429 define void @TestFPTruncF128_F32() nounwind {
430 ; X64-SSE-LABEL: TestFPTruncF128_F32:
431 ; X64-SSE: # %bb.0: # %entry
432 ; X64-SSE-NEXT: pushq %rax
433 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
434 ; X64-SSE-NEXT: callq __trunctfsf2
435 ; X64-SSE-NEXT: movss %xmm0, {{.*}}(%rip)
436 ; X64-SSE-NEXT: popq %rax
437 ; X64-SSE-NEXT: retq
438 ;
439 ; X32-LABEL: TestFPTruncF128_F32:
440 ; X32: # %bb.0: # %entry
441 ; X32-NEXT: subl $12, %esp
442 ; X32-NEXT: pushl vf128+12
443 ; X32-NEXT: pushl vf128+8
444 ; X32-NEXT: pushl vf128+4
445 ; X32-NEXT: pushl vf128
446 ; X32-NEXT: calll __trunctfsf2
447 ; X32-NEXT: addl $16, %esp
448 ; X32-NEXT: fstps vf32
449 ; X32-NEXT: addl $12, %esp
450 ; X32-NEXT: retl
451 ;
452 ; X64-AVX-LABEL: TestFPTruncF128_F32:
453 ; X64-AVX: # %bb.0: # %entry
454 ; X64-AVX-NEXT: pushq %rax
455 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
456 ; X64-AVX-NEXT: callq __trunctfsf2
457 ; X64-AVX-NEXT: vmovss %xmm0, {{.*}}(%rip)
458 ; X64-AVX-NEXT: popq %rax
459 ; X64-AVX-NEXT: retq
460 entry:
461 %0 = load fp128, fp128* @vf128, align 16
462 %conv = fptrunc fp128 %0 to float
463 store float %conv, float* @vf32, align 4
464 ret void
465 }
467 define void @TestFPTruncF128_F64() nounwind {
468 ; X64-SSE-LABEL: TestFPTruncF128_F64:
469 ; X64-SSE: # %bb.0: # %entry
470 ; X64-SSE-NEXT: pushq %rax
471 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
472 ; X64-SSE-NEXT: callq __trunctfdf2
473 ; X64-SSE-NEXT: movsd %xmm0, {{.*}}(%rip)
474 ; X64-SSE-NEXT: popq %rax
475 ; X64-SSE-NEXT: retq
476 ;
477 ; X32-LABEL: TestFPTruncF128_F64:
478 ; X32: # %bb.0: # %entry
479 ; X32-NEXT: subl $12, %esp
480 ; X32-NEXT: pushl vf128+12
481 ; X32-NEXT: pushl vf128+8
482 ; X32-NEXT: pushl vf128+4
483 ; X32-NEXT: pushl vf128
484 ; X32-NEXT: calll __trunctfdf2
485 ; X32-NEXT: addl $16, %esp
486 ; X32-NEXT: fstpl vf64
487 ; X32-NEXT: addl $12, %esp
488 ; X32-NEXT: retl
489 ;
490 ; X64-AVX-LABEL: TestFPTruncF128_F64:
491 ; X64-AVX: # %bb.0: # %entry
492 ; X64-AVX-NEXT: pushq %rax
493 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
494 ; X64-AVX-NEXT: callq __trunctfdf2
495 ; X64-AVX-NEXT: vmovsd %xmm0, {{.*}}(%rip)
496 ; X64-AVX-NEXT: popq %rax
497 ; X64-AVX-NEXT: retq
498 entry:
499 %0 = load fp128, fp128* @vf128, align 16
500 %conv = fptrunc fp128 %0 to double
501 store double %conv, double* @vf64, align 8
502 ret void
503 }
505 define void @TestFPTruncF128_F80() nounwind {
506 ; X64-SSE-LABEL: TestFPTruncF128_F80:
507 ; X64-SSE: # %bb.0: # %entry
508 ; X64-SSE-NEXT: pushq %rax
509 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm0
510 ; X64-SSE-NEXT: callq __trunctfxf2
511 ; X64-SSE-NEXT: fstpt {{.*}}(%rip)
512 ; X64-SSE-NEXT: popq %rax
513 ; X64-SSE-NEXT: retq
514 ;
515 ; X32-LABEL: TestFPTruncF128_F80:
516 ; X32: # %bb.0: # %entry
517 ; X32-NEXT: subl $12, %esp
518 ; X32-NEXT: pushl vf128+12
519 ; X32-NEXT: pushl vf128+8
520 ; X32-NEXT: pushl vf128+4
521 ; X32-NEXT: pushl vf128
522 ; X32-NEXT: calll __trunctfxf2
523 ; X32-NEXT: addl $16, %esp
524 ; X32-NEXT: fstpt vf80
525 ; X32-NEXT: addl $12, %esp
526 ; X32-NEXT: retl
527 ;
528 ; X64-AVX-LABEL: TestFPTruncF128_F80:
529 ; X64-AVX: # %bb.0: # %entry
530 ; X64-AVX-NEXT: pushq %rax
531 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm0
532 ; X64-AVX-NEXT: callq __trunctfxf2
533 ; X64-AVX-NEXT: fstpt {{.*}}(%rip)
534 ; X64-AVX-NEXT: popq %rax
535 ; X64-AVX-NEXT: retq
536 entry:
537 %0 = load fp128, fp128* @vf128, align 16
538 %conv = fptrunc fp128 %0 to x86_fp80
539 store x86_fp80 %conv, x86_fp80* @vf80, align 8
540 ret void
541 }
543 define void @TestSIToFPI32_F128() nounwind {
544 ; X64-SSE-LABEL: TestSIToFPI32_F128:
545 ; X64-SSE: # %bb.0: # %entry
546 ; X64-SSE-NEXT: pushq %rax
547 ; X64-SSE-NEXT: movl {{.*}}(%rip), %edi
548 ; X64-SSE-NEXT: callq __floatsitf
549 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
550 ; X64-SSE-NEXT: popq %rax
551 ; X64-SSE-NEXT: retq
552 ;
553 ; X32-LABEL: TestSIToFPI32_F128:
554 ; X32: # %bb.0: # %entry
555 ; X32-NEXT: pushl %esi
556 ; X32-NEXT: subl $32, %esp
557 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
558 ; X32-NEXT: pushl vi32
559 ; X32-NEXT: pushl %eax
560 ; X32-NEXT: calll __floatsitf
561 ; X32-NEXT: addl $12, %esp
562 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
563 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
564 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
565 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
566 ; X32-NEXT: movl %esi, vf128+12
567 ; X32-NEXT: movl %edx, vf128+8
568 ; X32-NEXT: movl %ecx, vf128+4
569 ; X32-NEXT: movl %eax, vf128
570 ; X32-NEXT: addl $24, %esp
571 ; X32-NEXT: popl %esi
572 ; X32-NEXT: retl
573 ;
574 ; X64-AVX-LABEL: TestSIToFPI32_F128:
575 ; X64-AVX: # %bb.0: # %entry
576 ; X64-AVX-NEXT: pushq %rax
577 ; X64-AVX-NEXT: movl {{.*}}(%rip), %edi
578 ; X64-AVX-NEXT: callq __floatsitf
579 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
580 ; X64-AVX-NEXT: popq %rax
581 ; X64-AVX-NEXT: retq
582 entry:
583 %0 = load i32, i32* @vi32, align 4
584 %conv = sitofp i32 %0 to fp128
585 store fp128 %conv, fp128* @vf128, align 16
586 ret void
587 }
589 define void @TestUIToFPU32_F128() #2 {
590 ; X64-SSE-LABEL: TestUIToFPU32_F128:
591 ; X64-SSE: # %bb.0: # %entry
592 ; X64-SSE-NEXT: pushq %rax
593 ; X64-SSE-NEXT: movl {{.*}}(%rip), %edi
594 ; X64-SSE-NEXT: callq __floatunsitf
595 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
596 ; X64-SSE-NEXT: popq %rax
597 ; X64-SSE-NEXT: retq
598 ;
599 ; X32-LABEL: TestUIToFPU32_F128:
600 ; X32: # %bb.0: # %entry
601 ; X32-NEXT: pushl %esi
602 ; X32-NEXT: subl $32, %esp
603 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
604 ; X32-NEXT: pushl vu32
605 ; X32-NEXT: pushl %eax
606 ; X32-NEXT: calll __floatunsitf
607 ; X32-NEXT: addl $12, %esp
608 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
609 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
610 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
611 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
612 ; X32-NEXT: movl %esi, vf128+12
613 ; X32-NEXT: movl %edx, vf128+8
614 ; X32-NEXT: movl %ecx, vf128+4
615 ; X32-NEXT: movl %eax, vf128
616 ; X32-NEXT: addl $24, %esp
617 ; X32-NEXT: popl %esi
618 ; X32-NEXT: retl
619 ;
620 ; X64-AVX-LABEL: TestUIToFPU32_F128:
621 ; X64-AVX: # %bb.0: # %entry
622 ; X64-AVX-NEXT: pushq %rax
623 ; X64-AVX-NEXT: movl {{.*}}(%rip), %edi
624 ; X64-AVX-NEXT: callq __floatunsitf
625 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
626 ; X64-AVX-NEXT: popq %rax
627 ; X64-AVX-NEXT: retq
628 entry:
629 %0 = load i32, i32* @vu32, align 4
630 %conv = uitofp i32 %0 to fp128
631 store fp128 %conv, fp128* @vf128, align 16
632 ret void
633 }
635 define void @TestSIToFPI64_F128() nounwind {
636 ; X64-SSE-LABEL: TestSIToFPI64_F128:
637 ; X64-SSE: # %bb.0: # %entry
638 ; X64-SSE-NEXT: pushq %rax
639 ; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
640 ; X64-SSE-NEXT: callq __floatditf
641 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
642 ; X64-SSE-NEXT: popq %rax
643 ; X64-SSE-NEXT: retq
644 ;
645 ; X32-LABEL: TestSIToFPI64_F128:
646 ; X32: # %bb.0: # %entry
647 ; X32-NEXT: pushl %esi
648 ; X32-NEXT: subl $28, %esp
649 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
650 ; X32-NEXT: pushl vi64+4
651 ; X32-NEXT: pushl vi64
652 ; X32-NEXT: pushl %eax
653 ; X32-NEXT: calll __floatditf
654 ; X32-NEXT: addl $12, %esp
655 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
656 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
657 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
658 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
659 ; X32-NEXT: movl %esi, vf128+12
660 ; X32-NEXT: movl %edx, vf128+8
661 ; X32-NEXT: movl %ecx, vf128+4
662 ; X32-NEXT: movl %eax, vf128
663 ; X32-NEXT: addl $24, %esp
664 ; X32-NEXT: popl %esi
665 ; X32-NEXT: retl
666 ;
667 ; X64-AVX-LABEL: TestSIToFPI64_F128:
668 ; X64-AVX: # %bb.0: # %entry
669 ; X64-AVX-NEXT: pushq %rax
670 ; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
671 ; X64-AVX-NEXT: callq __floatditf
672 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
673 ; X64-AVX-NEXT: popq %rax
674 ; X64-AVX-NEXT: retq
675 entry:
676 %0 = load i64, i64* @vi64, align 8
677 %conv = sitofp i64 %0 to fp128
678 store fp128 %conv, fp128* @vf128, align 16
679 ret void
680 }
682 define void @TestUIToFPU64_F128() #2 {
683 ; X64-SSE-LABEL: TestUIToFPU64_F128:
684 ; X64-SSE: # %bb.0: # %entry
685 ; X64-SSE-NEXT: pushq %rax
686 ; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
687 ; X64-SSE-NEXT: callq __floatunditf
688 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
689 ; X64-SSE-NEXT: popq %rax
690 ; X64-SSE-NEXT: retq
691 ;
692 ; X32-LABEL: TestUIToFPU64_F128:
693 ; X32: # %bb.0: # %entry
694 ; X32-NEXT: pushl %esi
695 ; X32-NEXT: subl $28, %esp
696 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
697 ; X32-NEXT: pushl vu64+4
698 ; X32-NEXT: pushl vu64
699 ; X32-NEXT: pushl %eax
700 ; X32-NEXT: calll __floatunditf
701 ; X32-NEXT: addl $12, %esp
702 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
703 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
704 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
705 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
706 ; X32-NEXT: movl %esi, vf128+12
707 ; X32-NEXT: movl %edx, vf128+8
708 ; X32-NEXT: movl %ecx, vf128+4
709 ; X32-NEXT: movl %eax, vf128
710 ; X32-NEXT: addl $24, %esp
711 ; X32-NEXT: popl %esi
712 ; X32-NEXT: retl
713 ;
714 ; X64-AVX-LABEL: TestUIToFPU64_F128:
715 ; X64-AVX: # %bb.0: # %entry
716 ; X64-AVX-NEXT: pushq %rax
717 ; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
718 ; X64-AVX-NEXT: callq __floatunditf
719 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
720 ; X64-AVX-NEXT: popq %rax
721 ; X64-AVX-NEXT: retq
722 entry:
723 %0 = load i64, i64* @vu64, align 8
724 %conv = uitofp i64 %0 to fp128
725 store fp128 %conv, fp128* @vf128, align 16
726 ret void
727 }
729 define void @TestSIToFPI128_F128() nounwind {
730 ; X64-SSE-LABEL: TestSIToFPI128_F128:
731 ; X64-SSE: # %bb.0: # %entry
732 ; X64-SSE-NEXT: pushq %rax
733 ; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
734 ; X64-SSE-NEXT: movq vi128+{{.*}}(%rip), %rsi
735 ; X64-SSE-NEXT: callq __floattitf
736 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
737 ; X64-SSE-NEXT: popq %rax
738 ; X64-SSE-NEXT: retq
739 ;
740 ; X32-LABEL: TestSIToFPI128_F128:
741 ; X32: # %bb.0: # %entry
742 ; X32-NEXT: pushl %esi
743 ; X32-NEXT: subl $36, %esp
744 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
745 ; X32-NEXT: pushl vi128+12
746 ; X32-NEXT: pushl vi128+8
747 ; X32-NEXT: pushl vi128+4
748 ; X32-NEXT: pushl vi128
749 ; X32-NEXT: pushl %eax
750 ; X32-NEXT: calll __floattitf
751 ; X32-NEXT: addl $28, %esp
752 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
753 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
754 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
755 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
756 ; X32-NEXT: movl %esi, vf128+12
757 ; X32-NEXT: movl %edx, vf128+8
758 ; X32-NEXT: movl %ecx, vf128+4
759 ; X32-NEXT: movl %eax, vf128
760 ; X32-NEXT: addl $24, %esp
761 ; X32-NEXT: popl %esi
762 ; X32-NEXT: retl
763 ;
764 ; X64-AVX-LABEL: TestSIToFPI128_F128:
765 ; X64-AVX: # %bb.0: # %entry
766 ; X64-AVX-NEXT: pushq %rax
767 ; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
768 ; X64-AVX-NEXT: movq vi128+{{.*}}(%rip), %rsi
769 ; X64-AVX-NEXT: callq __floattitf
770 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
771 ; X64-AVX-NEXT: popq %rax
772 ; X64-AVX-NEXT: retq
773 entry:
774 %0 = load i128, i128* @vi128, align 16
775 %conv = sitofp i128 %0 to fp128
776 store fp128 %conv, fp128* @vf128, align 16
777 ret void
778 }
780 define void @TestUIToFPU128_F128() #2 {
781 ; X64-SSE-LABEL: TestUIToFPU128_F128:
782 ; X64-SSE: # %bb.0: # %entry
783 ; X64-SSE-NEXT: pushq %rax
784 ; X64-SSE-NEXT: movq {{.*}}(%rip), %rdi
785 ; X64-SSE-NEXT: movq vu128+{{.*}}(%rip), %rsi
786 ; X64-SSE-NEXT: callq __floatuntitf
787 ; X64-SSE-NEXT: movaps %xmm0, {{.*}}(%rip)
788 ; X64-SSE-NEXT: popq %rax
789 ; X64-SSE-NEXT: retq
790 ;
791 ; X32-LABEL: TestUIToFPU128_F128:
792 ; X32: # %bb.0: # %entry
793 ; X32-NEXT: pushl %esi
794 ; X32-NEXT: subl $36, %esp
795 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
796 ; X32-NEXT: pushl vu128+12
797 ; X32-NEXT: pushl vu128+8
798 ; X32-NEXT: pushl vu128+4
799 ; X32-NEXT: pushl vu128
800 ; X32-NEXT: pushl %eax
801 ; X32-NEXT: calll __floatuntitf
802 ; X32-NEXT: addl $28, %esp
803 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
804 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
805 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
806 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
807 ; X32-NEXT: movl %esi, vf128+12
808 ; X32-NEXT: movl %edx, vf128+8
809 ; X32-NEXT: movl %ecx, vf128+4
810 ; X32-NEXT: movl %eax, vf128
811 ; X32-NEXT: addl $24, %esp
812 ; X32-NEXT: popl %esi
813 ; X32-NEXT: retl
814 ;
815 ; X64-AVX-LABEL: TestUIToFPU128_F128:
816 ; X64-AVX: # %bb.0: # %entry
817 ; X64-AVX-NEXT: pushq %rax
818 ; X64-AVX-NEXT: movq {{.*}}(%rip), %rdi
819 ; X64-AVX-NEXT: movq vu128+{{.*}}(%rip), %rsi
820 ; X64-AVX-NEXT: callq __floatuntitf
821 ; X64-AVX-NEXT: vmovaps %xmm0, {{.*}}(%rip)
822 ; X64-AVX-NEXT: popq %rax
823 ; X64-AVX-NEXT: retq
824 entry:
825 %0 = load i128, i128* @vu128, align 16
826 %conv = uitofp i128 %0 to fp128
827 store fp128 %conv, fp128* @vf128, align 16
828 ret void
829 }
831 define i32 @TestConst128(fp128 %v) nounwind {
832 ; X64-SSE-LABEL: TestConst128:
833 ; X64-SSE: # %bb.0: # %entry
834 ; X64-SSE-NEXT: pushq %rax
835 ; X64-SSE-NEXT: movaps {{.*}}(%rip), %xmm1
836 ; X64-SSE-NEXT: callq __gttf2
837 ; X64-SSE-NEXT: xorl %ecx, %ecx
838 ; X64-SSE-NEXT: testl %eax, %eax
839 ; X64-SSE-NEXT: setg %cl
840 ; X64-SSE-NEXT: movl %ecx, %eax
841 ; X64-SSE-NEXT: popq %rcx
842 ; X64-SSE-NEXT: retq
843 ;
844 ; X32-LABEL: TestConst128:
845 ; X32: # %bb.0: # %entry
846 ; X32-NEXT: subl $12, %esp
847 ; X32-NEXT: pushl $1073676288 # imm = 0x3FFF0000
848 ; X32-NEXT: pushl $0
849 ; X32-NEXT: pushl $0
850 ; X32-NEXT: pushl $0
851 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
852 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
853 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
854 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
855 ; X32-NEXT: calll __gttf2
856 ; X32-NEXT: addl $32, %esp
857 ; X32-NEXT: xorl %ecx, %ecx
858 ; X32-NEXT: testl %eax, %eax
859 ; X32-NEXT: setg %cl
860 ; X32-NEXT: movl %ecx, %eax
861 ; X32-NEXT: addl $12, %esp
862 ; X32-NEXT: retl
863 ;
864 ; X64-AVX-LABEL: TestConst128:
865 ; X64-AVX: # %bb.0: # %entry
866 ; X64-AVX-NEXT: pushq %rax
867 ; X64-AVX-NEXT: vmovaps {{.*}}(%rip), %xmm1
868 ; X64-AVX-NEXT: callq __gttf2
869 ; X64-AVX-NEXT: xorl %ecx, %ecx
870 ; X64-AVX-NEXT: testl %eax, %eax
871 ; X64-AVX-NEXT: setg %cl
872 ; X64-AVX-NEXT: movl %ecx, %eax
873 ; X64-AVX-NEXT: popq %rcx
874 ; X64-AVX-NEXT: retq
875 entry:
876 %cmp = fcmp ogt fp128 %v, 0xL00000000000000003FFF000000000000
877 %conv = zext i1 %cmp to i32
878 ret i32 %conv
879 }
882 define i32 @TestConst128Zero(fp128 %v) nounwind {
883 ; X64-SSE-LABEL: TestConst128Zero:
884 ; X64-SSE: # %bb.0: # %entry
885 ; X64-SSE-NEXT: pushq %rax
886 ; X64-SSE-NEXT: xorps %xmm1, %xmm1
887 ; X64-SSE-NEXT: callq __gttf2
888 ; X64-SSE-NEXT: xorl %ecx, %ecx
889 ; X64-SSE-NEXT: testl %eax, %eax
890 ; X64-SSE-NEXT: setg %cl
891 ; X64-SSE-NEXT: movl %ecx, %eax
892 ; X64-SSE-NEXT: popq %rcx
893 ; X64-SSE-NEXT: retq
894 ;
895 ; X32-LABEL: TestConst128Zero:
896 ; X32: # %bb.0: # %entry
897 ; X32-NEXT: subl $12, %esp
898 ; X32-NEXT: pushl $0
899 ; X32-NEXT: pushl $0
900 ; X32-NEXT: pushl $0
901 ; X32-NEXT: pushl $0
902 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
903 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
904 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
905 ; X32-NEXT: pushl {{[0-9]+}}(%esp)
906 ; X32-NEXT: calll __gttf2
907 ; X32-NEXT: addl $32, %esp
908 ; X32-NEXT: xorl %ecx, %ecx
909 ; X32-NEXT: testl %eax, %eax
910 ; X32-NEXT: setg %cl
911 ; X32-NEXT: movl %ecx, %eax
912 ; X32-NEXT: addl $12, %esp
913 ; X32-NEXT: retl
914 ;
915 ; X64-AVX-LABEL: TestConst128Zero:
916 ; X64-AVX: # %bb.0: # %entry
917 ; X64-AVX-NEXT: pushq %rax
918 ; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
919 ; X64-AVX-NEXT: callq __gttf2
920 ; X64-AVX-NEXT: xorl %ecx, %ecx
921 ; X64-AVX-NEXT: testl %eax, %eax
922 ; X64-AVX-NEXT: setg %cl
923 ; X64-AVX-NEXT: movl %ecx, %eax
924 ; X64-AVX-NEXT: popq %rcx
925 ; X64-AVX-NEXT: retq
926 entry:
927 %cmp = fcmp ogt fp128 %v, 0xL00000000000000000000000000000000
928 %conv = zext i1 %cmp to i32
929 ret i32 %conv
930 }
932 ; C code:
933 ; struct TestBits_ieee_ext {
934 ; unsigned v1;
935 ; unsigned v2;
936 ; };
937 ; union TestBits_LDU {
938 ; FP128 ld;
939 ; struct TestBits_ieee_ext bits;
940 ; };
941 ; int TestBits128(FP128 ld) {
942 ; union TestBits_LDU u;
943 ; u.ld = ld * ld;
944 ; return ((u.bits.v1 | u.bits.v2) == 0);
945 ; }
946 define i32 @TestBits128(fp128 %ld) nounwind {
947 ; X64-SSE-LABEL: TestBits128:
948 ; X64-SSE: # %bb.0: # %entry
949 ; X64-SSE-NEXT: subq $24, %rsp
950 ; X64-SSE-NEXT: movaps %xmm0, %xmm1
951 ; X64-SSE-NEXT: callq __multf3
952 ; X64-SSE-NEXT: movaps %xmm0, (%rsp)
953 ; X64-SSE-NEXT: movq (%rsp), %rcx
954 ; X64-SSE-NEXT: movq %rcx, %rdx
955 ; X64-SSE-NEXT: shrq $32, %rdx
956 ; X64-SSE-NEXT: xorl %eax, %eax
957 ; X64-SSE-NEXT: orl %ecx, %edx
958 ; X64-SSE-NEXT: sete %al
959 ; X64-SSE-NEXT: addq $24, %rsp
960 ; X64-SSE-NEXT: retq
961 ;
962 ; X32-LABEL: TestBits128:
963 ; X32: # %bb.0: # %entry
964 ; X32-NEXT: pushl %edi
965 ; X32-NEXT: pushl %esi
966 ; X32-NEXT: subl $20, %esp
967 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
968 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
969 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
970 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
971 ; X32-NEXT: subl $12, %esp
972 ; X32-NEXT: leal {{[0-9]+}}(%esp), %edi
973 ; X32-NEXT: pushl %esi
974 ; X32-NEXT: pushl %edx
975 ; X32-NEXT: pushl %ecx
976 ; X32-NEXT: pushl %eax
977 ; X32-NEXT: pushl %esi
978 ; X32-NEXT: pushl %edx
979 ; X32-NEXT: pushl %ecx
980 ; X32-NEXT: pushl %eax
981 ; X32-NEXT: pushl %edi
982 ; X32-NEXT: calll __multf3
983 ; X32-NEXT: addl $44, %esp
984 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
985 ; X32-NEXT: xorl %eax, %eax
986 ; X32-NEXT: orl (%esp), %ecx
987 ; X32-NEXT: sete %al
988 ; X32-NEXT: addl $20, %esp
989 ; X32-NEXT: popl %esi
990 ; X32-NEXT: popl %edi
991 ; X32-NEXT: retl
992 ;
993 ; X64-AVX-LABEL: TestBits128:
994 ; X64-AVX: # %bb.0: # %entry
995 ; X64-AVX-NEXT: subq $24, %rsp
996 ; X64-AVX-NEXT: vmovaps %xmm0, %xmm1
997 ; X64-AVX-NEXT: callq __multf3
998 ; X64-AVX-NEXT: vmovaps %xmm0, (%rsp)
999 ; X64-AVX-NEXT: movq (%rsp), %rcx
1000 ; X64-AVX-NEXT: movq %rcx, %rdx
1001 ; X64-AVX-NEXT: shrq $32, %rdx
1002 ; X64-AVX-NEXT: xorl %eax, %eax
1003 ; X64-AVX-NEXT: orl %ecx, %edx
1004 ; X64-AVX-NEXT: sete %al
1005 ; X64-AVX-NEXT: addq $24, %rsp
1006 ; X64-AVX-NEXT: retq
1007 entry:
1008 %mul = fmul fp128 %ld, %ld
1009 %0 = bitcast fp128 %mul to i128
1010 %shift = lshr i128 %0, 32
1011 %or5 = or i128 %shift, %0
1012 %or = trunc i128 %or5 to i32
1013 %cmp = icmp eq i32 %or, 0
1014 %conv = zext i1 %cmp to i32
1015 ret i32 %conv
1016 ; If TestBits128 fails due to any llvm or clang change,
1017 ; please make sure the original simplified C code will
1018 ; be compiled into correct IL and assembly code, not
1019 ; just this TestBits128 test case. Better yet, try to
1020 ; test the whole libm and its test cases.
1021 }
1023 ; C code: (compiled with -target x86_64-linux-android)
1024 ; typedef long double __float128;
1025 ; __float128 TestPair128(unsigned long a, unsigned long b) {
1026 ; unsigned __int128 n;
1027 ; unsigned __int128 v1 = ((unsigned __int128)a << 64);
1028 ; unsigned __int128 v2 = (unsigned __int128)b;
1029 ; n = (v1 | v2) + 3;
1030 ; return *(__float128*)&n;
1031 ; }
1032 define fp128 @TestPair128(i64 %a, i64 %b) nounwind {
1033 ; X64-SSE-LABEL: TestPair128:
1034 ; X64-SSE: # %bb.0: # %entry
1035 ; X64-SSE-NEXT: addq $3, %rsi
1036 ; X64-SSE-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
1037 ; X64-SSE-NEXT: adcq $0, %rdi
1038 ; X64-SSE-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
1039 ; X64-SSE-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0
1040 ; X64-SSE-NEXT: retq
1041 ;
1042 ; X32-LABEL: TestPair128:
1043 ; X32: # %bb.0: # %entry
1044 ; X32-NEXT: pushl %edi
1045 ; X32-NEXT: pushl %esi
1046 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1047 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1048 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
1049 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
1050 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
1051 ; X32-NEXT: addl $3, %ecx
1052 ; X32-NEXT: adcl $0, %edx
1053 ; X32-NEXT: adcl $0, %esi
1054 ; X32-NEXT: adcl $0, %edi
1055 ; X32-NEXT: movl %edx, 4(%eax)
1056 ; X32-NEXT: movl %ecx, (%eax)
1057 ; X32-NEXT: movl %esi, 8(%eax)
1058 ; X32-NEXT: movl %edi, 12(%eax)
1059 ; X32-NEXT: popl %esi
1060 ; X32-NEXT: popl %edi
1061 ; X32-NEXT: retl $4
1062 ;
1063 ; X64-AVX-LABEL: TestPair128:
1064 ; X64-AVX: # %bb.0: # %entry
1065 ; X64-AVX-NEXT: addq $3, %rsi
1066 ; X64-AVX-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
1067 ; X64-AVX-NEXT: adcq $0, %rdi
1068 ; X64-AVX-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
1069 ; X64-AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0
1070 ; X64-AVX-NEXT: retq
1071 entry:
1072 %conv = zext i64 %a to i128
1073 %shl = shl nuw i128 %conv, 64
1074 %conv1 = zext i64 %b to i128
1075 %or = or i128 %shl, %conv1
1076 %add = add i128 %or, 3
1077 %0 = bitcast i128 %add to fp128
1078 ret fp128 %0
1079 }
1081 define fp128 @TestTruncCopysign(fp128 %x, i32 %n) nounwind {
1082 ; X64-SSE-LABEL: TestTruncCopysign:
1083 ; X64-SSE: # %bb.0: # %entry
1084 ; X64-SSE-NEXT: cmpl $50001, %edi # imm = 0xC351
1085 ; X64-SSE-NEXT: jl .LBB22_2
1086 ; X64-SSE-NEXT: # %bb.1: # %if.then
1087 ; X64-SSE-NEXT: pushq %rax
1088 ; X64-SSE-NEXT: callq __trunctfdf2
1089 ; X64-SSE-NEXT: andps {{.*}}(%rip), %xmm0
1090 ; X64-SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1091 ; X64-SSE-NEXT: orps %xmm1, %xmm0
1092 ; X64-SSE-NEXT: callq __extenddftf2
1093 ; X64-SSE-NEXT: addq $8, %rsp
1094 ; X64-SSE-NEXT: .LBB22_2: # %cleanup
1095 ; X64-SSE-NEXT: retq
1096 ;
1097 ; X32-LABEL: TestTruncCopysign:
1098 ; X32: # %bb.0: # %entry
1099 ; X32-NEXT: pushl %edi
1100 ; X32-NEXT: pushl %esi
1101 ; X32-NEXT: subl $36, %esp
1102 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
1103 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1104 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1105 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
1106 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
1107 ; X32-NEXT: cmpl $50001, {{[0-9]+}}(%esp) # imm = 0xC351
1108 ; X32-NEXT: jl .LBB22_4
1109 ; X32-NEXT: # %bb.1: # %if.then
1110 ; X32-NEXT: pushl %eax
1111 ; X32-NEXT: pushl %ecx
1112 ; X32-NEXT: pushl %edi
1113 ; X32-NEXT: pushl %edx
1114 ; X32-NEXT: calll __trunctfdf2
1115 ; X32-NEXT: addl $16, %esp
1116 ; X32-NEXT: fstpl {{[0-9]+}}(%esp)
1117 ; X32-NEXT: testb $-128, {{[0-9]+}}(%esp)
1118 ; X32-NEXT: flds {{\.LCPI.*}}
1119 ; X32-NEXT: flds {{\.LCPI.*}}
1120 ; X32-NEXT: jne .LBB22_3
1121 ; X32-NEXT: # %bb.2: # %if.then
1122 ; X32-NEXT: fstp %st(1)
1123 ; X32-NEXT: fldz
1124 ; X32-NEXT: .LBB22_3: # %if.then
1125 ; X32-NEXT: fstp %st(0)
1126 ; X32-NEXT: subl $16, %esp
1127 ; X32-NEXT: leal {{[0-9]+}}(%esp), %eax
1128 ; X32-NEXT: movl %eax, (%esp)
1129 ; X32-NEXT: fstpl {{[0-9]+}}(%esp)
1130 ; X32-NEXT: calll __extenddftf2
1131 ; X32-NEXT: addl $12, %esp
1132 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1133 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1134 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
1135 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
1136 ; X32-NEXT: .LBB22_4: # %cleanup
1137 ; X32-NEXT: movl %edx, (%esi)
1138 ; X32-NEXT: movl %edi, 4(%esi)
1139 ; X32-NEXT: movl %ecx, 8(%esi)
1140 ; X32-NEXT: movl %eax, 12(%esi)
1141 ; X32-NEXT: movl %esi, %eax
1142 ; X32-NEXT: addl $36, %esp
1143 ; X32-NEXT: popl %esi
1144 ; X32-NEXT: popl %edi
1145 ; X32-NEXT: retl $4
1146 ;
1147 ; X64-AVX-LABEL: TestTruncCopysign:
1148 ; X64-AVX: # %bb.0: # %entry
1149 ; X64-AVX-NEXT: cmpl $50001, %edi # imm = 0xC351
1150 ; X64-AVX-NEXT: jl .LBB22_2
1151 ; X64-AVX-NEXT: # %bb.1: # %if.then
1152 ; X64-AVX-NEXT: pushq %rax
1153 ; X64-AVX-NEXT: callq __trunctfdf2
1154 ; X64-AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
1155 ; X64-AVX-NEXT: vmovddup {{.*#+}} xmm1 = [+Inf,+Inf]
1156 ; X64-AVX-NEXT: # xmm1 = mem[0,0]
1157 ; X64-AVX-NEXT: vorps %xmm0, %xmm1, %xmm0
1158 ; X64-AVX-NEXT: callq __extenddftf2
1159 ; X64-AVX-NEXT: addq $8, %rsp
1160 ; X64-AVX-NEXT: .LBB22_2: # %cleanup
1161 ; X64-AVX-NEXT: retq
1162 entry:
1163 %cmp = icmp sgt i32 %n, 50000
1164 br i1 %cmp, label %if.then, label %cleanup
1166 if.then: ; preds = %entry
1167 %conv = fptrunc fp128 %x to double
1168 %call = tail call double @copysign(double 0x7FF0000000000000, double %conv) #2
1169 %conv1 = fpext double %call to fp128
1170 br label %cleanup
1172 cleanup: ; preds = %entry, %if.then
1173 %retval.0 = phi fp128 [ %conv1, %if.then ], [ %x, %entry ]
1174 ret fp128 %retval.0
1175 }
1177 define i1 @PR34866(i128 %x) nounwind {
1178 ; X64-SSE-LABEL: PR34866:
1179 ; X64-SSE: # %bb.0:
1180 ; X64-SSE-NEXT: xorps %xmm0, %xmm0
1181 ; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
1182 ; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
1183 ; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
1184 ; X64-SSE-NEXT: orq %rsi, %rdi
1185 ; X64-SSE-NEXT: sete %al
1186 ; X64-SSE-NEXT: retq
1187 ;
1188 ; X32-LABEL: PR34866:
1189 ; X32: # %bb.0:
1190 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1191 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1192 ; X32-NEXT: orl {{[0-9]+}}(%esp), %ecx
1193 ; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
1194 ; X32-NEXT: orl %ecx, %eax
1195 ; X32-NEXT: sete %al
1196 ; X32-NEXT: retl
1197 ;
1198 ; X64-AVX-LABEL: PR34866:
1199 ; X64-AVX: # %bb.0:
1200 ; X64-AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
1201 ; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
1202 ; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
1203 ; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
1204 ; X64-AVX-NEXT: orq %rsi, %rdi
1205 ; X64-AVX-NEXT: sete %al
1206 ; X64-AVX-NEXT: retq
1207 %bc_mmx = bitcast fp128 0xL00000000000000000000000000000000 to i128
1208 %cmp = icmp eq i128 %bc_mmx, %x
1209 ret i1 %cmp
1210 }
1212 define i1 @PR34866_commute(i128 %x) nounwind {
1213 ; X64-SSE-LABEL: PR34866_commute:
1214 ; X64-SSE: # %bb.0:
1215 ; X64-SSE-NEXT: xorps %xmm0, %xmm0
1216 ; X64-SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
1217 ; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
1218 ; X64-SSE-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
1219 ; X64-SSE-NEXT: orq %rsi, %rdi
1220 ; X64-SSE-NEXT: sete %al
1221 ; X64-SSE-NEXT: retq
1222 ;
1223 ; X32-LABEL: PR34866_commute:
1224 ; X32: # %bb.0:
1225 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1226 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1227 ; X32-NEXT: orl {{[0-9]+}}(%esp), %ecx
1228 ; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
1229 ; X32-NEXT: orl %ecx, %eax
1230 ; X32-NEXT: sete %al
1231 ; X32-NEXT: retl
1232 ;
1233 ; X64-AVX-LABEL: PR34866_commute:
1234 ; X64-AVX: # %bb.0:
1235 ; X64-AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
1236 ; X64-AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
1237 ; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rsi
1238 ; X64-AVX-NEXT: xorq -{{[0-9]+}}(%rsp), %rdi
1239 ; X64-AVX-NEXT: orq %rsi, %rdi
1240 ; X64-AVX-NEXT: sete %al
1241 ; X64-AVX-NEXT: retq
1242 %bc_mmx = bitcast fp128 0xL00000000000000000000000000000000 to i128
1243 %cmp = icmp eq i128 %x, %bc_mmx
1244 ret i1 %cmp
1245 }
1248 declare double @copysign(double, double) #1
1250 attributes #2 = { nounwind readnone }