[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / ld1h.s
blob41ee04cb79b6f2bb811705c57d6be23ca424334a
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ld1h z0.h, p0/z, [x0]
11 // CHECK-INST: ld1h { z0.h }, p0/z, [x0]
12 // CHECK-ENCODING: [0x00,0xa0,0xa0,0xa4]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 a0 a0 a4 <unknown>
16 ld1h z0.s, p0/z, [x0]
17 // CHECK-INST: ld1h { z0.s }, p0/z, [x0]
18 // CHECK-ENCODING: [0x00,0xa0,0xc0,0xa4]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 00 a0 c0 a4 <unknown>
22 ld1h z0.d, p0/z, [x0]
23 // CHECK-INST: ld1h { z0.d }, p0/z, [x0]
24 // CHECK-ENCODING: [0x00,0xa0,0xe0,0xa4]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 a0 e0 a4 <unknown>
28 ld1h { z0.h }, p0/z, [x0]
29 // CHECK-INST: ld1h { z0.h }, p0/z, [x0]
30 // CHECK-ENCODING: [0x00,0xa0,0xa0,0xa4]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: 00 a0 a0 a4 <unknown>
34 ld1h { z0.s }, p0/z, [x0]
35 // CHECK-INST: ld1h { z0.s }, p0/z, [x0]
36 // CHECK-ENCODING: [0x00,0xa0,0xc0,0xa4]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 00 a0 c0 a4 <unknown>
40 ld1h { z0.d }, p0/z, [x0]
41 // CHECK-INST: ld1h { z0.d }, p0/z, [x0]
42 // CHECK-ENCODING: [0x00,0xa0,0xe0,0xa4]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 00 a0 e0 a4 <unknown>
46 ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
47 // CHECK-INST: ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
48 // CHECK-ENCODING: [0xff,0xbf,0xaf,0xa4]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: ff bf af a4 <unknown>
52 ld1h { z21.h }, p5/z, [x10, #5, mul vl]
53 // CHECK-INST: ld1h { z21.h }, p5/z, [x10, #5, mul vl]
54 // CHECK-ENCODING: [0x55,0xb5,0xa5,0xa4]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 55 b5 a5 a4 <unknown>
58 ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
59 // CHECK-INST: ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
60 // CHECK-ENCODING: [0xff,0xbf,0xcf,0xa4]
61 // CHECK-ERROR: instruction requires: sve
62 // CHECK-UNKNOWN: ff bf cf a4 <unknown>
64 ld1h { z21.s }, p5/z, [x10, #5, mul vl]
65 // CHECK-INST: ld1h { z21.s }, p5/z, [x10, #5, mul vl]
66 // CHECK-ENCODING: [0x55,0xb5,0xc5,0xa4]
67 // CHECK-ERROR: instruction requires: sve
68 // CHECK-UNKNOWN: 55 b5 c5 a4 <unknown>
70 ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
71 // CHECK-INST: ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
72 // CHECK-ENCODING: [0xff,0xbf,0xef,0xa4]
73 // CHECK-ERROR: instruction requires: sve
74 // CHECK-UNKNOWN: ff bf ef a4 <unknown>
76 ld1h { z21.d }, p5/z, [x10, #5, mul vl]
77 // CHECK-INST: ld1h { z21.d }, p5/z, [x10, #5, mul vl]
78 // CHECK-ENCODING: [0x55,0xb5,0xe5,0xa4]
79 // CHECK-ERROR: instruction requires: sve
80 // CHECK-UNKNOWN: 55 b5 e5 a4 <unknown>
82 ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
83 // CHECK-INST: ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
84 // CHECK-ENCODING: [0xe5,0x4f,0xb0,0xa4]
85 // CHECK-ERROR: instruction requires: sve
86 // CHECK-UNKNOWN: e5 4f b0 a4 <unknown>
88 ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
89 // CHECK-INST: ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
90 // CHECK-ENCODING: [0x25,0x4e,0xb0,0xa4]
91 // CHECK-ERROR: instruction requires: sve
92 // CHECK-UNKNOWN: 25 4e b0 a4 <unknown>
94 ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
95 // CHECK-INST: ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
96 // CHECK-ENCODING: [0x55,0x55,0xd5,0xa4]
97 // CHECK-ERROR: instruction requires: sve
98 // CHECK-UNKNOWN: 55 55 d5 a4 <unknown>
100 ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
101 // CHECK-INST: ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
102 // CHECK-ENCODING: [0xb7,0x4d,0xe8,0xa4]
103 // CHECK-ERROR: instruction requires: sve
104 // CHECK-UNKNOWN: b7 4d e8 a4 <unknown>
106 ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
107 // CHECK-INST: ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
108 // CHECK-ENCODING: [0x00,0x40,0x80,0x84]
109 // CHECK-ERROR: instruction requires: sve
110 // CHECK-UNKNOWN: 00 40 80 84 <unknown>
112 ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
113 // CHECK-INST: ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
114 // CHECK-ENCODING: [0x00,0x40,0xc0,0x84]
115 // CHECK-ERROR: instruction requires: sve
116 // CHECK-UNKNOWN: 00 40 c0 84 <unknown>
118 ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
119 // CHECK-INST: ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
120 // CHECK-ENCODING: [0xff,0x5f,0xbf,0x84]
121 // CHECK-ERROR: instruction requires: sve
122 // CHECK-UNKNOWN: ff 5f bf 84 <unknown>
124 ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
125 // CHECK-INST: ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
126 // CHECK-ENCODING: [0xff,0x5f,0xff,0x84]
127 // CHECK-ERROR: instruction requires: sve
128 // CHECK-UNKNOWN: ff 5f ff 84 <unknown>
130 ld1h { z31.d }, p7/z, [sp, z31.d]
131 // CHECK-INST: ld1h { z31.d }, p7/z, [sp, z31.d]
132 // CHECK-ENCODING: [0xff,0xdf,0xdf,0xc4]
133 // CHECK-ERROR: instruction requires: sve
134 // CHECK-UNKNOWN: ff df df c4 <unknown>
136 ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
137 // CHECK-INST: ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
138 // CHECK-ENCODING: [0xb7,0xcd,0xe8,0xc4]
139 // CHECK-ERROR: instruction requires: sve
140 // CHECK-UNKNOWN: b7 cd e8 c4 <unknown>
142 ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
143 // CHECK-INST: ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
144 // CHECK-ENCODING: [0x55,0x55,0x95,0xc4]
145 // CHECK-ERROR: instruction requires: sve
146 // CHECK-UNKNOWN: 55 55 95 c4 <unknown>
148 ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
149 // CHECK-INST: ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
150 // CHECK-ENCODING: [0x55,0x55,0xd5,0xc4]
151 // CHECK-ERROR: instruction requires: sve
152 // CHECK-UNKNOWN: 55 55 d5 c4 <unknown>
154 ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
155 // CHECK-INST: ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
156 // CHECK-ENCODING: [0x00,0x40,0xa0,0xc4]
157 // CHECK-ERROR: instruction requires: sve
158 // CHECK-UNKNOWN: 00 40 a0 c4 <unknown>
160 ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
161 // CHECK-INST: ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
162 // CHECK-ENCODING: [0x00,0x40,0xe0,0xc4]
163 // CHECK-ERROR: instruction requires: sve
164 // CHECK-UNKNOWN: 00 40 e0 c4 <unknown>
166 ld1h { z31.s }, p7/z, [z31.s, #62]
167 // CHECK-INST: ld1h { z31.s }, p7/z, [z31.s, #62]
168 // CHECK-ENCODING: [0xff,0xdf,0xbf,0x84]
169 // CHECK-ERROR: instruction requires: sve
170 // CHECK-UNKNOWN: ff df bf 84 <unknown>
172 ld1h { z0.s }, p0/z, [z0.s]
173 // CHECK-INST: ld1h { z0.s }, p0/z, [z0.s]
174 // CHECK-ENCODING: [0x00,0xc0,0xa0,0x84]
175 // CHECK-ERROR: instruction requires: sve
176 // CHECK-UNKNOWN: 00 c0 a0 84 <unknown>
178 ld1h { z31.d }, p7/z, [z31.d, #62]
179 // CHECK-INST: ld1h { z31.d }, p7/z, [z31.d, #62]
180 // CHECK-ENCODING: [0xff,0xdf,0xbf,0xc4]
181 // CHECK-ERROR: instruction requires: sve
182 // CHECK-UNKNOWN: ff df bf c4 <unknown>
184 ld1h { z0.d }, p0/z, [z0.d]
185 // CHECK-INST: ld1h { z0.d }, p0/z, [z0.d]
186 // CHECK-ENCODING: [0x00,0xc0,0xa0,0xc4]
187 // CHECK-ERROR: instruction requires: sve
188 // CHECK-UNKNOWN: 00 c0 a0 c4 <unknown>