test/MC/AArch64/SVE/ld1rsw-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid immediate (multiple of 4 in range [0, 252]).
   5
   6 ld1rsw z0.d, p1/z, [x0, #-4]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
   8 // CHECK-NEXT: ld1rsw z0.d, p1/z, [x0, #-4]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 ld1rsw z0.d, p1/z, [x0, #256]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
  13 // CHECK-NEXT: ld1rsw z0.d, p1/z, [x0, #256]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 ld1rsw z0.d, p1/z, [x0, #3]
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
  18 // CHECK-NEXT: ld1rsw z0.d, p1/z, [x0, #3]
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21
  22 // --------------------------------------------------------------------------//
  23 // Invalid result vector element size
  24
  25 ld1rsw z0.b, p1/z, [x0]
  26 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  27 // CHECK-NEXT: ld1rsw z0.b, p1/z, [x0]
  28 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  29
  30 ld1rsw z0.h, p1/z, [x0]
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  32 // CHECK-NEXT: ld1rsw z0.h, p1/z, [x0]
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  34
  35 ld1rsw z0.s, p1/z, [x0]
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  37 // CHECK-NEXT: ld1rsw z0.s, p1/z, [x0]
  38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  39
  40
  41 // --------------------------------------------------------------------------//
  42 // restricted predicate has range [0, 7].
  43
  44 ld1rsw z0.d, p8/z, [x0]
  45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  46 // CHECK-NEXT: ld1rsw z0.d, p8/z, [x0]
  47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  48
  49
  50 // --------------------------------------------------------------------------//
  51 // Negative tests for instructions that are incompatible with movprfx
  52
  53 movprfx z31.d, p7/z, z6.d
  54 ld1rsw  { z31.d }, p7/z, [sp, #252]
  55 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  56 // CHECK-NEXT: ld1rsw  { z31.d }, p7/z, [sp, #252]
  57 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  58
  59 movprfx z31, z6
  60 ld1rsw  { z31.d }, p7/z, [sp, #252]
  61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  62 // CHECK-NEXT: ld1rsw  { z31.d }, p7/z, [sp, #252]
  63 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: