[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / ld1rw-diagnostics.s
blobafc36ef3c2091fe3fd35e102d8d05738eadcaaaa
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
3 // --------------------------------------------------------------------------//
4 // Invalid immediate (multiple of 4 in range [0, 252]).
6 ld1rw z0.s, p1/z, [x0, #-4]
7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
8 // CHECK-NEXT: ld1rw z0.s, p1/z, [x0, #-4]
9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11 ld1rw z0.s, p1/z, [x0, #-1]
12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
13 // CHECK-NEXT: ld1rw z0.s, p1/z, [x0, #-1]
14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
16 ld1rw z0.s, p1/z, [x0, #253]
17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
18 // CHECK-NEXT: ld1rw z0.s, p1/z, [x0, #253]
19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
21 ld1rw z0.s, p1/z, [x0, #256]
22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
23 // CHECK-NEXT: ld1rw z0.s, p1/z, [x0, #256]
24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
26 ld1rw z0.s, p1/z, [x0, #3]
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 252].
28 // CHECK-NEXT: ld1rw z0.s, p1/z, [x0, #3]
29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 // --------------------------------------------------------------------------//
33 // Invalid result vector element size
35 ld1rw z0.b, p1/z, [x0]
36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
37 // CHECK-NEXT: ld1rw z0.b, p1/z, [x0]
38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
40 ld1rw z0.h, p1/z, [x0]
41 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
42 // CHECK-NEXT: ld1rw z0.h, p1/z, [x0]
43 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46 // --------------------------------------------------------------------------//
47 // restricted predicate has range [0, 7].
49 ld1rw z0.s, p8/z, [x0]
50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
51 // CHECK-NEXT: ld1rw z0.s, p8/z, [x0]
52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
55 // --------------------------------------------------------------------------//
56 // Negative tests for instructions that are incompatible with movprfx
58 movprfx z31.d, p7/z, z6.d
59 ld1rw { z31.d }, p7/z, [sp, #252]
60 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
61 // CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252]
62 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
64 movprfx z31, z6
65 ld1rw { z31.d }, p7/z, [sp, #252]
66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
67 // CHECK-NEXT: ld1rw { z31.d }, p7/z, [sp, #252]
68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: