test/MC/AArch64/SVE/ld1sh-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid operand (.h)
   5
   6 ld1sh z23.h, p0/z, [x13, #1, MUL VL]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
   8 // CHECK-NEXT: ld1sh z23.h, p0/z, [x13, #1, MUL VL]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 ld1sh z29.h, p0/z, [x3, #1, MUL VL]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  13 // CHECK-NEXT: ld1sh z29.h, p0/z, [x3, #1, MUL VL]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16
  17 // --------------------------------------------------------------------------//
  18 // Immediate out of lower bound [-8, 7].
  19
  20 ld1sh z30.s, p6/z, [x25, #-9, MUL VL]
  21 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  22 // CHECK-NEXT: ld1sh z30.s, p6/z, [x25, #-9, MUL VL]
  23 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  24
  25 ld1sh z29.s, p5/z, [x15, #8, MUL VL]
  26 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  27 // CHECK-NEXT: ld1sh z29.s, p5/z, [x15, #8, MUL VL]
  28 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  29
  30 ld1sh z28.d, p2/z, [x28, #-9, MUL VL]
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  32 // CHECK-NEXT: ld1sh z28.d, p2/z, [x28, #-9, MUL VL]
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  34
  35 ld1sh z27.d, p1/z, [x26, #8, MUL VL]
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  37 // CHECK-NEXT: ld1sh z27.d, p1/z, [x26, #8, MUL VL]
  38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  39
  40
  41 // --------------------------------------------------------------------------//
  42 // restricted predicate has range [0, 7].
  43
  44 ld1sh z12.s, p8/z, [x13, #1, MUL VL]
  45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  46 // CHECK-NEXT: ld1sh z12.s, p8/z, [x13, #1, MUL VL]
  47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  48
  49 ld1sh z4.d, p8/z, [x11, #1, MUL VL]
  50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  51 // CHECK-NEXT: ld1sh z4.d, p8/z, [x11, #1, MUL VL]
  52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  53
  54
  55 // --------------------------------------------------------------------------//
  56 // Invalid vector list.
  57
  58 ld1sh { }, p0/z, [x1, #1, MUL VL]
  59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
  60 // CHECK-NEXT: ld1sh { }, p0/z, [x1, #1, MUL VL]
  61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  62
  63 ld1sh { z1.s, z2.s }, p0/z, [x1, #1, MUL VL]
  64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  65 // CHECK-NEXT: ld1sh { z1.s, z2.s }, p0/z, [x1, #1, MUL VL]
  66 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  67
  68 ld1sh { v0.2d }, p0/z, [x1, #1, MUL VL]
  69 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  70 // CHECK-NEXT: ld1sh { v0.2d }, p0/z, [x1, #1, MUL VL]
  71 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  72
  73
  74 // --------------------------------------------------------------------------//
  75 // Invalid scalar + scalar addressing modes
  76
  77 ld1sh z0.s, p0/z, [x0, x0]
  78 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  79 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, x0]
  80 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  81
  82 ld1sh z0.s, p0/z, [x0, xzr]
  83 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  84 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, xzr]
  85 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  86
  87 ld1sh z0.s, p0/z, [x0, x0, lsl #2]
  88 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  89 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, x0, lsl #2]
  90 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  91
  92 ld1sh z0.s, p0/z, [x0, w0]
  93 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  94 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, w0]
  95 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  96
  97 ld1sh z0.s, p0/z, [x0, w0, uxtw]
  98 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  99 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, w0, uxtw]
 100 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 101
 102
 103 // --------------------------------------------------------------------------//
 104 // Invalid scalar + vector addressing modes
 105
 106 ld1sh z0.d, p0/z, [x0, z0.h]
 107 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
 108 // CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.h]
 109 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 110
 111 ld1sh z0.d, p0/z, [x0, z0.s]
 112 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
 113 // CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.s]
 114 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 115
 116 ld1sh z0.s, p0/z, [x0, z0.s]
 117 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
 118 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s]
 119 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 120
 121 ld1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
 122 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1'
 123 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s, uxtw #2]
 124 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 125
 126 ld1sh z0.s, p0/z, [x0, z0.s, lsl #1]
 127 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #1'
 128 // CHECK-NEXT: ld1sh z0.s, p0/z, [x0, z0.s, lsl #1]
 129 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 130
 131 ld1sh z0.d, p0/z, [x0, z0.d, lsl #2]
 132 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1'
 133 // CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.d, lsl #2]
 134 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 135
 136 ld1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
 137 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #1'
 138 // CHECK-NEXT: ld1sh z0.d, p0/z, [x0, z0.d, sxtw #2]
 139 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 140
 141
 142 // --------------------------------------------------------------------------//
 143 // Invalid vector + immediate addressing modes
 144
 145 ld1sh z0.s, p0/z, [z0.s, #-2]
 146 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 147 // CHECK-NEXT: ld1sh z0.s, p0/z, [z0.s, #-2]
 148 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 149
 150 ld1sh z0.s, p0/z, [z0.s, #-1]
 151 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 152 // CHECK-NEXT: ld1sh z0.s, p0/z, [z0.s, #-1]
 153 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 154
 155 ld1sh z0.s, p0/z, [z0.s, #63]
 156 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 157 // CHECK-NEXT: ld1sh z0.s, p0/z, [z0.s, #63]
 158 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 159
 160 ld1sh z0.s, p0/z, [z0.s, #64]
 161 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 162 // CHECK-NEXT: ld1sh z0.s, p0/z, [z0.s, #64]
 163 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 164
 165 ld1sh z0.s, p0/z, [z0.s, #3]
 166 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 167 // CHECK-NEXT: ld1sh z0.s, p0/z, [z0.s, #3]
 168 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 169
 170 ld1sh z0.d, p0/z, [z0.d, #-2]
 171 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 172 // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #-2]
 173 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 174
 175 ld1sh z0.d, p0/z, [z0.d, #-1]
 176 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 177 // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #-1]
 178 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 179
 180 ld1sh z0.d, p0/z, [z0.d, #63]
 181 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 182 // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #63]
 183 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 184
 185 ld1sh z0.d, p0/z, [z0.d, #64]
 186 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 187 // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #64]
 188 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 189
 190 ld1sh z0.d, p0/z, [z0.d, #3]
 191 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 2 in range [0, 62].
 192 // CHECK-NEXT: ld1sh z0.d, p0/z, [z0.d, #3]
 193 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 194
 195
 196 // --------------------------------------------------------------------------//
 197 // Negative tests for instructions that are incompatible with movprfx
 198
 199 movprfx z0.d, p0/z, z7.d
 200 ld1sh   { z0.d }, p0/z, [z0.d]
 201 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
 202 // CHECK-NEXT: ld1sh   { z0.d }, p0/z, [z0.d]
 203 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 204
 205 movprfx z0, z7
 206 ld1sh   { z0.d }, p0/z, [z0.d]
 207 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
 208 // CHECK-NEXT: ld1sh   { z0.d }, p0/z, [z0.d]
 209 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: