test/MC/AArch64/SVE/ld1sw.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   6 // RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
   9
  10 ld1sw   z0.d, p0/z, [x0]
  11 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0]
  12 // CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
  13 // CHECK-ERROR: instruction requires: sve
  14 // CHECK-UNKNOWN: 00 a0 80 a4 <unknown>
  15
  16 ld1sw   { z0.d }, p0/z, [x0]
  17 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0]
  18 // CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
  19 // CHECK-ERROR: instruction requires: sve
  20 // CHECK-UNKNOWN: 00 a0 80 a4 <unknown>
  21
  22 ld1sw   { z31.d }, p7/z, [sp, #-1, mul vl]
  23 // CHECK-INST: ld1sw   { z31.d }, p7/z, [sp, #-1, mul vl]
  24 // CHECK-ENCODING: [0xff,0xbf,0x8f,0xa4]
  25 // CHECK-ERROR: instruction requires: sve
  26 // CHECK-UNKNOWN: ff bf 8f a4 <unknown>
  27
  28 ld1sw   { z21.d }, p5/z, [x10, #5, mul vl]
  29 // CHECK-INST: ld1sw   { z21.d }, p5/z, [x10, #5, mul vl]
  30 // CHECK-ENCODING: [0x55,0xb5,0x85,0xa4]
  31 // CHECK-ERROR: instruction requires: sve
  32 // CHECK-UNKNOWN: 55 b5 85 a4 <unknown>
  33
  34 ld1sw    { z23.d }, p3/z, [sp, x8, lsl #2]
  35 // CHECK-INST: ld1sw    { z23.d }, p3/z, [sp, x8, lsl #2]
  36 // CHECK-ENCODING: [0xf7,0x4f,0x88,0xa4]
  37 // CHECK-ERROR: instruction requires: sve
  38 // CHECK-UNKNOWN: f7 4f 88 a4 <unknown>
  39
  40 ld1sw    { z23.d }, p3/z, [x13, x8, lsl #2]
  41 // CHECK-INST: ld1sw    { z23.d }, p3/z, [x13, x8, lsl #2]
  42 // CHECK-ENCODING: [0xb7,0x4d,0x88,0xa4]
  43 // CHECK-ERROR: instruction requires: sve
  44 // CHECK-UNKNOWN: b7 4d 88 a4 <unknown>
  45
  46 ld1sw   { z31.d }, p7/z, [sp, z31.d]
  47 // CHECK-INST: ld1sw   { z31.d }, p7/z, [sp, z31.d]
  48 // CHECK-ENCODING: [0xff,0x9f,0x5f,0xc5]
  49 // CHECK-ERROR: instruction requires: sve
  50 // CHECK-UNKNOWN: ff 9f 5f c5 <unknown>
  51
  52 ld1sw   { z23.d }, p3/z, [x13, z8.d, lsl #2]
  53 // CHECK-INST: ld1sw   { z23.d }, p3/z, [x13, z8.d, lsl #2]
  54 // CHECK-ENCODING: [0xb7,0x8d,0x68,0xc5]
  55 // CHECK-ERROR: instruction requires: sve
  56 // CHECK-UNKNOWN: b7 8d 68 c5 <unknown>
  57
  58 ld1sw   { z21.d }, p5/z, [x10, z21.d, uxtw]
  59 // CHECK-INST: ld1sw   { z21.d }, p5/z, [x10, z21.d, uxtw]
  60 // CHECK-ENCODING: [0x55,0x15,0x15,0xc5]
  61 // CHECK-ERROR: instruction requires: sve
  62 // CHECK-UNKNOWN: 55 15 15 c5 <unknown>
  63
  64 ld1sw   { z21.d }, p5/z, [x10, z21.d, sxtw]
  65 // CHECK-INST: ld1sw   { z21.d }, p5/z, [x10, z21.d, sxtw]
  66 // CHECK-ENCODING: [0x55,0x15,0x55,0xc5]
  67 // CHECK-ERROR: instruction requires: sve
  68 // CHECK-UNKNOWN: 55 15 55 c5 <unknown>
  69
  70 ld1sw   { z0.d }, p0/z, [x0, z0.d, uxtw #2]
  71 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0, z0.d, uxtw #2]
  72 // CHECK-ENCODING: [0x00,0x00,0x20,0xc5]
  73 // CHECK-ERROR: instruction requires: sve
  74 // CHECK-UNKNOWN: 00 00 20 c5 <unknown>
  75
  76 ld1sw   { z0.d }, p0/z, [x0, z0.d, sxtw #2]
  77 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0, z0.d, sxtw #2]
  78 // CHECK-ENCODING: [0x00,0x00,0x60,0xc5]
  79 // CHECK-ERROR: instruction requires: sve
  80 // CHECK-UNKNOWN: 00 00 60 c5 <unknown>
  81
  82 ld1sw   { z31.d }, p7/z, [z31.d, #124]
  83 // CHECK-INST: ld1sw   { z31.d }, p7/z, [z31.d, #124]
  84 // CHECK-ENCODING: [0xff,0x9f,0x3f,0xc5]
  85 // CHECK-ERROR: instruction requires: sve
  86 // CHECK-UNKNOWN: ff 9f 3f c5 <unknown>
  87
  88 ld1sw   { z0.d }, p0/z, [z0.d]
  89 // CHECK-INST: ld1sw   { z0.d }, p0/z, [z0.d]
  90 // CHECK-ENCODING: [0x00,0x80,0x20,0xc5]
  91 // CHECK-ERROR: instruction requires: sve
  92 // CHECK-UNKNOWN: 00 80 20 c5 <unknown>