[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / ldff1sh.s
blob3444840334f972cf0bd7ac414b69020845e6961d
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ldff1sh { z31.s }, p7/z, [sp]
11 // CHECK-INST: ldff1sh { z31.s }, p7/z, [sp]
12 // CHECK-ENCODING: [0xff,0x7f,0x3f,0xa5]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: ff 7f 3f a5 <unknown>
16 ldff1sh { z31.d }, p7/z, [sp]
17 // CHECK-INST: ldff1sh { z31.d }, p7/z, [sp]
18 // CHECK-ENCODING: [0xff,0x7f,0x1f,0xa5]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: ff 7f 1f a5 <unknown>
22 ldff1sh { z31.s }, p7/z, [sp, xzr, lsl #1]
23 // CHECK-INST: ldff1sh { z31.s }, p7/z, [sp]
24 // CHECK-ENCODING: [0xff,0x7f,0x3f,0xa5]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: ff 7f 3f a5 <unknown>
28 ldff1sh { z31.d }, p7/z, [sp, xzr, lsl #1]
29 // CHECK-INST: ldff1sh { z31.d }, p7/z, [sp]
30 // CHECK-ENCODING: [0xff,0x7f,0x1f,0xa5]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: ff 7f 1f a5 <unknown>
34 ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
35 // CHECK-INST: ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
36 // CHECK-ENCODING: [0x00,0x60,0x20,0xa5]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 00 60 20 a5 <unknown>
40 ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
41 // CHECK-INST: ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
42 // CHECK-ENCODING: [0x00,0x60,0x00,0xa5]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 00 60 00 a5 <unknown>
46 ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
47 // CHECK-INST: ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
48 // CHECK-ENCODING: [0x00,0x20,0x80,0x84]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: 00 20 80 84 <unknown>
52 ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
53 // CHECK-INST: ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
54 // CHECK-ENCODING: [0x00,0x20,0xc0,0x84]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 00 20 c0 84 <unknown>
58 ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
59 // CHECK-INST: ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
60 // CHECK-ENCODING: [0xff,0x3f,0xbf,0x84]
61 // CHECK-ERROR: instruction requires: sve
62 // CHECK-UNKNOWN: ff 3f bf 84 <unknown>
64 ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
65 // CHECK-INST: ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
66 // CHECK-ENCODING: [0xff,0x3f,0xff,0x84]
67 // CHECK-ERROR: instruction requires: sve
68 // CHECK-UNKNOWN: ff 3f ff 84 <unknown>
70 ldff1sh { z31.d }, p7/z, [sp, z31.d]
71 // CHECK-INST: ldff1sh { z31.d }, p7/z, [sp, z31.d]
72 // CHECK-ENCODING: [0xff,0xbf,0xdf,0xc4]
73 // CHECK-ERROR: instruction requires: sve
74 // CHECK-UNKNOWN: ff bf df c4 <unknown>
76 ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
77 // CHECK-INST: ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
78 // CHECK-ENCODING: [0xb7,0xad,0xe8,0xc4]
79 // CHECK-ERROR: instruction requires: sve
80 // CHECK-UNKNOWN: b7 ad e8 c4 <unknown>
82 ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
83 // CHECK-INST: ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
84 // CHECK-ENCODING: [0x55,0x35,0x95,0xc4]
85 // CHECK-ERROR: instruction requires: sve
86 // CHECK-UNKNOWN: 55 35 95 c4 <unknown>
88 ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
89 // CHECK-INST: ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
90 // CHECK-ENCODING: [0x55,0x35,0xd5,0xc4]
91 // CHECK-ERROR: instruction requires: sve
92 // CHECK-UNKNOWN: 55 35 d5 c4 <unknown>
94 ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
95 // CHECK-INST: ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
96 // CHECK-ENCODING: [0x00,0x20,0xa0,0xc4]
97 // CHECK-ERROR: instruction requires: sve
98 // CHECK-UNKNOWN: 00 20 a0 c4 <unknown>
100 ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
101 // CHECK-INST: ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
102 // CHECK-ENCODING: [0x00,0x20,0xe0,0xc4]
103 // CHECK-ERROR: instruction requires: sve
104 // CHECK-UNKNOWN: 00 20 e0 c4 <unknown>
106 ldff1sh { z31.s }, p7/z, [z31.s, #62]
107 // CHECK-INST: ldff1sh { z31.s }, p7/z, [z31.s, #62]
108 // CHECK-ENCODING: [0xff,0xbf,0xbf,0x84]
109 // CHECK-ERROR: instruction requires: sve
110 // CHECK-UNKNOWN: ff bf bf 84 <unknown>
112 ldff1sh { z0.s }, p0/z, [z0.s]
113 // CHECK-INST: ldff1sh { z0.s }, p0/z, [z0.s]
114 // CHECK-ENCODING: [0x00,0xa0,0xa0,0x84]
115 // CHECK-ERROR: instruction requires: sve
116 // CHECK-UNKNOWN: 00 a0 a0 84 <unknown>
118 ldff1sh { z31.d }, p7/z, [z31.d, #62]
119 // CHECK-INST: ldff1sh { z31.d }, p7/z, [z31.d, #62]
120 // CHECK-ENCODING: [0xff,0xbf,0xbf,0xc4]
121 // CHECK-ERROR: instruction requires: sve
122 // CHECK-UNKNOWN: ff bf bf c4 <unknown>
124 ldff1sh { z0.d }, p0/z, [z0.d]
125 // CHECK-INST: ldff1sh { z0.d }, p0/z, [z0.d]
126 // CHECK-ENCODING: [0x00,0xa0,0xa0,0xc4]
127 // CHECK-ERROR: instruction requires: sve
128 // CHECK-UNKNOWN: 00 a0 a0 c4 <unknown>