test/MC/AArch64/SVE/ldnf1sb.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   6 // RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
   9
  10 ldnf1sb   z0.h, p0/z, [x0]
  11 // CHECK-INST: ldnf1sb   { z0.h }, p0/z, [x0]
  12 // CHECK-ENCODING: [0x00,0xa0,0xd0,0xa5]
  13 // CHECK-ERROR: instruction requires: sve
  14 // CHECK-UNKNOWN: 00 a0 d0 a5 <unknown>
  15
  16 ldnf1sb   z0.s, p0/z, [x0]
  17 // CHECK-INST: ldnf1sb   { z0.s }, p0/z, [x0]
  18 // CHECK-ENCODING: [0x00,0xa0,0xb0,0xa5]
  19 // CHECK-ERROR: instruction requires: sve
  20 // CHECK-UNKNOWN: 00 a0 b0 a5 <unknown>
  21
  22 ldnf1sb   z0.d, p0/z, [x0]
  23 // CHECK-INST: ldnf1sb   { z0.d }, p0/z, [x0]
  24 // CHECK-ENCODING: [0x00,0xa0,0x90,0xa5]
  25 // CHECK-ERROR: instruction requires: sve
  26 // CHECK-UNKNOWN: 00 a0 90 a5 <unknown>
  27
  28 ldnf1sb   { z0.h }, p0/z, [x0]
  29 // CHECK-INST: ldnf1sb   { z0.h }, p0/z, [x0]
  30 // CHECK-ENCODING: [0x00,0xa0,0xd0,0xa5]
  31 // CHECK-ERROR: instruction requires: sve
  32 // CHECK-UNKNOWN: 00 a0 d0 a5 <unknown>
  33
  34 ldnf1sb   { z0.s }, p0/z, [x0]
  35 // CHECK-INST: ldnf1sb   { z0.s }, p0/z, [x0]
  36 // CHECK-ENCODING: [0x00,0xa0,0xb0,0xa5]
  37 // CHECK-ERROR: instruction requires: sve
  38 // CHECK-UNKNOWN: 00 a0 b0 a5 <unknown>
  39
  40 ldnf1sb   { z0.d }, p0/z, [x0]
  41 // CHECK-INST: ldnf1sb   { z0.d }, p0/z, [x0]
  42 // CHECK-ENCODING: [0x00,0xa0,0x90,0xa5]
  43 // CHECK-ERROR: instruction requires: sve
  44 // CHECK-UNKNOWN: 00 a0 90 a5 <unknown>
  45
  46 ldnf1sb   { z31.h }, p7/z, [sp, #-1, mul vl]
  47 // CHECK-INST: ldnf1sb   { z31.h }, p7/z, [sp, #-1, mul vl]
  48 // CHECK-ENCODING: [0xff,0xbf,0xdf,0xa5]
  49 // CHECK-ERROR: instruction requires: sve
  50 // CHECK-UNKNOWN: ff bf df a5 <unknown>
  51
  52 ldnf1sb   { z21.h }, p5/z, [x10, #5, mul vl]
  53 // CHECK-INST: ldnf1sb   { z21.h }, p5/z, [x10, #5, mul vl]
  54 // CHECK-ENCODING: [0x55,0xb5,0xd5,0xa5]
  55 // CHECK-ERROR: instruction requires: sve
  56 // CHECK-UNKNOWN: 55 b5 d5 a5 <unknown>
  57
  58 ldnf1sb   { z31.s }, p7/z, [sp, #-1, mul vl]
  59 // CHECK-INST: ldnf1sb   { z31.s }, p7/z, [sp, #-1, mul vl]
  60 // CHECK-ENCODING: [0xff,0xbf,0xbf,0xa5]
  61 // CHECK-ERROR: instruction requires: sve
  62 // CHECK-UNKNOWN: ff bf bf a5 <unknown>
  63
  64 ldnf1sb   { z21.s }, p5/z, [x10, #5, mul vl]
  65 // CHECK-INST: ldnf1sb   { z21.s }, p5/z, [x10, #5, mul vl]
  66 // CHECK-ENCODING: [0x55,0xb5,0xb5,0xa5]
  67 // CHECK-ERROR: instruction requires: sve
  68 // CHECK-UNKNOWN: 55 b5 b5 a5 <unknown>
  69
  70 ldnf1sb   { z31.d }, p7/z, [sp, #-1, mul vl]
  71 // CHECK-INST: ldnf1sb   { z31.d }, p7/z, [sp, #-1, mul vl]
  72 // CHECK-ENCODING: [0xff,0xbf,0x9f,0xa5]
  73 // CHECK-ERROR: instruction requires: sve
  74 // CHECK-UNKNOWN: ff bf 9f a5 <unknown>
  75
  76 ldnf1sb   { z21.d }, p5/z, [x10, #5, mul vl]
  77 // CHECK-INST: ldnf1sb   { z21.d }, p5/z, [x10, #5, mul vl]
  78 // CHECK-ENCODING: [0x55,0xb5,0x95,0xa5]
  79 // CHECK-ERROR: instruction requires: sve
  80 // CHECK-UNKNOWN: 55 b5 95 a5 <unknown>