[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / ldnf1w.s
blob5010cdc3149d9f672fd6e334096ca2954e5bd1b9
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ldnf1w z0.s, p0/z, [x0]
11 // CHECK-INST: ldnf1w { z0.s }, p0/z, [x0]
12 // CHECK-ENCODING: [0x00,0xa0,0x50,0xa5]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 a0 50 a5 <unknown>
16 ldnf1w z0.d, p0/z, [x0]
17 // CHECK-INST: ldnf1w { z0.d }, p0/z, [x0]
18 // CHECK-ENCODING: [0x00,0xa0,0x70,0xa5]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 00 a0 70 a5 <unknown>
22 ldnf1w { z0.s }, p0/z, [x0]
23 // CHECK-INST: ldnf1w { z0.s }, p0/z, [x0]
24 // CHECK-ENCODING: [0x00,0xa0,0x50,0xa5]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 a0 50 a5 <unknown>
28 ldnf1w { z0.d }, p0/z, [x0]
29 // CHECK-INST: ldnf1w { z0.d }, p0/z, [x0]
30 // CHECK-ENCODING: [0x00,0xa0,0x70,0xa5]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: 00 a0 70 a5 <unknown>
34 ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
35 // CHECK-INST: ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
36 // CHECK-ENCODING: [0xff,0xbf,0x5f,0xa5]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: ff bf 5f a5 <unknown>
40 ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
41 // CHECK-INST: ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
42 // CHECK-ENCODING: [0x55,0xb5,0x55,0xa5]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 55 b5 55 a5 <unknown>
46 ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
47 // CHECK-INST: ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
48 // CHECK-ENCODING: [0xff,0xbf,0x7f,0xa5]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: ff bf 7f a5 <unknown>
52 ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
53 // CHECK-INST: ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
54 // CHECK-ENCODING: [0x55,0xb5,0x75,0xa5]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 55 b5 75 a5 <unknown>