[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / lsrr-diagnostics.s
blob154c8474e271bdaeb1748c10ba836713440aed28
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
3 lsrr z0.b, p8/m, z0.b, z0.b
4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
5 // CHECK-NEXT: lsrr z0.b, p8/m, z0.b, z0.b
6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
8 lsrr z0.b, p0/m, z0.b, z0.d
9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
10 // CHECK-NEXT: lsrr z0.b, p0/m, z0.b, z0.d
11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
13 lsrr z0.h, p0/m, z0.h, z0.d
14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
15 // CHECK-NEXT: lsrr z0.h, p0/m, z0.h, z0.d
16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
18 lsrr z0.s, p0/m, z0.s, z0.d
19 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
20 // CHECK-NEXT: lsrr z0.s, p0/m, z0.s, z0.d
21 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: