test/MC/AArch64/SVE/movprfx.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   6 // RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
   9
  10 // This test file is mostly empty because most 'movprfx' tests are embedded
  11 // with other instructions that are destructive and can be prefixed
  12 // by the movprfx instruction. A list of destructive instructions
  13 // is given below by their mnemonic, which have tests in corresponding
  14 // <mnemonic>.s test files:
  15 //
  16 // abs     decp    fdivr   fnmla   fsubr   mov     sdivr   sqincw  umulh
  17 // add     eon     fmad    fnmls   ftmad   msb     sdot    sqsub   uqadd
  18 // and     eor     fmax    fnmsb   incd    mul     smax    sub     uqdecd
  19 // asr     ext     fmaxnm  frecpx  inch    neg     smin    subr    uqdech
  20 // asrd    fabd    fmin    frinta  incp    not     smulh   sxtb    uqdecp
  21 // asrr    fabs    fminnm  frinti  incw    orn     splice  sxth    uqdecw
  22 // bic     fadd    fmla    frintm  insr    orr     sqadd   sxtw    uqincd
  23 // clasta  fcadd   fmls    frintn  lsl     rbit    sqdecd  uabd    uqinch
  24 // clastb  fcmla   fmov    frintp  lslr    revb    sqdech  ucvtf   uqincp
  25 // cls     fcpy    fmsb    frintx  lsr     revh    sqdecp  udiv    uqincw
  26 // clz     fcvt    fmul    frintz  lsrr    revw    sqdecw  udivr   uqsub
  27 // cnot    fcvtzs  fmulx   fscale  mad     sabd    sqincd  udot    uxtb
  28 // cnt     fcvtzu  fneg    fsqrt   mla     scvtf   sqinch  umax    uxth
  29 // cpy     fdiv    fnmad   fsub    mls     sdiv    sqincp  umin    uxtw
  30
  31
  32 // ------------------------------------------------------------------------- //
  33 // Test compatibility with MOVPRFX instruction with BRK and HLT.
  34 //
  35 // Section 7.1.2 of the SVE Architecture Reference Manual Supplement:
  36 //   "it is permitted to use MOVPRFX to prefix an A64 BRK or HLT instruction"
  37
  38 movprfx z0, z1
  39 // CHECK-INST: movprfx  z0, z1
  40 // CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
  41 // CHECK-ERROR: instruction requires: sve
  42 // CHECK-UNKNOWN: 20 bc 20 04 <unknown>
  43
  44 hlt #1
  45 // CHECK-INST: hlt      #0x1
  46 // CHECK-ENCODING: [0x20,0x00,0x40,0xd4]
  47
  48 movprfx z0.d, p0/z, z1.d
  49 // CHECK-INST: movprfx  z0.d, p0/z, z1.d
  50 // CHECK-ENCODING: [0x20,0x20,0xd0,0x04]
  51 // CHECK-ERROR: instruction requires: sve
  52 // CHECK-UNKNOWN: 20 20 d0 04 <unknown>
  53
  54 hlt #1
  55 // CHECK-INST: hlt      #0x1
  56 // CHECK-ENCODING: [0x20,0x00,0x40,0xd4]
  57
  58 movprfx z0, z1
  59 // CHECK-INST: movprfx  z0, z1
  60 // CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
  61 // CHECK-ERROR: instruction requires: sve
  62 // CHECK-UNKNOWN: 20 bc 20 04 <unknown>
  63
  64 brk #1
  65 // CHECK-INST: brk      #0x1
  66 // CHECK-ENCODING: [0x20,0x00,0x20,0xd4]
  67
  68 movprfx z0.d, p0/z, z1.d
  69 // CHECK-INST: movprfx  z0.d, p0/z, z1.d
  70 // CHECK-ENCODING: [0x20,0x20,0xd0,0x04]
  71 // CHECK-ERROR: instruction requires: sve
  72 // CHECK-UNKNOWN: 20 20 d0 04 <unknown>
  73
  74 brk #1
  75 // CHECK-INST: brk      #0x1
  76 // CHECK-ENCODING: [0x20,0x00,0x20,0xd4]
  77
  78 // ------------------------------------------------------------------------- //
  79 // Ensure we don't try to apply a prefix to subsequent instructions (upon success)
  80
  81 movprfx z0, z1
  82 // CHECK-INST: movprfx  z0, z1
  83 // CHECK-ENCODING: [0x20,0xbc,0x20,0x04]
  84 // CHECK-ERROR: instruction requires: sve
  85 // CHECK-UNKNOWN: 20 bc 20 04 <unknown>
  86
  87 add z0.d, p0/m, z0.d, z1.d
  88 // CHECK-INST: add      z0.d, p0/m, z0.d, z1.d
  89 // CHECK-ENCODING: [0x20,0x00,0xc0,0x04]
  90 // CHECK-ERROR: instruction requires: sve
  91 // CHECK-UNKNOWN: 20 00 c0 04 <unknown>
  92
  93 add z0.d, p0/m, z0.d, z1.d
  94 // CHECK-INST: add      z0.d, p0/m, z0.d, z1.d
  95 // CHECK-ENCODING: [0x20,0x00,0xc0,0x04]
  96 // CHECK-ERROR: instruction requires: sve
  97 // CHECK-UNKNOWN: 20 00 c0 04 <unknown>