[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / prfb-diagnostics.s
blobeddd975d8060aa323f06cc67da6e962ee4925831
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // --------------------------------------------------------------------------//
5 // invalid/missing predicate operation specifier
7 prfb p0, [x0]
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
9 // CHECK-NEXT: prfb p0, [x0]
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 prfb #16, p0, [x0]
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
14 // CHECK-NEXT: prfb #16, p0, [x0]
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 prfb plil1keep, p0, [x0]
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
19 // CHECK-NEXT: prfb plil1keep, p0, [x0]
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
22 prfb #pldl1keep, p0, [x0]
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
24 // CHECK-NEXT: prfb #pldl1keep, p0, [x0]
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
28 // --------------------------------------------------------------------------//
29 // invalid scalar + scalar addressing modes
31 prfb #0, p0, [x0, #-33, mul vl]
32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
33 // CHECK-NEXT: prfb #0, p0, [x0, #-33, mul vl]
34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36 prfb #0, p0, [x0, #32, mul vl]
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
38 // CHECK-NEXT: prfb #0, p0, [x0, #32, mul vl]
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
41 prfb #0, p0, [x0, w0]
42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
43 // CHECK-NEXT: prfb #0, p0, [x0, w0]
44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
46 prfb #0, p0, [x0, x0, uxtw]
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
48 // CHECK-NEXT: prfb #0, p0, [x0, x0, uxtw]
49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
51 prfb #0, p0, [x0, x0, lsl #2]
52 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
53 // CHECK-NEXT: prfb #0, p0, [x0, x0, lsl #2]
54 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
57 // --------------------------------------------------------------------------//
58 // Invalid scalar + vector addressing modes
60 prfb #0, p0, [x0, z0.b]
61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
62 // CHECK-NEXT: prfb #0, p0, [x0, z0.b]
63 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
65 prfb #0, p0, [x0, z0.h]
66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
67 // CHECK-NEXT: prfb #0, p0, [x0, z0.h]
68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
70 prfb #0, p0, [x0, z0.s]
71 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
72 // CHECK-NEXT: prfb #0, p0, [x0, z0.s]
73 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
75 prfb #0, p0, [x0, z0.s]
76 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
77 // CHECK-NEXT: prfb #0, p0, [x0, z0.s]
78 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
80 prfb #0, p0, [x0, z0.s, uxtw #1]
81 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
82 // CHECK-NEXT: prfb #0, p0, [x0, z0.s, uxtw #1]
83 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
85 prfb #0, p0, [x0, z0.s, lsl #0]
86 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw)'
87 // CHECK-NEXT: prfb #0, p0, [x0, z0.s, lsl #0]
88 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
90 prfb #0, p0, [x0, z0.d, lsl #1]
91 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
92 // CHECK-NEXT: prfb #0, p0, [x0, z0.d, lsl #1]
93 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
95 prfb #0, p0, [x0, z0.d, sxtw #1]
96 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (uxtw|sxtw)'
97 // CHECK-NEXT: prfb #0, p0, [x0, z0.d, sxtw #1]
98 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
100 // --------------------------------------------------------------------------//
101 // Invalid vector + immediate addressing modes
103 prfb #0, p0, [z0.s, #-1]
104 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
105 // CHECK-NEXT: prfb #0, p0, [z0.s, #-1]
106 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
108 prfb #0, p0, [z0.s, #32]
109 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
110 // CHECK-NEXT: prfb #0, p0, [z0.s, #32]
111 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
113 prfb #0, p0, [z0.d, #-1]
114 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
115 // CHECK-NEXT: prfb #0, p0, [z0.d, #-1]
116 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
118 prfb #0, p0, [z0.d, #32]
119 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 31].
120 // CHECK-NEXT: prfb #0, p0, [z0.d, #32]
121 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
124 // --------------------------------------------------------------------------//
125 // Invalid predicate
127 prfb #0, p8, [x0]
128 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
129 // CHECK-NEXT: prfb #0, p8, [x0]
130 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
132 prfb #0, p7.b, [x0]
133 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
134 // CHECK-NEXT: prfb #0, p7.b, [x0]
135 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
137 prfb #0, p7.q, [x0]
138 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
139 // CHECK-NEXT: prfb #0, p7.q, [x0]
140 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
143 // --------------------------------------------------------------------------//
144 // Negative tests for instructions that are incompatible with movprfx
146 movprfx z0.d, p0/z, z7.d
147 prfb pldl1keep, p0, [x0, z0.d]
148 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
149 // CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d]
150 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
152 movprfx z0, z7
153 prfb pldl1keep, p0, [x0, z0.d]
154 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
155 // CHECK-NEXT: prfb pldl1keep, p0, [x0, z0.d]
156 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: