test/MC/AArch64/SVE/prfd-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3
   4 // --------------------------------------------------------------------------//
   5 // invalid/missing predicate operation specifier
   6
   7 prfd p0, [x0]
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
   9 // CHECK-NEXT: prfd p0, [x0]
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12 prfd #16, p0, [x0]
  13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch operand out of range, [0,15] expected
  14 // CHECK-NEXT: prfd #16, p0, [x0]
  15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  16
  17 prfd plil1keep, p0, [x0]
  18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: prefetch hint expected
  19 // CHECK-NEXT: prfd plil1keep, p0, [x0]
  20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  21
  22 prfd #pldl1keep, p0, [x0]
  23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate value expected for prefetch operand
  24 // CHECK-NEXT: prfd #pldl1keep, p0, [x0]
  25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  26
  27
  28 // --------------------------------------------------------------------------//
  29 // invalid scalar + scalar addressing modes
  30
  31 prfd #0, p0, [x0, #-33, mul vl]
  32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
  33 // CHECK-NEXT: prfd #0, p0, [x0, #-33, mul vl]
  34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  35
  36 prfd #0, p0, [x0, #32, mul vl]
  37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-32, 31].
  38 // CHECK-NEXT: prfd #0, p0, [x0, #32, mul vl]
  39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  40
  41 prfd #0, p0, [x0, w0]
  42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
  43 // CHECK-NEXT: prfd #0, p0, [x0, w0]
  44 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  45
  46 prfd #0, p0, [x0, x0, uxtw]
  47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
  48 // CHECK-NEXT: prfd #0, p0, [x0, x0, uxtw]
  49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  50
  51 prfd #0, p0, [x0, x0, lsl #1]
  52 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
  53 // CHECK-NEXT: prfd #0, p0, [x0, x0, lsl #1]
  54 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  55
  56
  57 // --------------------------------------------------------------------------//
  58 // Invalid scalar + vector addressing modes
  59
  60 prfd #0, p0, [x0, z0.s]
  61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].s, (uxtw|sxtw) #3'
  62 // CHECK-NEXT: prfd #0, p0, [x0, z0.s]
  63 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  64
  65 prfd #0, p0, [x0, z0.d, uxtw #2]
  66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
  67 // CHECK-NEXT: prfd #0, p0, [x0, z0.d, uxtw #2]
  68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  69
  70 prfd #0, p0, [x0, z0.d, lsl #2]
  71 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
  72 // CHECK-NEXT: prfd #0, p0, [x0, z0.d, lsl #2]
  73 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  74
  75 prfd #0, p0, [x0, z0.d, lsl]
  76 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
  77 // CHECK-NEXT: prfd #0, p0, [x0, z0.d, lsl]
  78 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  79
  80
  81 // --------------------------------------------------------------------------//
  82 // Invalid vector + immediate addressing modes
  83
  84 prfd #0, p0, [z0.d, #-8]
  85 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
  86 // CHECK-NEXT: prfd #0, p0, [z0.d, #-8]
  87 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  88
  89 prfd #0, p0, [z0.d, #-1]
  90 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
  91 // CHECK-NEXT: prfd #0, p0, [z0.d, #-1]
  92 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  93
  94 prfd #0, p0, [z0.d, #249]
  95 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
  96 // CHECK-NEXT: prfd #0, p0, [z0.d, #249]
  97 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  98
  99 prfd #0, p0, [z0.d, #256]
 100 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
 101 // CHECK-NEXT: prfd #0, p0, [z0.d, #256]
 102 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 103
 104 prfd #0, p0, [z0.d, #3]
 105 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 8 in range [0, 248].
 106 // CHECK-NEXT: prfd #0, p0, [z0.d, #3]
 107 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 108
 109
 110 // --------------------------------------------------------------------------//
 111 // Invalid predicate
 112
 113 prfd #0, p8, [x0]
 114 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
 115 // CHECK-NEXT: prfd #0, p8, [x0]
 116 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 117
 118 prfd #0, p7.b, [x0]
 119 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
 120 // CHECK-NEXT: prfd #0, p7.b, [x0]
 121 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 122
 123 prfd #0, p7.q, [x0]
 124 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
 125 // CHECK-NEXT: prfd #0, p7.q, [x0]
 126 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 127
 128
 129 // --------------------------------------------------------------------------//
 130 // Negative tests for instructions that are incompatible with movprfx
 131
 132 movprfx z0.d, p0/z, z7.d
 133 prfd    pldl1keep, p0, [x0, z0.d, lsl #3]
 134 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
 135 // CHECK-NEXT: prfd    pldl1keep, p0, [x0, z0.d, lsl #3]
 136 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
 137
 138 movprfx z0, z7
 139 prfd    pldl1keep, p0, [x0, z0.d, lsl #3]
 140 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
 141 // CHECK-NEXT: prfd    pldl1keep, p0, [x0, z0.d, lsl #3]
 142 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: