[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / rbit-diagnostics.s
blobe1f33b7b7fd713a1e5f345e7e7bd373893a8a4e8
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid predicate
7 rbit z0.d, p8/m, z0.d
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
9 // CHECK-NEXT: rbit z0.d, p8/m, z0.d
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: