[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / sqinch.s
blob6ed6dc4758e03281385edbaef65cd21326704320
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 // ---------------------------------------------------------------------------//
11 // Test 64-bit form (x0) and its aliases
12 // ---------------------------------------------------------------------------//
14 sqinch x0
15 // CHECK-INST: sqinch x0
16 // CHECK-ENCODING: [0xe0,0xf3,0x70,0x04]
17 // CHECK-ERROR: instruction requires: sve
18 // CHECK-UNKNOWN: e0 f3 70 04 <unknown>
20 sqinch x0, all
21 // CHECK-INST: sqinch x0
22 // CHECK-ENCODING: [0xe0,0xf3,0x70,0x04]
23 // CHECK-ERROR: instruction requires: sve
24 // CHECK-UNKNOWN: e0 f3 70 04 <unknown>
26 sqinch x0, all, mul #1
27 // CHECK-INST: sqinch x0
28 // CHECK-ENCODING: [0xe0,0xf3,0x70,0x04]
29 // CHECK-ERROR: instruction requires: sve
30 // CHECK-UNKNOWN: e0 f3 70 04 <unknown>
32 sqinch x0, all, mul #16
33 // CHECK-INST: sqinch x0, all, mul #16
34 // CHECK-ENCODING: [0xe0,0xf3,0x7f,0x04]
35 // CHECK-ERROR: instruction requires: sve
36 // CHECK-UNKNOWN: e0 f3 7f 04 <unknown>
39 // ---------------------------------------------------------------------------//
40 // Test 32-bit form (x0, w0) and its aliases
41 // ---------------------------------------------------------------------------//
43 sqinch x0, w0
44 // CHECK-INST: sqinch x0, w0
45 // CHECK-ENCODING: [0xe0,0xf3,0x60,0x04]
46 // CHECK-ERROR: instruction requires: sve
47 // CHECK-UNKNOWN: e0 f3 60 04 <unknown>
49 sqinch x0, w0, all
50 // CHECK-INST: sqinch x0, w0
51 // CHECK-ENCODING: [0xe0,0xf3,0x60,0x04]
52 // CHECK-ERROR: instruction requires: sve
53 // CHECK-UNKNOWN: e0 f3 60 04 <unknown>
55 sqinch x0, w0, all, mul #1
56 // CHECK-INST: sqinch x0, w0
57 // CHECK-ENCODING: [0xe0,0xf3,0x60,0x04]
58 // CHECK-ERROR: instruction requires: sve
59 // CHECK-UNKNOWN: e0 f3 60 04 <unknown>
61 sqinch x0, w0, all, mul #16
62 // CHECK-INST: sqinch x0, w0, all, mul #16
63 // CHECK-ENCODING: [0xe0,0xf3,0x6f,0x04]
64 // CHECK-ERROR: instruction requires: sve
65 // CHECK-UNKNOWN: e0 f3 6f 04 <unknown>
67 sqinch x0, w0, pow2
68 // CHECK-INST: sqinch x0, w0, pow2
69 // CHECK-ENCODING: [0x00,0xf0,0x60,0x04]
70 // CHECK-ERROR: instruction requires: sve
71 // CHECK-UNKNOWN: 00 f0 60 04 <unknown>
73 sqinch x0, w0, pow2, mul #16
74 // CHECK-INST: sqinch x0, w0, pow2, mul #16
75 // CHECK-ENCODING: [0x00,0xf0,0x6f,0x04]
76 // CHECK-ERROR: instruction requires: sve
77 // CHECK-UNKNOWN: 00 f0 6f 04 <unknown>
80 // ---------------------------------------------------------------------------//
81 // Test vector form and aliases.
82 // ---------------------------------------------------------------------------//
83 sqinch z0.h
84 // CHECK-INST: sqinch z0.h
85 // CHECK-ENCODING: [0xe0,0xc3,0x60,0x04]
86 // CHECK-ERROR: instruction requires: sve
87 // CHECK-UNKNOWN: e0 c3 60 04 <unknown>
89 sqinch z0.h, all
90 // CHECK-INST: sqinch z0.h
91 // CHECK-ENCODING: [0xe0,0xc3,0x60,0x04]
92 // CHECK-ERROR: instruction requires: sve
93 // CHECK-UNKNOWN: e0 c3 60 04 <unknown>
95 sqinch z0.h, all, mul #1
96 // CHECK-INST: sqinch z0.h
97 // CHECK-ENCODING: [0xe0,0xc3,0x60,0x04]
98 // CHECK-ERROR: instruction requires: sve
99 // CHECK-UNKNOWN: e0 c3 60 04 <unknown>
101 sqinch z0.h, all, mul #16
102 // CHECK-INST: sqinch z0.h, all, mul #16
103 // CHECK-ENCODING: [0xe0,0xc3,0x6f,0x04]
104 // CHECK-ERROR: instruction requires: sve
105 // CHECK-UNKNOWN: e0 c3 6f 04 <unknown>
107 sqinch z0.h, pow2
108 // CHECK-INST: sqinch z0.h, pow2
109 // CHECK-ENCODING: [0x00,0xc0,0x60,0x04]
110 // CHECK-ERROR: instruction requires: sve
111 // CHECK-UNKNOWN: 00 c0 60 04 <unknown>
113 sqinch z0.h, pow2, mul #16
114 // CHECK-INST: sqinch z0.h, pow2, mul #16
115 // CHECK-ENCODING: [0x00,0xc0,0x6f,0x04]
116 // CHECK-ERROR: instruction requires: sve
117 // CHECK-UNKNOWN: 00 c0 6f 04 <unknown>
120 // ---------------------------------------------------------------------------//
121 // Test all patterns for 64-bit form
122 // ---------------------------------------------------------------------------//
124 sqinch x0, pow2
125 // CHECK-INST: sqinch x0, pow2
126 // CHECK-ENCODING: [0x00,0xf0,0x70,0x04]
127 // CHECK-ERROR: instruction requires: sve
128 // CHECK-UNKNOWN: 00 f0 70 04 <unknown>
130 sqinch x0, vl1
131 // CHECK-INST: sqinch x0, vl1
132 // CHECK-ENCODING: [0x20,0xf0,0x70,0x04]
133 // CHECK-ERROR: instruction requires: sve
134 // CHECK-UNKNOWN: 20 f0 70 04 <unknown>
136 sqinch x0, vl2
137 // CHECK-INST: sqinch x0, vl2
138 // CHECK-ENCODING: [0x40,0xf0,0x70,0x04]
139 // CHECK-ERROR: instruction requires: sve
140 // CHECK-UNKNOWN: 40 f0 70 04 <unknown>
142 sqinch x0, vl3
143 // CHECK-INST: sqinch x0, vl3
144 // CHECK-ENCODING: [0x60,0xf0,0x70,0x04]
145 // CHECK-ERROR: instruction requires: sve
146 // CHECK-UNKNOWN: 60 f0 70 04 <unknown>
148 sqinch x0, vl4
149 // CHECK-INST: sqinch x0, vl4
150 // CHECK-ENCODING: [0x80,0xf0,0x70,0x04]
151 // CHECK-ERROR: instruction requires: sve
152 // CHECK-UNKNOWN: 80 f0 70 04 <unknown>
154 sqinch x0, vl5
155 // CHECK-INST: sqinch x0, vl5
156 // CHECK-ENCODING: [0xa0,0xf0,0x70,0x04]
157 // CHECK-ERROR: instruction requires: sve
158 // CHECK-UNKNOWN: a0 f0 70 04 <unknown>
160 sqinch x0, vl6
161 // CHECK-INST: sqinch x0, vl6
162 // CHECK-ENCODING: [0xc0,0xf0,0x70,0x04]
163 // CHECK-ERROR: instruction requires: sve
164 // CHECK-UNKNOWN: c0 f0 70 04 <unknown>
166 sqinch x0, vl7
167 // CHECK-INST: sqinch x0, vl7
168 // CHECK-ENCODING: [0xe0,0xf0,0x70,0x04]
169 // CHECK-ERROR: instruction requires: sve
170 // CHECK-UNKNOWN: e0 f0 70 04 <unknown>
172 sqinch x0, vl8
173 // CHECK-INST: sqinch x0, vl8
174 // CHECK-ENCODING: [0x00,0xf1,0x70,0x04]
175 // CHECK-ERROR: instruction requires: sve
176 // CHECK-UNKNOWN: 00 f1 70 04 <unknown>
178 sqinch x0, vl16
179 // CHECK-INST: sqinch x0, vl16
180 // CHECK-ENCODING: [0x20,0xf1,0x70,0x04]
181 // CHECK-ERROR: instruction requires: sve
182 // CHECK-UNKNOWN: 20 f1 70 04 <unknown>
184 sqinch x0, vl32
185 // CHECK-INST: sqinch x0, vl32
186 // CHECK-ENCODING: [0x40,0xf1,0x70,0x04]
187 // CHECK-ERROR: instruction requires: sve
188 // CHECK-UNKNOWN: 40 f1 70 04 <unknown>
190 sqinch x0, vl64
191 // CHECK-INST: sqinch x0, vl64
192 // CHECK-ENCODING: [0x60,0xf1,0x70,0x04]
193 // CHECK-ERROR: instruction requires: sve
194 // CHECK-UNKNOWN: 60 f1 70 04 <unknown>
196 sqinch x0, vl128
197 // CHECK-INST: sqinch x0, vl128
198 // CHECK-ENCODING: [0x80,0xf1,0x70,0x04]
199 // CHECK-ERROR: instruction requires: sve
200 // CHECK-UNKNOWN: 80 f1 70 04 <unknown>
202 sqinch x0, vl256
203 // CHECK-INST: sqinch x0, vl256
204 // CHECK-ENCODING: [0xa0,0xf1,0x70,0x04]
205 // CHECK-ERROR: instruction requires: sve
206 // CHECK-UNKNOWN: a0 f1 70 04 <unknown>
208 sqinch x0, #14
209 // CHECK-INST: sqinch x0, #14
210 // CHECK-ENCODING: [0xc0,0xf1,0x70,0x04]
211 // CHECK-ERROR: instruction requires: sve
212 // CHECK-UNKNOWN: c0 f1 70 04 <unknown>
214 sqinch x0, #15
215 // CHECK-INST: sqinch x0, #15
216 // CHECK-ENCODING: [0xe0,0xf1,0x70,0x04]
217 // CHECK-ERROR: instruction requires: sve
218 // CHECK-UNKNOWN: e0 f1 70 04 <unknown>
220 sqinch x0, #16
221 // CHECK-INST: sqinch x0, #16
222 // CHECK-ENCODING: [0x00,0xf2,0x70,0x04]
223 // CHECK-ERROR: instruction requires: sve
224 // CHECK-UNKNOWN: 00 f2 70 04 <unknown>
226 sqinch x0, #17
227 // CHECK-INST: sqinch x0, #17
228 // CHECK-ENCODING: [0x20,0xf2,0x70,0x04]
229 // CHECK-ERROR: instruction requires: sve
230 // CHECK-UNKNOWN: 20 f2 70 04 <unknown>
232 sqinch x0, #18
233 // CHECK-INST: sqinch x0, #18
234 // CHECK-ENCODING: [0x40,0xf2,0x70,0x04]
235 // CHECK-ERROR: instruction requires: sve
236 // CHECK-UNKNOWN: 40 f2 70 04 <unknown>
238 sqinch x0, #19
239 // CHECK-INST: sqinch x0, #19
240 // CHECK-ENCODING: [0x60,0xf2,0x70,0x04]
241 // CHECK-ERROR: instruction requires: sve
242 // CHECK-UNKNOWN: 60 f2 70 04 <unknown>
244 sqinch x0, #20
245 // CHECK-INST: sqinch x0, #20
246 // CHECK-ENCODING: [0x80,0xf2,0x70,0x04]
247 // CHECK-ERROR: instruction requires: sve
248 // CHECK-UNKNOWN: 80 f2 70 04 <unknown>
250 sqinch x0, #21
251 // CHECK-INST: sqinch x0, #21
252 // CHECK-ENCODING: [0xa0,0xf2,0x70,0x04]
253 // CHECK-ERROR: instruction requires: sve
254 // CHECK-UNKNOWN: a0 f2 70 04 <unknown>
256 sqinch x0, #22
257 // CHECK-INST: sqinch x0, #22
258 // CHECK-ENCODING: [0xc0,0xf2,0x70,0x04]
259 // CHECK-ERROR: instruction requires: sve
260 // CHECK-UNKNOWN: c0 f2 70 04 <unknown>
262 sqinch x0, #23
263 // CHECK-INST: sqinch x0, #23
264 // CHECK-ENCODING: [0xe0,0xf2,0x70,0x04]
265 // CHECK-ERROR: instruction requires: sve
266 // CHECK-UNKNOWN: e0 f2 70 04 <unknown>
268 sqinch x0, #24
269 // CHECK-INST: sqinch x0, #24
270 // CHECK-ENCODING: [0x00,0xf3,0x70,0x04]
271 // CHECK-ERROR: instruction requires: sve
272 // CHECK-UNKNOWN: 00 f3 70 04 <unknown>
274 sqinch x0, #25
275 // CHECK-INST: sqinch x0, #25
276 // CHECK-ENCODING: [0x20,0xf3,0x70,0x04]
277 // CHECK-ERROR: instruction requires: sve
278 // CHECK-UNKNOWN: 20 f3 70 04 <unknown>
280 sqinch x0, #26
281 // CHECK-INST: sqinch x0, #26
282 // CHECK-ENCODING: [0x40,0xf3,0x70,0x04]
283 // CHECK-ERROR: instruction requires: sve
284 // CHECK-UNKNOWN: 40 f3 70 04 <unknown>
286 sqinch x0, #27
287 // CHECK-INST: sqinch x0, #27
288 // CHECK-ENCODING: [0x60,0xf3,0x70,0x04]
289 // CHECK-ERROR: instruction requires: sve
290 // CHECK-UNKNOWN: 60 f3 70 04 <unknown>
292 sqinch x0, #28
293 // CHECK-INST: sqinch x0, #28
294 // CHECK-ENCODING: [0x80,0xf3,0x70,0x04]
295 // CHECK-ERROR: instruction requires: sve
296 // CHECK-UNKNOWN: 80 f3 70 04 <unknown>
299 // --------------------------------------------------------------------------//
300 // Test compatibility with MOVPRFX instruction.
302 movprfx z0, z7
303 // CHECK-INST: movprfx z0, z7
304 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
305 // CHECK-ERROR: instruction requires: sve
306 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
308 sqinch z0.h
309 // CHECK-INST: sqinch z0.h
310 // CHECK-ENCODING: [0xe0,0xc3,0x60,0x04]
311 // CHECK-ERROR: instruction requires: sve
312 // CHECK-UNKNOWN: e0 c3 60 04 <unknown>
314 movprfx z0, z7
315 // CHECK-INST: movprfx z0, z7
316 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
317 // CHECK-ERROR: instruction requires: sve
318 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
320 sqinch z0.h, pow2, mul #16
321 // CHECK-INST: sqinch z0.h, pow2, mul #16
322 // CHECK-ENCODING: [0x00,0xc0,0x6f,0x04]
323 // CHECK-ERROR: instruction requires: sve
324 // CHECK-UNKNOWN: 00 c0 6f 04 <unknown>
326 movprfx z0, z7
327 // CHECK-INST: movprfx z0, z7
328 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
329 // CHECK-ERROR: instruction requires: sve
330 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
332 sqinch z0.h, pow2
333 // CHECK-INST: sqinch z0.h, pow2
334 // CHECK-ENCODING: [0x00,0xc0,0x60,0x04]
335 // CHECK-ERROR: instruction requires: sve
336 // CHECK-UNKNOWN: 00 c0 60 04 <unknown>