[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / AArch64 / SVE / st1h.s
blobc44d8e25e6a480957e8cd99274ed589d5ae427a0
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 st1h z0.h, p0, [x0]
11 // CHECK-INST: st1h { z0.h }, p0, [x0]
12 // CHECK-ENCODING: [0x00,0xe0,0xa0,0xe4]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 e0 a0 e4 <unknown>
16 st1h z0.s, p0, [x0]
17 // CHECK-INST: st1h { z0.s }, p0, [x0]
18 // CHECK-ENCODING: [0x00,0xe0,0xc0,0xe4]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 00 e0 c0 e4 <unknown>
22 st1h z0.d, p0, [x0]
23 // CHECK-INST: st1h { z0.d }, p0, [x0]
24 // CHECK-ENCODING: [0x00,0xe0,0xe0,0xe4]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 e0 e0 e4 <unknown>
28 st1h { z0.h }, p0, [x0]
29 // CHECK-INST: st1h { z0.h }, p0, [x0]
30 // CHECK-ENCODING: [0x00,0xe0,0xa0,0xe4]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: 00 e0 a0 e4 <unknown>
34 st1h { z0.s }, p0, [x0]
35 // CHECK-INST: st1h { z0.s }, p0, [x0]
36 // CHECK-ENCODING: [0x00,0xe0,0xc0,0xe4]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 00 e0 c0 e4 <unknown>
40 st1h { z0.d }, p0, [x0]
41 // CHECK-INST: st1h { z0.d }, p0, [x0]
42 // CHECK-ENCODING: [0x00,0xe0,0xe0,0xe4]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 00 e0 e0 e4 <unknown>
46 st1h { z31.h }, p7, [sp, #-1, mul vl]
47 // CHECK-INST: st1h { z31.h }, p7, [sp, #-1, mul vl]
48 // CHECK-ENCODING: [0xff,0xff,0xaf,0xe4]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: ff ff af e4 <unknown>
52 st1h { z21.h }, p5, [x10, #5, mul vl]
53 // CHECK-INST: st1h { z21.h }, p5, [x10, #5, mul vl]
54 // CHECK-ENCODING: [0x55,0xf5,0xa5,0xe4]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 55 f5 a5 e4 <unknown>
58 st1h { z31.s }, p7, [sp, #-1, mul vl]
59 // CHECK-INST: st1h { z31.s }, p7, [sp, #-1, mul vl]
60 // CHECK-ENCODING: [0xff,0xff,0xcf,0xe4]
61 // CHECK-ERROR: instruction requires: sve
62 // CHECK-UNKNOWN: ff ff cf e4 <unknown>
64 st1h { z21.s }, p5, [x10, #5, mul vl]
65 // CHECK-INST: st1h { z21.s }, p5, [x10, #5, mul vl]
66 // CHECK-ENCODING: [0x55,0xf5,0xc5,0xe4]
67 // CHECK-ERROR: instruction requires: sve
68 // CHECK-UNKNOWN: 55 f5 c5 e4 <unknown>
70 st1h { z21.d }, p5, [x10, #5, mul vl]
71 // CHECK-INST: st1h { z21.d }, p5, [x10, #5, mul vl]
72 // CHECK-ENCODING: [0x55,0xf5,0xe5,0xe4]
73 // CHECK-ERROR: instruction requires: sve
74 // CHECK-UNKNOWN: 55 f5 e5 e4 <unknown>
76 st1h { z31.d }, p7, [sp, #-1, mul vl]
77 // CHECK-INST: st1h { z31.d }, p7, [sp, #-1, mul vl]
78 // CHECK-ENCODING: [0xff,0xff,0xef,0xe4]
79 // CHECK-ERROR: instruction requires: sve
80 // CHECK-UNKNOWN: ff ff ef e4 <unknown>
82 st1h { z0.h }, p0, [x0, x0, lsl #1]
83 // CHECK-INST: st1h { z0.h }, p0, [x0, x0, lsl #1]
84 // CHECK-ENCODING: [0x00,0x40,0xa0,0xe4]
85 // CHECK-ERROR: instruction requires: sve
86 // CHECK-UNKNOWN: 00 40 a0 e4 <unknown>
88 st1h { z0.s }, p0, [x0, x0, lsl #1]
89 // CHECK-INST: st1h { z0.s }, p0, [x0, x0, lsl #1]
90 // CHECK-ENCODING: [0x00,0x40,0xc0,0xe4]
91 // CHECK-ERROR: instruction requires: sve
92 // CHECK-UNKNOWN: 00 40 c0 e4 <unknown>
94 st1h { z0.d }, p0, [x0, x0, lsl #1]
95 // CHECK-INST: st1h { z0.d }, p0, [x0, x0, lsl #1]
96 // CHECK-ENCODING: [0x00,0x40,0xe0,0xe4]
97 // CHECK-ERROR: instruction requires: sve
98 // CHECK-UNKNOWN: 00 40 e0 e4 <unknown>
100 st1h { z0.s }, p0, [x0, z0.s, uxtw]
101 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, uxtw]
102 // CHECK-ENCODING: [0x00,0x80,0xc0,0xe4]
103 // CHECK-ERROR: instruction requires: sve
104 // CHECK-UNKNOWN: 00 80 c0 e4 <unknown>
106 st1h { z0.s }, p0, [x0, z0.s, sxtw]
107 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, sxtw]
108 // CHECK-ENCODING: [0x00,0xc0,0xc0,0xe4]
109 // CHECK-ERROR: instruction requires: sve
110 // CHECK-UNKNOWN: 00 c0 c0 e4 <unknown>
112 st1h { z0.d }, p0, [x0, z0.d, uxtw]
113 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, uxtw]
114 // CHECK-ENCODING: [0x00,0x80,0x80,0xe4]
115 // CHECK-ERROR: instruction requires: sve
116 // CHECK-UNKNOWN: 00 80 80 e4 <unknown>
118 st1h { z0.d }, p0, [x0, z0.d, sxtw]
119 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, sxtw]
120 // CHECK-ENCODING: [0x00,0xc0,0x80,0xe4]
121 // CHECK-ERROR: instruction requires: sve
122 // CHECK-UNKNOWN: 00 c0 80 e4 <unknown>
124 st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
125 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
126 // CHECK-ENCODING: [0x00,0x80,0xe0,0xe4]
127 // CHECK-ERROR: instruction requires: sve
128 // CHECK-UNKNOWN: 00 80 e0 e4 <unknown>
130 st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
131 // CHECK-INST: st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
132 // CHECK-ENCODING: [0x00,0xc0,0xe0,0xe4]
133 // CHECK-ERROR: instruction requires: sve
134 // CHECK-UNKNOWN: 00 c0 e0 e4 <unknown>
136 st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
137 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
138 // CHECK-ENCODING: [0x00,0x80,0xa0,0xe4]
139 // CHECK-ERROR: instruction requires: sve
140 // CHECK-UNKNOWN: 00 80 a0 e4 <unknown>
142 st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
143 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
144 // CHECK-ENCODING: [0x00,0xc0,0xa0,0xe4]
145 // CHECK-ERROR: instruction requires: sve
146 // CHECK-UNKNOWN: 00 c0 a0 e4 <unknown>
148 st1h { z0.d }, p0, [x0, z0.d]
149 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d]
150 // CHECK-ENCODING: [0x00,0xa0,0x80,0xe4]
151 // CHECK-ERROR: instruction requires: sve
152 // CHECK-UNKNOWN: 00 a0 80 e4 <unknown>
154 st1h { z0.d }, p0, [x0, z0.d, lsl #1]
155 // CHECK-INST: st1h { z0.d }, p0, [x0, z0.d, lsl #1]
156 // CHECK-ENCODING: [0x00,0xa0,0xa0,0xe4]
157 // CHECK-ERROR: instruction requires: sve
158 // CHECK-UNKNOWN: 00 a0 a0 e4 <unknown>
160 st1h { z31.s }, p7, [z31.s, #62]
161 // CHECK-INST: st1h { z31.s }, p7, [z31.s, #62]
162 // CHECK-ENCODING: [0xff,0xbf,0xff,0xe4]
163 // CHECK-ERROR: instruction requires: sve
164 // CHECK-UNKNOWN: ff bf ff e4 <unknown>
166 st1h { z31.d }, p7, [z31.d, #62]
167 // CHECK-INST: st1h { z31.d }, p7, [z31.d, #62]
168 // CHECK-ENCODING: [0xff,0xbf,0xdf,0xe4]
169 // CHECK-ERROR: instruction requires: sve
170 // CHECK-UNKNOWN: ff bf df e4 <unknown>