test/MC/AArch64/SVE/sxtw-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // Element size specifiers should match.
   4 sxtw z0.d, p0/m, z0.s
   5 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
   6 // CHECK-NEXT: sxtw z0.d, p0/m, z0.s
   7 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
   8
   9 // Missing predicate suffix
  10 sxtw z29.d, p7, z29.d
  11 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  12 // CHECK-NEXT: sxtw z29.d, p7, z29.d
  13 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  14
  15
  16 // --------------------------------------------------------------------------//
  17 // Unsupported element widths
  18
  19 sxtw z0.b, p0/m, z0.b
  20 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  21 // CHECK-NEXT: sxtw z0.b, p0/m, z0.b
  22 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  23
  24 sxtw z0.h, p0/m, z0.h
  25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  26 // CHECK-NEXT: sxtw z0.h, p0/m, z0.h
  27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  28
  29 sxtw z0.s, p0/m, z0.s
  30 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  31 // CHECK-NEXT: sxtw z0.s, p0/m, z0.s
  32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  33
  34
  35 // --------------------------------------------------------------------------//
  36 // error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  37
  38 sxtw z0.d, p8/m, z0.d
  39 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  40 // CHECK-NEXT: sxtw z0.d, p8/m, z0.d
  41 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  42