test/MC/AMDGPU/vop3.s

   1 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
   2 // RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck %s --check-prefix=CI
   3 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI
   4
   5 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
   6 // RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
   7 // RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI
   8
   9
  10 //===----------------------------------------------------------------------===//
  11 // VOPC Instructions
  12 //===----------------------------------------------------------------------===//
  13
  14 // Test forced e64 encoding
  15
  16 v_cmp_lt_f32_e64 s[2:3], v4, -v6
  17 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40]
  18 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40]
  19
  20 // Test forcing e64 with vcc dst
  21
  22 v_cmp_lt_f32_e64 vcc, v4, v6
  23 // SICI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x02,0xd0,0x04,0x0d,0x02,0x00]
  24 // VI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00]
  25
  26 //
  27 // Modifier tests:
  28 //
  29
  30 v_cmp_lt_f32 s[2:3] -v4, v6
  31 // SICI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x20]
  32 // VI:   v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x20]
  33
  34 v_cmp_lt_f32 s[2:3]  v4, -v6
  35 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40]
  36 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40]
  37
  38 v_cmp_lt_f32 s[2:3] -v4, -v6
  39 // SICI: v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x60]
  40 // VI:   v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x60]
  41
  42 v_cmp_lt_f32 s[2:3] |v4|, v6
  43 // SICI: v_cmp_lt_f32_e64 s[2:3], |v4|, v6 ; encoding: [0x02,0x01,0x02,0xd0,0x04,0x0d,0x02,0x00]
  44 // VI:   v_cmp_lt_f32_e64 s[2:3], |v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x00]
  45
  46 v_cmp_lt_f32 s[2:3] v4, |v6|
  47 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, |v6| ; encoding: [0x02,0x02,0x02,0xd0,0x04,0x0d,0x02,0x00]
  48 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, |v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x00]
  49
  50 v_cmp_lt_f32 s[2:3] |v4|, |v6|
  51 // SICI: v_cmp_lt_f32_e64 s[2:3], |v4|, |v6| ; encoding: [0x02,0x03,0x02,0xd0,0x04,0x0d,0x02,0x00]
  52 // VI:   v_cmp_lt_f32_e64 s[2:3], |v4|, |v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x00]
  53
  54 v_cmp_lt_f32 s[2:3] -|v4|, v6
  55 // SICI: v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x02,0xd0,0x04,0x0d,0x02,0x20]
  56 // VI:   v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x20]
  57
  58 v_cmp_lt_f32 s[2:3] -abs(v4), v6
  59 // SICI: v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x02,0xd0,0x04,0x0d,0x02,0x20]
  60 // VI:   v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x20]
  61
  62 v_cmp_lt_f32 s[2:3] v4, -|v6|
  63 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x02,0xd0,0x04,0x0d,0x02,0x40]
  64 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x40]
  65
  66 v_cmp_lt_f32 s[2:3] v4, -abs(v6)
  67 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x02,0xd0,0x04,0x0d,0x02,0x40]
  68 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x40]
  69
  70 v_cmp_lt_f32 s[2:3] -|v4|, -|v6|
  71 // SICI: v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x02,0xd0,0x04,0x0d,0x02,0x60]
  72 // VI:   v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x60]
  73
  74 v_cmp_lt_f32 s[2:3] -abs(v4), -abs(v6)
  75 // SICI: v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x02,0xd0,0x04,0x0d,0x02,0x60]
  76 // VI:   v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x60]
  77
  78 //
  79 // Instruction tests:
  80 //
  81
  82 v_cmp_f_f32 s[2:3], v4, v6
  83 // SICI: v_cmp_f_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x00,0xd0,0x04,0x0d,0x02,0x00]
  84 // VI:   v_cmp_f_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x40,0xd0,0x04,0x0d,0x02,0x00]
  85
  86 v_cmp_lt_f32 s[2:3], v4, v6
  87 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x00]
  88 // VI:   v_cmp_lt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00]
  89
  90 v_cmp_eq_f32 s[2:3], v4, v6
  91 // SICI: v_cmp_eq_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x04,0xd0,0x04,0x0d,0x02,0x00]
  92 // VI:   v_cmp_eq_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x42,0xd0,0x04,0x0d,0x02,0x00]
  93
  94 v_cmp_le_f32 s[2:3], v4, v6
  95 // SICI: v_cmp_le_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x06,0xd0,0x04,0x0d,0x02,0x00]
  96 // VI:   v_cmp_le_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x43,0xd0,0x04,0x0d,0x02,0x00]
  97
  98 v_cmp_gt_f32 s[2:3], v4, v6
  99 // SICI: v_cmp_gt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x08,0xd0,0x04,0x0d,0x02,0x00]
 100 // VI:   v_cmp_gt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x44,0xd0,0x04,0x0d,0x02,0x00]
 101
 102 v_cmp_lg_f32 s[2:3], v4, v6
 103 // SICI: v_cmp_lg_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x0a,0xd0,0x04,0x0d,0x02,0x00]
 104 // VI:   v_cmp_lg_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x45,0xd0,0x04,0x0d,0x02,0x00]
 105
 106 v_cmp_ge_f32 s[2:3], v4, v6
 107 // SICI: v_cmp_ge_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x0c,0xd0,0x04,0x0d,0x02,0x00]
 108 // VI:   v_cmp_ge_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x46,0xd0,0x04,0x0d,0x02,0x00]
 109
 110 // TODO: Add tests for the rest of v_cmp_*_f32
 111 // TODO: Add tests for v_cmpx_*_f32
 112
 113 v_cmp_f_f64 s[2:3], v[4:5], v[6:7]
 114 // SICI: v_cmp_f_f64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0x40,0xd0,0x04,0x0d,0x02,0x00]
 115 // VI:   v_cmp_f_f64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0x60,0xd0,0x04,0x0d,0x02,0x00]
 116
 117 // TODO: Add tests for the rest of v_cmp_*_f64
 118 // TODO: Add tests for the rest of the floating-point comparision instructions.
 119
 120 v_cmp_f_i32 s[2:3], v4, v6
 121 // SICI: v_cmp_f_i32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x00,0xd1,0x04,0x0d,0x02,0x00]
 122 // VI:   v_cmp_f_i32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0xc0,0xd0,0x04,0x0d,0x02,0x00]
 123
 124 // TODO: Add test for the rest of v_cmp_*_i32
 125
 126 v_cmp_f_i64 s[2:3], v[4:5], v[6:7]
 127 // SICI: v_cmp_f_i64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0x40,0xd1,0x04,0x0d,0x02,0x00]
 128 // VI:   v_cmp_f_i64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0xe0,0xd0,0x04,0x0d,0x02,0x00]
 129
 130 // TODO: Add tests for the rest of the instructions.
 131
 132 //===----------------------------------------------------------------------===//
 133 // VOP1 Instructions
 134 //===----------------------------------------------------------------------===//
 135
 136 // Test forced e64 encoding with e32 operands
 137
 138 v_mov_b32_e64 v1, v2
 139 // SICI: v_mov_b32_e64 v1, v2 ; encoding: [0x01,0x00,0x02,0xd3,0x02,0x01,0x00,0x00]
 140 // VI:   v_mov_b32_e64 v1, v2 ; encoding: [0x01,0x00,0x41,0xd1,0x02,0x01,0x00,0x00]
 141
 142 // Force e64 encoding for special instructions.
 143 // FIXME, we should be printing the _e64 suffix for v_nop and v_clrexcp.
 144
 145 v_nop_e64
 146 // SICI: v_nop ; encoding: [0x00,0x00,0x00,0xd3,0x00,0x00,0x00,0x00]
 147 // VI:   v_nop ; encoding: [0x00,0x00,0x40,0xd1,0x00,0x00,0x00,0x00]
 148
 149 v_clrexcp_e64
 150 // SICI: v_clrexcp ; encoding: [0x00,0x00,0x82,0xd3,0x00,0x00,0x00,0x00]
 151 // VI:   v_clrexcp ; encoding: [0x00,0x00,0x75,0xd1,0x00,0x00,0x00,0x00]
 152
 153 //
 154 // Modifier tests:
 155 //
 156
 157 v_fract_f32 v1, -v2
 158 // SICI: v_fract_f32_e64 v1, -v2 ; encoding: [0x01,0x00,0x40,0xd3,0x02,0x01,0x00,0x20]
 159 // VI:   v_fract_f32_e64 v1, -v2 ; encoding: [0x01,0x00,0x5b,0xd1,0x02,0x01,0x00,0x20]
 160
 161 v_fract_f32 v1, |v2|
 162 // SICI: v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x40,0xd3,0x02,0x01,0x00,0x00]
 163 // VI:   v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x00]
 164
 165 v_fract_f32 v1, abs(v2)
 166 // SICI: v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x40,0xd3,0x02,0x01,0x00,0x00]
 167 // VI:   v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x00]
 168
 169 v_fract_f32 v1, -|v2|
 170 // SICI: v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x40,0xd3,0x02,0x01,0x00,0x20]
 171 // VI:   v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x20]
 172
 173 v_fract_f32 v1, -abs(v2)
 174 // SICI: v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x40,0xd3,0x02,0x01,0x00,0x20]
 175 // VI:   v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x20]
 176
 177 v_fract_f32 v1, v2 clamp
 178 // SICI: v_fract_f32_e64 v1, v2 clamp ; encoding: [0x01,0x08,0x40,0xd3,0x02,0x01,0x00,0x00]
 179 // VI:   v_fract_f32_e64 v1, v2 clamp ; encoding: [0x01,0x80,0x5b,0xd1,0x02,0x01,0x00,0x00]
 180
 181 v_fract_f32 v1, v2 mul:2
 182 // SICI: v_fract_f32_e64 v1, v2 mul:2 ; encoding: [0x01,0x00,0x40,0xd3,0x02,0x01,0x00,0x08]
 183 // VI:   v_fract_f32_e64 v1, v2 mul:2 ; encoding: [0x01,0x00,0x5b,0xd1,0x02,0x01,0x00,0x08]
 184
 185 v_fract_f32 v1, v2, clamp div:2
 186 // SICI: v_fract_f32_e64 v1, v2 clamp div:2 ; encoding: [0x01,0x08,0x40,0xd3,0x02,0x01,0x00,0x18]
 187 // VI:   v_fract_f32_e64 v1, v2 clamp div:2 ; encoding: [0x01,0x80,0x5b,0xd1,0x02,0x01,0x00,0x18]
 188
 189 // TODO: Finish VOP1
 190
 191 ///===---------------------------------------------------------------------===//
 192 // VOP2 Instructions
 193 ///===---------------------------------------------------------------------===//
 194
 195 // Test forced e64 encoding with e32 operands
 196
 197 v_add_f32_e64 v1, v3, v5
 198 // SICI: v_add_f32_e64 v1, v3, v5 ; encoding: [0x01,0x00,0x06,0xd2,0x03,0x0b,0x02,0x00]
 199 // VI:   v_add_f32_e64 v1, v3, v5 ; encoding: [0x01,0x00,0x01,0xd1,0x03,0x0b,0x02,0x00]
 200
 201
 202 // TODO: Modifier tests (v_cndmask done)
 203
 204 v_cndmask_b32 v1, v3, v5, s[4:5]
 205 // SICI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0x12,0x00]
 206 // VI:   v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x00]
 207
 208 v_cndmask_b32_e64 v1, v3, v5, s[4:5]
 209 // SICI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0x12,0x00]
 210 // VI:   v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x00]
 211
 212 v_cndmask_b32_e64 v1, v3, v5, vcc
 213 // SICI: v_cndmask_b32_e64 v1, v3, v5, vcc ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0xaa,0x01]
 214 // VI:   v_cndmask_b32_e64 v1, v3, v5, vcc ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0xaa,0x01]
 215
 216 v_cndmask_b32 v1, -v3, v5, s[4:5]
 217 // SICI: v_cndmask_b32_e64 v1, -v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd2,0x03,0x0b,0x12,0x20]
 218 // VI:   v_cndmask_b32_e64 v1, -v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x20]
 219
 220 v_cndmask_b32_e64 v1, v3, |v5|, s[4:5]
 221 // SICI: v_cndmask_b32_e64 v1, v3, |v5|, s[4:5] ; encoding: [0x01,0x02,0x00,0xd2,0x03,0x0b,0x12,0x00]
 222 // VI:   v_cndmask_b32_e64 v1, v3, |v5|, s[4:5] ; encoding: [0x01,0x02,0x00,0xd1,0x03,0x0b,0x12,0x00]
 223
 224 v_cndmask_b32_e64 v1, -abs(v3), v5, vcc
 225 // SICI: v_cndmask_b32_e64 v1, -|v3|, v5, vcc ; encoding: [0x01,0x01,0x00,0xd2,0x03,0x0b,0xaa,0x21]
 226 // VI:   v_cndmask_b32_e64 v1, -|v3|, v5, vcc ; encoding: [0x01,0x01,0x00,0xd1,0x03,0x0b,0xaa,0x21]
 227
 228 //TODO: readlane, writelane
 229
 230 v_add_f32 v1, v3, s5
 231 // SICI: v_add_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x06,0xd2,0x03,0x0b,0x00,0x00]
 232 // VI:   v_add_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x01,0xd1,0x03,0x0b,0x00,0x00]
 233
 234 v_sub_f32 v1, v3, s5
 235 // SICI: v_sub_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x08,0xd2,0x03,0x0b,0x00,0x00]
 236 // VI:   v_sub_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x02,0xd1,0x03,0x0b,0x00,0x00]
 237
 238 v_subrev_f32 v1, v3, s5
 239 // SICI: v_subrev_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x0a,0xd2,0x03,0x0b,0x00,0x00]
 240 // VI:   v_subrev_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x03,0xd1,0x03,0x0b,0x00,0x00]
 241
 242 v_mac_legacy_f32 v1, v3, s5
 243 // SICI: v_mac_legacy_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x0c,0xd2,0x03,0x0b,0x00,0x00]
 244 // NOVI: error: instruction not supported on this GPU
 245
 246 v_mul_legacy_f32 v1, v3, s5
 247 // SICI: v_mul_legacy_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x0e,0xd2,0x03,0x0b,0x00,0x00]
 248 // VI:   v_mul_legacy_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x04,0xd1,0x03,0x0b,0x00,0x00]
 249
 250 v_mul_f32 v1, v3, s5
 251 // SICI: v_mul_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x10,0xd2,0x03,0x0b,0x00,0x00]
 252 // VI:   v_mul_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x05,0xd1,0x03,0x0b,0x00,0x00]
 253
 254 v_mul_i32_i24 v1, v3, s5
 255 // SICI: v_mul_i32_i24_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x12,0xd2,0x03,0x0b,0x00,0x00]
 256 // VI:   v_mul_i32_i24_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x06,0xd1,0x03,0x0b,0x00,0x00]
 257
 258 v_mac_f32_e64 v0, v1, v2
 259 // SICI: v_mac_f32_e64 v0, v1, v2 ; encoding: [0x00,0x00,0x3e,0xd2,0x01,0x05,0x02,0x00]
 260 // VI:   v_mac_f32_e64 v0, v1, v2 ; encoding: [0x00,0x00,0x16,0xd1,0x01,0x05,0x02,0x00]
 261
 262 v_mac_f32_e64 v0, v1, v2 clamp
 263 // SICI: v_mac_f32_e64 v0, v1, v2 clamp ; encoding: [0x00,0x08,0x3e,0xd2,0x01,0x05,0x02,0x00]
 264 // VI:   v_mac_f32_e64 v0, v1, v2 clamp ; encoding: [0x00,0x80,0x16,0xd1,0x01,0x05,0x02,0x00]
 265
 266 v_mac_f32_e64 v0, v1, v2 mul:2
 267 // SICI: v_mac_f32_e64 v0, v1, v2 mul:2 ; encoding: [0x00,0x00,0x3e,0xd2,0x01,0x05,0x02,0x08]
 268 // VI:   v_mac_f32_e64 v0, v1, v2 mul:2 ; encoding: [0x00,0x00,0x16,0xd1,0x01,0x05,0x02,0x08]
 269
 270 v_mac_f32_e64 v0, -v1, |v2|
 271 // SICI: v_mac_f32_e64 v0, -v1, |v2| ; encoding: [0x00,0x02,0x3e,0xd2,0x01,0x05,0x02,0x20]
 272 // VI:   v_mac_f32_e64 v0, -v1, |v2| ; encoding: [0x00,0x02,0x16,0xd1,0x01,0x05,0x02,0x20]
 273
 274 v_mac_f16_e64 v0, 0.5, flat_scratch_lo
 275 // NOSICI: error:
 276 // VI: v_mac_f16_e64 v0, 0.5, flat_scratch_lo ; encoding: [0x00,0x00,0x23,0xd1,0xf0,0xcc,0x00,0x00]
 277
 278 v_mac_f16_e64 v0, -4.0, flat_scratch_lo
 279 // NOSICI: error:
 280 // VI: v_mac_f16_e64 v0, -4.0, flat_scratch_lo ; encoding: [0x00,0x00,0x23,0xd1,0xf7,0xcc,0x00,0x00]
 281
 282 v_mac_f16_e64 v0, flat_scratch_lo, -4.0
 283 // NOSICI: error:
 284 // VI: v_mac_f16_e64 v0, flat_scratch_lo, -4.0 ; encoding: [0x00,0x00,0x23,0xd1,0x66,0xee,0x01,0x00]
 285
 286 v_add_u32 v84, vcc, v13, s31 clamp
 287 // NOSICI: error:
 288 // VI: v_add_u32_e64 v84, vcc, v13, s31 clamp ; encoding: [0x54,0xea,0x19,0xd1,0x0d,0x3f,0x00,0x00]
 289
 290 v_sub_u32 v84, s[2:3], v13, s31 clamp
 291 // NOSICI: error:
 292 // VI: v_sub_u32_e64 v84, s[2:3], v13, s31 clamp ; encoding: [0x54,0x82,0x1a,0xd1,0x0d,0x3f,0x00,0x00]
 293
 294 v_subrev_u32 v84, vcc, v13, s31 clamp
 295 // NOSICI: error:
 296 // VI: v_subrev_u32_e64 v84, vcc, v13, s31 clamp ; encoding: [0x54,0xea,0x1b,0xd1,0x0d,0x3f,0x00,0x00]
 297
 298 v_addc_u32 v84, s[4:5], v13, v31, vcc clamp
 299 // NOSICI: error:
 300 // VI: v_addc_u32_e64 v84, s[4:5], v13, v31, vcc clamp ; encoding: [0x54,0x84,0x1c,0xd1,0x0d,0x3f,0xaa,0x01]
 301
 302 v_subb_u32 v84, s[2:3], v13, v31, vcc clamp
 303 // NOSICI: error:
 304 // VI: v_subb_u32_e64 v84, s[2:3], v13, v31, vcc clamp ; encoding: [0x54,0x82,0x1d,0xd1,0x0d,0x3f,0xaa,0x01]
 305
 306 v_subbrev_u32 v84, vcc, v13, v31, s[6:7] clamp
 307 // NOSICI: error:
 308 // VI: v_subbrev_u32_e64 v84, vcc, v13, v31, s[6:7] clamp ; encoding: [0x54,0xea,0x1e,0xd1,0x0d,0x3f,0x1a,0x00]
 309
 310 ///===---------------------------------------------------------------------===//
 311 // VOP3 Instructions
 312 ///===---------------------------------------------------------------------===//
 313
 314 // TODO: Modifier tests
 315
 316 v_mad_legacy_f32 v2, v4, v6, v8
 317 // SICI: v_mad_legacy_f32 v2, v4, v6, v8 ; encoding: [0x02,0x00,0x80,0xd2,0x04,0x0d,0x22,0x04]
 318 // VI:   v_mad_legacy_f32 v2, v4, v6, v8 ; encoding: [0x02,0x00,0xc0,0xd1,0x04,0x0d,0x22,0x04]
 319
 320 v_add_f64 v[0:1], v[2:3], v[5:6]
 321 // SICI: v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 322 // VI:   v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x00]
 323
 324 v_add_f64_e64 v[0:1], v[2:3], v[5:6]
 325 // SICI: v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 326 // VI:   v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x00]
 327
 328 v_add_f64 v[0:1], -v[2:3], v[5:6]
 329 // SICI: v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x20]
 330 // VI:   v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x20]
 331
 332 v_add_f64_e64 v[0:1], -v[2:3], v[5:6]
 333 // SICI: v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x20]
 334 // VI:   v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x20]
 335
 336 v_add_f64 v[0:1], v[2:3], -v[5:6]
 337 // SICI: v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x40]
 338 // VI:   v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x40]
 339
 340 v_add_f64_e64 v[0:1], v[2:3], -v[5:6]
 341 // SICI: v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0xc8,0xd2,0x02,0x0b,0x02,0x40]
 342 // VI:   v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x40]
 343
 344 v_add_f64 v[0:1], |v[2:3]|, v[5:6]
 345 // SICI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 346 // VI:   v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
 347
 348 v_add_f64 v[0:1], abs(v[2:3]), v[5:6]
 349 // SICI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 350 // VI:   v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
 351
 352 v_add_f64_e64 v[0:1], |v[2:3]|, v[5:6]
 353 // SICI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 354 // VI:   v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
 355
 356 v_add_f64_e64 v[0:1], abs(v[2:3]), v[5:6]
 357 // SICI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 358 // VI:   v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
 359
 360 v_add_f64 v[0:1], v[2:3], |v[5:6]|
 361 // SICI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 362 // VI:   v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
 363
 364 v_add_f64 v[0:1], v[2:3], abs(v[5:6])
 365 // SICI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 366 // VI:   v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
 367
 368 v_add_f64_e64 v[0:1], v[2:3], |v[5:6]|
 369 // SICI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 370 // VI:   v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
 371
 372 v_add_f64_e64 v[0:1], v[2:3], abs(v[5:6])
 373 // SICI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0xc8,0xd2,0x02,0x0b,0x02,0x00]
 374 // VI:   v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
 375
 376 v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4
 377 // SICI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x0a,0xc8,0xd2,0x02,0x0b,0x02,0x30]
 378 // VI:   v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
 379
 380 v_add_f64 v[0:1], -v[2:3], abs(v[5:6]) clamp mul:4
 381 // SICI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x0a,0xc8,0xd2,0x02,0x0b,0x02,0x30]
 382 // VI:   v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
 383
 384 v_add_f64_e64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4
 385 // SICI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x0a,0xc8,0xd2,0x02,0x0b,0x02,0x30]
 386 // VI:   v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
 387
 388 v_add_f64_e64 v[0:1], -v[2:3], abs(v[5:6]) clamp mul:4
 389 // SICI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x0a,0xc8,0xd2,0x02,0x0b,0x02,0x30]
 390 // VI:   v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
 391
 392 v_div_scale_f64  v[24:25], vcc, v[22:23], v[22:23], v[20:21]
 393 // SICI: v_div_scale_f64 v[24:25], vcc, v[22:23], v[22:23], v[20:21] ; encoding: [0x18,0x6a,0xdc,0xd2,0x16,0x2d,0x52,0x04]
 394 // VI:   v_div_scale_f64 v[24:25], vcc, v[22:23], v[22:23], v[20:21] ; encoding: [0x18,0x6a,0xe1,0xd1,0x16,0x2d,0x52,0x04]
 395
 396 v_div_scale_f64  v[24:25], s[10:11], v[22:23], v[20:21], v[20:21]
 397 // SICI: v_div_scale_f64 v[24:25], s[10:11], v[22:23], v[20:21], v[20:21] ; encoding: [0x18,0x0a,0xdc,0xd2,0x16,0x29,0x52,0x04]
 398 // VI:   v_div_scale_f64 v[24:25], s[10:11], v[22:23], v[20:21], v[20:21] ; encoding: [0x18,0x0a,0xe1,0xd1,0x16,0x29,0x52,0x04]
 399
 400 v_div_scale_f32  v24, vcc, v22, v22, v20
 401 // SICI: v_div_scale_f32 v24, vcc, v22, v22, v20 ; encoding: [0x18,0x6a,0xda,0xd2,0x16,0x2d,0x52,0x04]
 402 // VI:   v_div_scale_f32 v24, vcc, v22, v22, v20 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
 403
 404 v_div_scale_f32  v24, s[10:11], v22, v22, v20
 405 // SICI: v_div_scale_f32 v24, s[10:11], v22, v22, v20 ; encoding: [0x18,0x0a,0xda,0xd2,0x16,0x2d,0x52,0x04]
 406 // VI:   v_div_scale_f32 v24, s[10:11], v22, v22, v20 ; encoding: [0x18,0x0a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
 407
 408 v_div_scale_f32  v24, vcc, v22, 1.0, v22
 409 // SICI: v_div_scale_f32 v24, vcc, v22, 1.0, v22 ; encoding: [0x18,0x6a,0xda,0xd2,0x16,0xe5,0x59,0x04]
 410 // VI:   v_div_scale_f32 v24, vcc, v22, 1.0, v22 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0xe5,0x59,0x04]
 411
 412 v_div_scale_f32  v24, vcc, v22, v22, -2.0
 413 // SICI: v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xda,0xd2,0x16,0x2d,0xd6,0x03]
 414 // VI:   v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0xd6,0x03]
 415
 416 v_div_scale_f32 v24, vcc, v22, v22, 0xc0000000
 417 // SICI: v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xda,0xd2,0x16,0x2d,0xd6,0x03]
 418 // VI:   v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0xd6,0x03]
 419
 420 v_mad_f32 v9, 0.5, v5, -v8
 421 // SICI: v_mad_f32 v9, 0.5, v5, -v8      ; encoding: [0x09,0x00,0x82,0xd2,0xf0,0x0a,0x22,0x84]
 422 // VI:   v_mad_f32 v9, 0.5, v5, -v8      ; encoding: [0x09,0x00,0xc1,0xd1,0xf0,0x0a,0x22,0x84]
 423
 424 v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3]
 425 // CI: v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3] ; encoding: [0x05,0x00,0xea,0xd2,0x02,0x08,0x02,0x04]
 426 // VI: v_mqsad_u32_u8 v[5:8], s[2:3], v4, v[0:3] ; encoding: [0x05,0x00,0xe7,0xd1,0x02,0x08,0x02,0x04]
 427 // NOSI: error: instruction not supported on this GPU
 428
 429 v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0
 430 // CI: v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0 ; encoding: [0x05,0x0c,0xec,0xd2,0x01,0x00,0x01,0x02]
 431 // VI: v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0 ; encoding: [0x05,0x0c,0xe8,0xd1,0x01,0x00,0x01,0x02]
 432 // NOSI: error: instruction not supported on this GPU
 433
 434 v_mad_i64_i32 v[5:6], s[12:13], s1, 0, v[254:255]
 435 // CI: v_mad_i64_i32 v[5:6], s[12:13], s1, 0, v[254:255] ; encoding: [0x05,0x0c,0xee,0xd2,0x01,0x00,0xf9,0x07]
 436 // VI: v_mad_i64_i32 v[5:6], s[12:13], s1, 0, v[254:255] ; encoding: [0x05,0x0c,0xe9,0xd1,0x01,0x00,0xf9,0x07]
 437 // NOSI: error: instruction not supported on this GPU
 438
 439 v_cmp_class_f16_e64 s[10:11], v1, s2
 440 // NOSICI: error: instruction not supported on this GPU
 441 // VI: v_cmp_class_f16_e64 s[10:11], v1, s2 ; encoding: [0x0a,0x00,0x14,0xd0,0x01,0x05,0x00,0x00]
 442
 443 v_cmp_class_f32_e64 s[10:11], -v1, s2
 444 // SICI: v_cmp_class_f32_e64 s[10:11], -v1, s2 ; encoding: [0x0a,0x00,0x10,0xd1,0x01,0x05,0x00,0x20]
 445 // VI:   v_cmp_class_f32_e64 s[10:11], -v1, s2 ; encoding: [0x0a,0x00,0x10,0xd0,0x01,0x05,0x00,0x20]
 446
 447 v_cmp_class_f64_e64 s[10:11], -v[254:255], s2
 448 // SICI: v_cmp_class_f64_e64 s[10:11], -v[254:255], s2 ; encoding: [0x0a,0x00,0x50,0xd1,0xfe,0x05,0x00,0x20]
 449 // VI:   v_cmp_class_f64_e64 s[10:11], -v[254:255], s2 ; encoding: [0x0a,0x00,0x12,0xd0,0xfe,0x05,0x00,0x20]
 450
 451 v_cmpx_class_f16_e64 s[10:11], v255, s2
 452 // NOSICI: error: instruction not supported on this GPU
 453 // VI: v_cmpx_class_f16_e64 s[10:11], v255, s2 ; encoding: [0x0a,0x00,0x15,0xd0,0xff,0x05,0x00,0x00]
 454
 455 v_cmpx_class_f32_e64 s[10:11], 0, s101
 456 // SICI: v_cmpx_class_f32_e64 s[10:11], 0, s101 ; encoding: [0x0a,0x00,0x30,0xd1,0x80,0xca,0x00,0x00]
 457 // VI:   v_cmpx_class_f32_e64 s[10:11], 0, s101 ; encoding: [0x0a,0x00,0x11,0xd0,0x80,0xca,0x00,0x00]
 458
 459 v_cmpx_class_f64_e64 s[10:11], -v[1:2], s2
 460 // SICI: v_cmpx_class_f64_e64 s[10:11], -v[1:2], s2 ; encoding: [0x0a,0x00,0x70,0xd1,0x01,0x05,0x00,0x20]
 461 // VI:   v_cmpx_class_f64_e64 s[10:11], -v[1:2], s2 ; encoding: [0x0a,0x00,0x13,0xd0,0x01,0x05,0x00,0x20]
 462
 463 //
 464 // Modifier tests:
 465 //
 466
 467 v_mul_f64 v[0:1], |0|, |0|
 468 // SICI: v_mul_f64 v[0:1], |0|, |0|      ; encoding: [0x00,0x03,0xca,0xd2,0x80,0x00,0x01,0x00]
 469 // VI:   v_mul_f64 v[0:1], |0|, |0|      ; encoding: [0x00,0x03,0x81,0xd2,0x80,0x00,0x01,0x00]
 470
 471 v_cubeid_f32 v0, |-1|, |-1.0|, |1.0|
 472 // SICI: v_cubeid_f32 v0, |-1|, |-1.0|, |1.0| ; encoding: [0x00,0x07,0x88,0xd2,0xc1,0xe6,0xc9,0x03]
 473 // VI:   v_cubeid_f32 v0, |-1|, |-1.0|, |1.0| ; encoding: [0x00,0x07,0xc4,0xd1,0xc1,0xe6,0xc9,0x03]
 474
 475 ///===---------------------------------------------------------------------===//
 476 // VOP3 Legacy
 477 ///===---------------------------------------------------------------------===//
 478
 479 v_fma_f16_e64 v5, v1, v2, v3
 480 // VI: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
 481
 482 v_fma_f16 v5, v1, v2, 0.5
 483 // VI: v_fma_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0xc2,0x03]
 484
 485 v_fma_f16 v5, -v1, -v2, -v3
 486 // VI: v_fma_f16 v5, -v1, -v2, -v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0xe4]
 487
 488 v_fma_f16 v5, |v1|, |v2|, |v3|
 489 // VI: v_fma_f16 v5, |v1|, |v2|, |v3| ; encoding: [0x05,0x07,0xee,0xd1,0x01,0x05,0x0e,0x04]
 490
 491 v_fma_f16 v5, v1, v2, v3 clamp
 492 // VI: v_fma_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04]
 493
 494 v_div_fixup_f16_e64 v5, v1, v2, v3
 495 // VI: v_div_fixup_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x04]
 496
 497 v_div_fixup_f16 v5, 0.5, v2, v3
 498 // VI: v_div_fixup_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04]
 499
 500 v_div_fixup_f16 v5, v1, 0.5, v3
 501 // VI: v_div_fixup_f16 v5, v1, 0.5, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0xe1,0x0d,0x04]
 502
 503 v_div_fixup_f16 v5, v1, v2, 0.5
 504 // VI: v_div_fixup_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xc2,0x03]
 505
 506 v_div_fixup_f16 v5, v1, v2, -4.0
 507 // VI: v_div_fixup_f16 v5, v1, v2, -4.0 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xde,0x03]
 508
 509 v_div_fixup_f16 v5, -v1, v2, v3
 510 // VI: v_div_fixup_f16 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x24]
 511
 512 v_div_fixup_f16 v5, v1, |v2|, v3
 513 // VI: v_div_fixup_f16 v5, v1, |v2|, v3 ; encoding: [0x05,0x02,0xef,0xd1,0x01,0x05,0x0e,0x04]
 514
 515 v_div_fixup_f16 v5, v1, v2, v3 clamp
 516 // VI: v_div_fixup_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04]
 517
 518 v_mad_f16_e64 v5, v1, v2, v3
 519 // VI: v_mad_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x04]
 520
 521 v_mad_f16 v5, 0.5, v2, v3
 522 // VI: v_mad_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04]
 523
 524 v_mad_f16 v5, v1, 0.5, v3
 525 // VI: v_mad_f16 v5, v1, 0.5, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0xe1,0x0d,0x04]
 526
 527 v_mad_f16 v5, v1, v2, 0.5
 528 // VI: v_mad_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0xc2,0x03]
 529
 530 v_mad_f16 v5, v1, -v2, v3
 531 // VI: v_mad_f16 v5, v1, -v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x44]
 532
 533 v_mad_f16 v5, v1, v2, |v3|
 534 // VI: v_mad_f16 v5, v1, v2, |v3| ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x0e,0x04]
 535
 536 v_mad_f16 v5, v1, v2, v3 clamp
 537 // VI: v_mad_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04]
 538
 539 v_mad_i16_e64 v5, -1, v2, v3
 540 // VI: v_mad_i16 v5, -1, v2, v3 ; encoding: [0x05,0x00,0xec,0xd1,0xc1,0x04,0x0e,0x04]
 541
 542 v_mad_i16 v5, v1, -4.0, v3
 543 // VI: v_mad_i16 v5, v1, -4.0, v3 ; encoding: [0x05,0x00,0xec,0xd1,0x01,0xef,0x0d,0x04]
 544
 545 v_mad_i16 v5, v1, v2, 0
 546 // VI: v_mad_i16 v5, v1, v2, 0 ; encoding: [0x05,0x00,0xec,0xd1,0x01,0x05,0x02,0x02]
 547
 548 v_mad_u16_e64 v5, -1, v2, v3
 549 // VI: v_mad_u16 v5, -1, v2, v3 ; encoding: [0x05,0x00,0xeb,0xd1,0xc1,0x04,0x0e,0x04]
 550
 551 v_mad_u16 v5, v1, 0, v3
 552 // VI: v_mad_u16 v5, v1, 0, v3 ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x01,0x0d,0x04]
 553
 554 v_mad_u16 v5, v1, v2, -4.0
 555 // VI: v_mad_u16 v5, v1, v2, -4.0 ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x05,0xde,0x03]
 556
 557 ///===---------------------------------------------------------------------===//
 558 // VOP3 with Integer Clamp
 559 ///===---------------------------------------------------------------------===//
 560
 561 v_mad_i32_i24 v5, v1, v2, v3 clamp
 562 // NOSICI: error: integer clamping is not supported on this GPU
 563 // VI: v_mad_i32_i24 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xc2,0xd1,0x01,0x05,0x0e,0x04]
 564
 565 v_mad_u32_u24 v5, v1, v2, v3 clamp
 566 // NOSICI: error: integer clamping is not supported on this GPU
 567 // VI: v_mad_u32_u24 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xc3,0xd1,0x01,0x05,0x0e,0x04]
 568
 569 v_sad_u8 v5, v1, v2, v3 clamp
 570 // NOSICI: error: integer clamping is not supported on this GPU
 571 // VI: v_sad_u8 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xd9,0xd1,0x01,0x05,0x0e,0x04]
 572
 573 v_sad_hi_u8 v5, v1, v2, v3 clamp
 574 // NOSICI: error: integer clamping is not supported on this GPU
 575 // VI: v_sad_hi_u8 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xda,0xd1,0x01,0x05,0x0e,0x04]
 576
 577 v_sad_u16 v5, v1, v2, v3 clamp
 578 // NOSICI: error: integer clamping is not supported on this GPU
 579 // VI: v_sad_u16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xdb,0xd1,0x01,0x05,0x0e,0x04]
 580
 581 v_sad_u32 v5, v1, v2, v3 clamp
 582 // NOSICI: error: integer clamping is not supported on this GPU
 583 // VI: v_sad_u32 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xdc,0xd1,0x01,0x05,0x0e,0x04]
 584
 585 v_msad_u8 v5, v1, v2, v3 clamp
 586 // NOSICI: error: integer clamping is not supported on this GPU
 587 // VI: v_msad_u8 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xe4,0xd1,0x01,0x05,0x0e,0x04]
 588
 589 v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
 590 // NOSICI: error: integer clamping is not supported on this GPU
 591 // VI: v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp ; encoding: [0x05,0x80,0xe6,0xd1,0x01,0x05,0x0e,0x04]
 592
 593 v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
 594 // NOSICI: error:
 595 // VI: v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp ; encoding: [0x05,0x80,0xe5,0xd1,0x01,0x05,0x0e,0x04]
 596
 597 v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp
 598 // NOSICI: error:
 599 // VI: v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp ; encoding: [0xfc,0x80,0xe7,0xd1,0x01,0x05,0x0e,0x04]
 600
 601 v_mad_u16 v5, v1, v2, v3 clamp
 602 // NOSICI: error:
 603 // VI: v_mad_u16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xeb,0xd1,0x01,0x05,0x0e,0x04]
 604
 605 v_mad_i16 v5, v1, v2, v3 clamp
 606 // NOSICI: error:
 607 // VI: v_mad_i16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xec,0xd1,0x01,0x05,0x0e,0x04]
 608
 609 //
 610 // v_interp*
 611 //
 612
 613 v_interp_mov_f32_e64 v5, p10, attr0.x
 614 // NOSICI: error: instruction not supported on this GPU
 615 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x00]
 616
 617 v_interp_mov_f32_e64 v5, p10, attr32.x
 618 // NOSICI: error: instruction not supported on this GPU
 619 // VI: v_interp_mov_f32_e64 v5, p10, attr32.x ; encoding: [0x05,0x00,0x72,0xd2,0x20,0x00,0x00,0x00]
 620
 621 v_interp_mov_f32_e64 v5, p20, attr0.x
 622 // NOSICI: error: instruction not supported on this GPU
 623 // VI: v_interp_mov_f32_e64 v5, p20, attr0.x ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x02,0x00,0x00]
 624
 625 v_interp_mov_f32_e64 v5, p10, attr0.w
 626 // NOSICI: error: instruction not supported on this GPU
 627 // VI: v_interp_mov_f32_e64 v5, p10, attr0.w ; encoding: [0x05,0x00,0x72,0xd2,0xc0,0x00,0x00,0x00]
 628
 629 v_interp_mov_f32_e64 v5, p10, attr0.x clamp
 630 // NOSICI: error: invalid operand for instruction
 631 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x clamp ; encoding: [0x05,0x80,0x72,0xd2,0x00,0x00,0x00,0x00]
 632
 633 v_interp_mov_f32 v5, p10, attr0.x clamp
 634 // NOSICI: error: invalid operand for instruction
 635 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x clamp ; encoding: [0x05,0x80,0x72,0xd2,0x00,0x00,0x00,0x00]
 636
 637 v_interp_mov_f32_e64 v5, p10, attr0.x mul:2
 638 // NOSICI: error: not a valid operand
 639 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x mul:2 ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x08]
 640
 641 v_interp_mov_f32_e64 v5, p10, attr0.x mul:4
 642 // NOSICI: error: not a valid operand
 643 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x mul:4 ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x10]
 644
 645 v_interp_mov_f32_e64 v5, p10, attr0.x div:2
 646 // NOSICI: error: not a valid operand
 647 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x div:2 ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x18]
 648
 649 v_interp_mov_f32 v5, p10, attr0.x div:2
 650 // NOSICI: error: not a valid operand
 651 // VI: v_interp_mov_f32_e64 v5, p10, attr0.x div:2 ; encoding: [0x05,0x00,0x72,0xd2,0x00,0x00,0x00,0x18]
 652
 653
 654 v_interp_p1_f32_e64 v5, v2, attr0.x
 655 // NOSICI: error: instruction not supported on this GPU
 656 // VI: v_interp_p1_f32_e64 v5, v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x00]
 657
 658 v_interp_p1_f32_e64 v5, v2, attr0.y
 659 // NOSICI: error: instruction not supported on this GPU
 660 // VI: v_interp_p1_f32_e64 v5, v2, attr0.y ; encoding: [0x05,0x00,0x70,0xd2,0x40,0x04,0x02,0x00]
 661
 662 v_interp_p1_f32_e64 v5, -v2, attr0.x
 663 // NOSICI: error: not a valid operand
 664 // VI: v_interp_p1_f32_e64 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x40]
 665
 666 v_interp_p1_f32_e64 v5, |v2|, attr0.x
 667 // NOSICI: error: not a valid operand
 668 // VI: v_interp_p1_f32_e64 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x70,0xd2,0x00,0x04,0x02,0x00]
 669
 670 v_interp_p1_f32_e64 v5, v2, attr0.x clamp
 671 // NOSICI: error: invalid operand for instruction
 672 // VI: v_interp_p1_f32_e64 v5, v2, attr0.x clamp ; encoding: [0x05,0x80,0x70,0xd2,0x00,0x04,0x02,0x00]
 673
 674 v_interp_p1_f32 v5, v2, attr0.x clamp
 675 // NOSICI: error: invalid operand for instruction
 676 // VI: v_interp_p1_f32_e64 v5, v2, attr0.x clamp ; encoding: [0x05,0x80,0x70,0xd2,0x00,0x04,0x02,0x00]
 677
 678 v_interp_p1_f32_e64 v5, v2, attr0.x mul:2
 679 // NOSICI: error: not a valid operand
 680 // VI: v_interp_p1_f32_e64 v5, v2, attr0.x mul:2 ; encoding: [0x05,0x00,0x70,0xd2,0x00,0x04,0x02,0x08]
 681
 682
 683 v_interp_p2_f32_e64 v255, v2, attr0.x
 684 // NOSICI: error: instruction not supported on this GPU
 685 // VI: v_interp_p2_f32_e64 v255, v2, attr0.x ; encoding: [0xff,0x00,0x71,0xd2,0x00,0x04,0x02,0x00]
 686
 687 v_interp_p2_f32_e64 v5, v2, attr31.x
 688 // NOSICI: error: instruction not supported on this GPU
 689 // VI: v_interp_p2_f32_e64 v5, v2, attr31.x ; encoding: [0x05,0x00,0x71,0xd2,0x1f,0x04,0x02,0x00]
 690
 691 v_interp_p2_f32_e64 v5, -v2, attr0.x
 692 // NOSICI: error: not a valid operand
 693 // VI: v_interp_p2_f32_e64 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x40]
 694
 695 v_interp_p2_f32_e64 v5, |v2|, attr0.x
 696 // NOSICI: error: not a valid operand
 697 // VI: v_interp_p2_f32_e64 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x71,0xd2,0x00,0x04,0x02,0x00]
 698
 699 v_interp_p2_f32_e64 v5, v2, attr0.x clamp
 700 // NOSICI: error: invalid operand for instruction
 701 // VI: v_interp_p2_f32_e64 v5, v2, attr0.x clamp ; encoding: [0x05,0x80,0x71,0xd2,0x00,0x04,0x02,0x00]
 702
 703 v_interp_p2_f32_e64 v5, v2, attr0.x div:2
 704 // NOSICI: error: not a valid operand
 705 // VI: v_interp_p2_f32_e64 v5, v2, attr0.x div:2 ; encoding: [0x05,0x00,0x71,0xd2,0x00,0x04,0x02,0x18]
 706
 707
 708 v_interp_p1ll_f16 v5, v2, attr31.x
 709 // NOSICI: error: invalid operand for instruction
 710 // VI: v_interp_p1ll_f16 v5, v2, attr31.x ; encoding: [0x05,0x00,0x74,0xd2,0x1f,0x04,0x02,0x00]
 711
 712 v_interp_p1ll_f16 v5, v2, attr0.w
 713 // NOSICI: error: invalid operand for instruction
 714 // VI: v_interp_p1ll_f16 v5, v2, attr0.w ; encoding: [0x05,0x00,0x74,0xd2,0xc0,0x04,0x02,0x00]
 715
 716 v_interp_p1ll_f16 v5, -v2, attr0.x
 717 // NOSICI: error: not a valid operand
 718 // VI: v_interp_p1ll_f16 v5, -v2, attr0.x ; encoding: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x40]
 719
 720 v_interp_p1ll_f16 v5, |v2|, attr0.x
 721 // NOSICI: error: not a valid operand
 722 // VI: v_interp_p1ll_f16 v5, |v2|, attr0.x ; encoding: [0x05,0x02,0x74,0xd2,0x00,0x04,0x02,0x00]
 723
 724 v_interp_p1ll_f16 v5, v2, attr0.x high
 725 // NOSICI: error: invalid operand for instruction
 726 // VI: v_interp_p1ll_f16 v5, v2, attr0.x high ; encoding: [0x05,0x00,0x74,0xd2,0x00,0x05,0x02,0x00]
 727
 728 v_interp_p1ll_f16 v5, v2, attr0.x clamp
 729 // NOSICI: error: invalid operand for instruction
 730 // VI: v_interp_p1ll_f16 v5, v2, attr0.x clamp ; encoding: [0x05,0x80,0x74,0xd2,0x00,0x04,0x02,0x00]
 731
 732 v_interp_p1ll_f16 v5, v2, attr0.x mul:4
 733 // NOSICI: error: not a valid operand
 734 // VI: v_interp_p1ll_f16 v5, v2, attr0.x mul:4 ; encoding: [0x05,0x00,0x74,0xd2,0x00,0x04,0x02,0x10]
 735
 736
 737 v_interp_p1lv_f16 v5, v2, attr1.x, v3
 738 // NOSICI: error: invalid operand for instruction
 739 // VI: v_interp_p1lv_f16 v5, v2, attr1.x, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x01,0x04,0x0e,0x04]
 740
 741 v_interp_p1lv_f16 v5, v2, attr0.z, v3
 742 // NOSICI: error: invalid operand for instruction
 743 // VI: v_interp_p1lv_f16 v5, v2, attr0.z, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x80,0x04,0x0e,0x04]
 744
 745 v_interp_p1lv_f16 v5, -v2, attr0.x, v3
 746 // NOSICI: error: not a valid operand
 747 // VI: v_interp_p1lv_f16 v5, -v2, attr0.x, v3 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x44]
 748
 749 v_interp_p1lv_f16 v5, v2, attr0.x, -v3
 750 // NOSICI: error: not a valid operand
 751 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, -v3 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x84]
 752
 753 v_interp_p1lv_f16 v5, |v2|, attr0.x, v3
 754 // NOSICI: error: not a valid operand
 755 // VI: v_interp_p1lv_f16 v5, |v2|, attr0.x, v3 ; encoding: [0x05,0x02,0x75,0xd2,0x00,0x04,0x0e,0x04]
 756
 757 v_interp_p1lv_f16 v5, v2, attr0.x, |v3|
 758 // NOSICI: error: not a valid operand
 759 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, |v3| ; encoding: [0x05,0x04,0x75,0xd2,0x00,0x04,0x0e,0x04]
 760
 761 v_interp_p1lv_f16 v5, v2, attr0.x, v3 high
 762 // NOSICI: error: invalid operand for instruction
 763 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, v3 high ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x05,0x0e,0x04]
 764
 765 v_interp_p1lv_f16 v5, v2, attr0.x, v3 clamp
 766 // NOSICI: error: invalid operand for instruction
 767 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, v3 clamp ; encoding: [0x05,0x80,0x75,0xd2,0x00,0x04,0x0e,0x04]
 768
 769 v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:2
 770 // NOSICI: error: not a valid operand
 771 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, v3 mul:2 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x0c]
 772
 773 v_interp_p1lv_f16 v5, v2, attr0.x, v3 div:2
 774 // NOSICI: error: not a valid operand
 775 // VI: v_interp_p1lv_f16 v5, v2, attr0.x, v3 div:2 ; encoding: [0x05,0x00,0x75,0xd2,0x00,0x04,0x0e,0x1c]
 776
 777
 778 v_interp_p2_f16 v5, v2, attr1.x, v3
 779 // NOSICI: error: invalid operand for instruction
 780 // VI: v_interp_p2_f16 v5, v2, attr1.x, v3 ; encoding: [0x05,0x00,0x76,0xd2,0x01,0x04,0x0e,0x04]
 781
 782 v_interp_p2_f16 v5, v2, attr32.x, v3
 783 // NOSICI: error: invalid operand for instruction
 784 // VI: v_interp_p2_f16 v5, v2, attr32.x, v3 ; encoding: [0x05,0x00,0x76,0xd2,0x20,0x04,0x0e,0x04]
 785
 786 v_interp_p2_f16 v5, v2, attr0.w, v3
 787 // NOSICI: error: invalid operand for instruction
 788 // VI: v_interp_p2_f16 v5, v2, attr0.w, v3 ; encoding: [0x05,0x00,0x76,0xd2,0xc0,0x04,0x0e,0x04]
 789
 790 v_interp_p2_f16 v5, -v2, attr0.x, v3
 791 // NOSICI: error: not a valid operand
 792 // VI: v_interp_p2_f16 v5, -v2, attr0.x, v3 ; encoding: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x44]
 793
 794 v_interp_p2_f16 v5, v2, attr0.x, -v3
 795 // NOSICI: error: not a valid operand
 796 // VI: v_interp_p2_f16 v5, v2, attr0.x, -v3 ; encoding: [0x05,0x00,0x76,0xd2,0x00,0x04,0x0e,0x84]
 797
 798 v_interp_p2_f16 v5, |v2|, attr0.x, v3
 799 // NOSICI: error: not a valid operand
 800 // VI: v_interp_p2_f16 v5, |v2|, attr0.x, v3 ; encoding: [0x05,0x02,0x76,0xd2,0x00,0x04,0x0e,0x04]
 801
 802 v_interp_p2_f16 v5, v2, attr0.x, |v3|
 803 // NOSICI: error: not a valid operand
 804 // VI: v_interp_p2_f16 v5, v2, attr0.x, |v3| ; encoding: [0x05,0x04,0x76,0xd2,0x00,0x04,0x0e,0x04]
 805
 806 v_interp_p2_f16 v5, v2, attr0.x, v3 high
 807 // NOSICI: error: invalid operand for instruction
 808 // VI: v_interp_p2_f16 v5, v2, attr0.x, v3 high ; encoding: [0x05,0x00,0x76,0xd2,0x00,0x05,0x0e,0x04]
 809
 810 v_interp_p2_f16 v5, v2, attr0.x, v3 clamp
 811 // NOSICI: error: invalid operand for instruction
 812 // VI: v_interp_p2_f16 v5, v2, attr0.x, v3 clamp ; encoding: [0x05,0x80,0x76,0xd2,0x00,0x04,0x0e,0x04]