[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / ARM / directive-arch_extension-fp.s
blobb6688f166b6d54e84ba58ad81a8c780152dfb94c
1 @ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
2 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
3 @ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
4 @ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK
5 @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
6 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
7 @ RUN: not llvm-mc -triple thumbv8-eabi -filetype asm -o /dev/null 2>&1 %s \
8 @ RUN: | FileCheck %s -check-prefix CHECK-V8 -check-prefix CHECK
10 .syntax unified
12 .arch_extension fp
13 @ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
14 @ CHECK-V7-NEXT: .arch_extension fp
15 @ CHECK-V7-NEXT: ^
17 .type fp,%function
18 fp:
19 vmrs r0, mvfr2
20 @ CHECK-V7: instruction requires: FPARMv8
22 vselgt.f32 s0, s0, s0
23 @ CHECK-V7: instruction requires: FPARMv8
24 vselge.f32 s0, s0, s0
25 @ CHECK-V7: instruction requires: FPARMv8
26 vseleq.f32 s0, s0, s0
27 @ CHECK-V7: instruction requires: FPARMv8
28 vselvs.f32 s0, s0, s0
29 @ CHECK-V7: instruction requires: FPARMv8
30 vmaxnm.f32 s0, s0, s0
31 @ CHECK-V7: instruction requires: FPARMv8
32 vminnm.f32 s0, s0, s0
33 @ CHECK-V7: instruction requires: FPARMv8
35 vselgt.f64 d0, d0, d0
36 @ CHECK-V7: instruction requires: FPARMv8
37 vselge.f64 d0, d0, d0
38 @ CHECK-V7: instruction requires: FPARMv8
39 vseleq.f64 d0, d0, d0
40 @ CHECK-V7: instruction requires: FPARMv8
41 vselvs.f64 d0, d0, d0
42 @ CHECK-V7: instruction requires: FPARMv8
43 vmaxnm.f64 d0, d0, d0
44 @ CHECK-V7: instruction requires: FPARMv8
45 vminnm.f64 d0, d0, d0
46 @ CHECK-V7: instruction requires: FPARMv8
48 vcvtb.f64.f16 d0, s0
49 @ CHECK-V7: instruction requires: FPARMv8
50 vcvtb.f16.f64 s0, d0
51 @ CHECK-V7: instruction requires: FPARMv8
52 vcvtt.f64.f16 d0, s0
53 @ CHECK-V7: instruction requires: FPARMv8
54 vcvtt.f16.f64 s0, d0
55 @ CHECK-V7: instruction requires: FPARMv8
57 vcvta.s32.f32 s0, s0
58 @ CHECK-V7: instruction requires: FPARMv8
59 vcvta.u32.f32 s0, s0
60 @ CHECK-V7: instruction requires: FPARMv8
61 vcvta.s32.f64 s0, d0
62 @ CHECK-V7: instruction requires: FPARMv8
63 vcvta.u32.f64 s0, d0
64 @ CHECK-V7: instruction requires: FPARMv8
65 vcvtn.s32.f32 s0, s0
66 @ CHECK-V7: instruction requires: FPARMv8
67 vcvtn.u32.f32 s0, s0
68 @ CHECK-V7: instruction requires: FPARMv8
69 vcvtn.s32.f64 s0, d0
70 @ CHECK-V7: instruction requires: FPARMv8
71 vcvtn.u32.f64 s0, d0
72 @ CHECK-V7: instruction requires: FPARMv8
73 vcvtp.s32.f32 s0, s0
74 @ CHECK-V7: instruction requires: FPARMv8
75 vcvtp.u32.f32 s0, s0
76 @ CHECK-V7: instruction requires: FPARMv8
77 vcvtp.s32.f64 s0, d0
78 @ CHECK-V7: instruction requires: FPARMv8
79 vcvtp.u32.f64 s0, d0
80 @ CHECK-V7: instruction requires: FPARMv8
81 vcvtm.s32.f32 s0, s0
82 @ CHECK-V7: instruction requires: FPARMv8
83 vcvtm.u32.f32 s0, s0
84 @ CHECK-V7: instruction requires: FPARMv8
85 vcvtm.s32.f64 s0, d0
86 @ CHECK-V7: instruction requires: FPARMv8
87 vcvtm.u32.f64 s0, d0
88 @ CHECK-V7: instruction requires: FPARMv8
90 vrintz.f32 s0, s1
91 @ CHECK-V7: instruction requires: FPARMv8
92 vrintz.f64 d0, d1
93 @ CHECK-V7: instruction requires: FPARMv8
94 vrintz.f32.f32 s0, s0
95 @ CHECK-V7: instruction requires: FPARMv8
96 vrintz.f64.f64 d0, d0
97 @ CHECK-V7: instruction requires: FPARMv8
98 vrintr.f32 s0, s1
99 @ CHECK-V7: instruction requires: FPARMv8
100 vrintr.f64 d0, d1
101 @ CHECK-V7: instruction requires: FPARMv8
102 vrintr.f32.f32 s0, s0
103 @ CHECK-V7: instruction requires: FPARMv8
104 vrintr.f64.f64 d0, d0
105 @ CHECK-V7: instruction requires: FPARMv8
106 vrintx.f32 s0, s1
107 @ CHECK-V7: instruction requires: FPARMv8
108 vrintx.f64 d0, d1
109 @ CHECK-V7: instruction requires: FPARMv8
110 vrintx.f32.f32 s0, s0
111 @ CHECK-V7: instruction requires: FPARMv8
112 vrintx.f64.f64 d0, d0
113 @ CHECK-V7: instruction requires: FPARMv8
115 vrinta.f32 s0, s0
116 @ CHECK-V7: instruction requires: FPARMv8
117 vrinta.f64 d0, d0
118 @ CHECK-V7: instruction requires: FPARMv8
119 vrinta.f32.f32 s0, s0
120 @ CHECK-V7: instruction requires: FPARMv8
121 vrinta.f64.f64 d0, d0
122 @ CHECK-V7: instruction requires: FPARMv8
123 vrintn.f32 s0, s0
124 @ CHECK-V7: instruction requires: FPARMv8
125 vrintn.f64 d0, d0
126 @ CHECK-V7: instruction requires: FPARMv8
127 vrintn.f32.f32 s0, s0
128 @ CHECK-V7: instruction requires: FPARMv8
129 vrintn.f64.f64 d0, d0
130 @ CHECK-V7: instruction requires: FPARMv8
131 vrintp.f32 s0, s0
132 @ CHECK-V7: instruction requires: FPARMv8
133 vrintp.f64 d0, d0
134 @ CHECK-V7: instruction requires: FPARMv8
135 vrintp.f32.f32 s0, s0
136 @ CHECK-V7: instruction requires: FPARMv8
137 vrintp.f64.f64 d0, d0
138 @ CHECK-V7: instruction requires: FPARMv8
139 vrintm.f32 s0, s0
140 @ CHECK-V7: instruction requires: FPARMv8
141 vrintm.f64 d0, d0
142 @ CHECK-V7: instruction requires: FPARMv8
143 vrintm.f32.f32 s0, s0
144 @ CHECK-V7: instruction requires: FPARMv8
145 vrintm.f64.f64 d0, d0
146 @ CHECK-V7: instruction requires: FPARMv8
148 .arch_extension nofp
149 @ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
150 @ CHECK-V7-NEXT: .arch_extension nofp
151 @ CHECK-V7-NEXT: ^
153 .type nofp,%function
154 nofp:
155 vmrs r0, mvfr2
156 @ CHECK: instruction requires: FPARMv8
158 vselgt.f32 s0, s0, s0
159 @ CHECK: instruction requires: FPARMv8
160 vselge.f32 s0, s0, s0
161 @ CHECK: instruction requires: FPARMv8
162 vseleq.f32 s0, s0, s0
163 @ CHECK: instruction requires: FPARMv8
164 vselvs.f32 s0, s0, s0
165 @ CHECK: instruction requires: FPARMv8
166 vmaxnm.f32 s0, s0, s0
167 @ CHECK: instruction requires: FPARMv8
168 vminnm.f32 s0, s0, s0
169 @ CHECK: instruction requires: FPARMv8
171 vselgt.f64 d0, d0, d0
172 @ CHECK: instruction requires: FPARMv8
173 vselge.f64 d0, d0, d0
174 @ CHECK: instruction requires: FPARMv8
175 vseleq.f64 d0, d0, d0
176 @ CHECK: instruction requires: FPARMv8
177 vselvs.f64 d0, d0, d0
178 @ CHECK: instruction requires: FPARMv8
179 vmaxnm.f64 d0, d0, d0
180 @ CHECK: instruction requires: FPARMv8
181 vminnm.f64 d0, d0, d0
182 @ CHECK: instruction requires: FPARMv8
184 vcvtb.f64.f16 d0, s0
185 @ CHECK: instruction requires: FPARMv8
186 vcvtb.f16.f64 s0, d0
187 @ CHECK: instruction requires: FPARMv8
188 vcvtt.f64.f16 d0, s0
189 @ CHECK: instruction requires: FPARMv8
190 vcvtt.f16.f64 s0, d0
191 @ CHECK: instruction requires: FPARMv8
193 vcvta.s32.f32 s0, s0
194 @ CHECK: instruction requires: FPARMv8
195 vcvta.u32.f32 s0, s0
196 @ CHECK: instruction requires: FPARMv8
197 vcvta.s32.f64 s0, d0
198 @ CHECK: instruction requires: FPARMv8
199 vcvta.u32.f64 s0, d0
200 @ CHECK: instruction requires: FPARMv8
201 vcvtn.s32.f32 s0, s0
202 @ CHECK: instruction requires: FPARMv8
203 vcvtn.u32.f32 s0, s0
204 @ CHECK: instruction requires: FPARMv8
205 vcvtn.s32.f64 s0, d0
206 @ CHECK: instruction requires: FPARMv8
207 vcvtn.u32.f64 s0, d0
208 @ CHECK: instruction requires: FPARMv8
209 vcvtp.s32.f32 s0, s0
210 @ CHECK: instruction requires: FPARMv8
211 vcvtp.u32.f32 s0, s0
212 @ CHECK: instruction requires: FPARMv8
213 vcvtp.s32.f64 s0, d0
214 @ CHECK: instruction requires: FPARMv8
215 vcvtp.u32.f64 s0, d0
216 @ CHECK: instruction requires: FPARMv8
217 vcvtm.s32.f32 s0, s0
218 @ CHECK: instruction requires: FPARMv8
219 vcvtm.u32.f32 s0, s0
220 @ CHECK: instruction requires: FPARMv8
221 vcvtm.s32.f64 s0, d0
222 @ CHECK: instruction requires: FPARMv8
223 vcvtm.u32.f64 s0, d0
224 @ CHECK: instruction requires: FPARMv8
226 vrintz.f32 s0, s1
227 @ CHECK: instruction requires: FPARMv8
228 vrintz.f64 d0, d1
229 @ CHECK: instruction requires: FPARMv8
230 vrintz.f32.f32 s0, s0
231 @ CHECK: instruction requires: FPARMv8
232 vrintz.f64.f64 d0, d0
233 @ CHECK: instruction requires: FPARMv8
234 vrintr.f32 s0, s1
235 @ CHECK: instruction requires: FPARMv8
236 vrintr.f64 d0, d1
237 @ CHECK: instruction requires: FPARMv8
238 vrintr.f32.f32 s0, s0
239 @ CHECK: instruction requires: FPARMv8
240 vrintr.f64.f64 d0, d0
241 @ CHECK: instruction requires: FPARMv8
242 vrintx.f32 s0, s1
243 @ CHECK: instruction requires: FPARMv8
244 vrintx.f64 d0, d1
245 @ CHECK: instruction requires: FPARMv8
246 vrintx.f32.f32 s0, s0
247 @ CHECK: instruction requires: FPARMv8
248 vrintx.f64.f64 d0, d0
249 @ CHECK: instruction requires: FPARMv8
251 vrinta.f32 s0, s0
252 @ CHECK: instruction requires: FPARMv8
253 vrinta.f64 d0, d0
254 @ CHECK: instruction requires: FPARMv8
255 vrinta.f32.f32 s0, s0
256 @ CHECK: instruction requires: FPARMv8
257 vrinta.f64.f64 d0, d0
258 @ CHECK: instruction requires: FPARMv8
259 vrintn.f32 s0, s0
260 @ CHECK: instruction requires: FPARMv8
261 vrintn.f64 d0, d0
262 @ CHECK: instruction requires: FPARMv8
263 vrintn.f32.f32 s0, s0
264 @ CHECK: instruction requires: FPARMv8
265 vrintn.f64.f64 d0, d0
266 @ CHECK: instruction requires: FPARMv8
267 vrintp.f32 s0, s0
268 @ CHECK: instruction requires: FPARMv8
269 vrintp.f64 d0, d0
270 @ CHECK: instruction requires: FPARMv8
271 vrintp.f32.f32 s0, s0
272 @ CHECK: instruction requires: FPARMv8
273 vrintp.f64.f64 d0, d0
274 @ CHECK: instruction requires: FPARMv8
275 vrintm.f32 s0, s0
276 @ CHECK: instruction requires: FPARMv8
277 vrintm.f64 d0, d0
278 @ CHECK: instruction requires: FPARMv8
279 vrintm.f32.f32 s0, s0
280 @ CHECK: instruction requires: FPARMv8
281 vrintm.f64.f64 d0, d0
282 @ CHECK: instruction requires: FPARMv8