[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / ARM / thumbv7em.s
blob53ebff2f483544d1dee04c44ca10eebfa164bdb9
1 @ RUN: llvm-mc -triple=thumbv7em -show-encoding < %s | FileCheck %s
2 @ RUN: not llvm-mc -triple=thumbv7m -show-encoding 2>&1 < %s | FileCheck --check-prefix=CHECK-V7M %s
4 .syntax unified
6 @ Check that the assembler can handle the documented syntax from the ARM ARM.
7 @ These tests test instruction encodings specific to ARMv7E-M.
9 @------------------------------------------------------------------------------
10 @ MSR
11 @------------------------------------------------------------------------------
13 msr apsr_g, r0
14 msr apsr_nzcvqg, r0
15 msr iapsr_g, r0
16 msr iapsr_nzcvqg, r0
17 msr eapsr_g, r0
18 msr eapsr_nzcvqg, r0
19 msr xpsr_g, r0
20 msr xpsr_nzcvqg, r0
22 @ CHECK: msr apsr_g, r0 @ encoding: [0x80,0xf3,0x00,0x84]
23 @ CHECK: msr apsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x00,0x8c]
24 @ CHECK: msr iapsr_g, r0 @ encoding: [0x80,0xf3,0x01,0x84]
25 @ CHECK: msr iapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x01,0x8c]
26 @ CHECK: msr eapsr_g, r0 @ encoding: [0x80,0xf3,0x02,0x84]
27 @ CHECK: msr eapsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x02,0x8c]
28 @ CHECK: msr xpsr_g, r0 @ encoding: [0x80,0xf3,0x03,0x84]
29 @ CHECK: msr xpsr_nzcvqg, r0 @ encoding: [0x80,0xf3,0x03,0x8c]
30 @ CHECK-V7M: error: invalid operand for instruction
31 @ CHECK-V7M-NEXT: msr apsr_g, r0
32 @ CHECK-V7M-NEXT: ^
33 @ CHECK-V7M: error: invalid operand for instruction
34 @ CHECK-V7M-NEXT: msr apsr_nzcvqg, r0
35 @ CHECK-V7M-NEXT: ^
36 @ CHECK-V7M: error: invalid operand for instruction
37 @ CHECK-V7M-NEXT: msr iapsr_g, r0
38 @ CHECK-V7M-NEXT: ^
39 @ CHECK-V7M: error: invalid operand for instruction
40 @ CHECK-V7M-NEXT: msr iapsr_nzcvqg, r0
41 @ CHECK-V7M-NEXT: ^
42 @ CHECK-V7M: error: invalid operand for instruction
43 @ CHECK-V7M-NEXT: msr eapsr_g, r0
44 @ CHECK-V7M-NEXT: ^
45 @ CHECK-V7M: error: invalid operand for instruction
46 @ CHECK-V7M-NEXT: msr eapsr_nzcvqg, r0
47 @ CHECK-V7M-NEXT: ^
48 @ CHECK-V7M: error: invalid operand for instruction
49 @ CHECK-V7M-NEXT: msr xpsr_g, r0
50 @ CHECK-V7M-NEXT: ^
51 @ CHECK-V7M: error: invalid operand for instruction
52 @ CHECK-V7M-NEXT: msr xpsr_nzcvqg, r0
53 @ CHECK-V7M-NEXT: ^