1 @ RUN
: llvm-mc
-triple
=thumbv7em
-show-encoding
< %s | FileCheck
%s
2 @ RUN
: not llvm-mc
-triple
=thumbv7m
-show-encoding
2>&1 < %s | FileCheck
--check-prefix
=CHECK-V7M
%s
6 @ Check that the assembler can handle the documented syntax from the ARM ARM.
7 @ These tests test instruction encodings specific to ARMv7E-M.
9 @
------------------------------------------------------------------------------
11 @
------------------------------------------------------------------------------
22 @ CHECK
: msr apsr_g
, r0 @ encoding
: [0x80,0xf3,0x00,0x84]
23 @ CHECK
: msr apsr_nzcvqg
, r0 @ encoding
: [0x80,0xf3,0x00,0x8c]
24 @ CHECK
: msr iapsr_g
, r0 @ encoding
: [0x80,0xf3,0x01,0x84]
25 @ CHECK
: msr iapsr_nzcvqg
, r0 @ encoding
: [0x80,0xf3,0x01,0x8c]
26 @ CHECK
: msr eapsr_g
, r0 @ encoding
: [0x80,0xf3,0x02,0x84]
27 @ CHECK
: msr eapsr_nzcvqg
, r0 @ encoding
: [0x80,0xf3,0x02,0x8c]
28 @ CHECK
: msr xpsr_g
, r0 @ encoding
: [0x80,0xf3,0x03,0x84]
29 @ CHECK
: msr xpsr_nzcvqg
, r0 @ encoding
: [0x80,0xf3,0x03,0x8c]
30 @ CHECK-V7M
: error
: invalid operand for instruction
31 @ CHECK-V7M-NEXT
: msr apsr_g
, r0
33 @ CHECK-V7M
: error
: invalid operand for instruction
34 @ CHECK-V7M-NEXT
: msr apsr_nzcvqg
, r0
36 @ CHECK-V7M
: error
: invalid operand for instruction
37 @ CHECK-V7M-NEXT
: msr iapsr_g
, r0
39 @ CHECK-V7M
: error
: invalid operand for instruction
40 @ CHECK-V7M-NEXT
: msr iapsr_nzcvqg
, r0
42 @ CHECK-V7M
: error
: invalid operand for instruction
43 @ CHECK-V7M-NEXT
: msr eapsr_g
, r0
45 @ CHECK-V7M
: error
: invalid operand for instruction
46 @ CHECK-V7M-NEXT
: msr eapsr_nzcvqg
, r0
48 @ CHECK-V7M
: error
: invalid operand for instruction
49 @ CHECK-V7M-NEXT
: msr xpsr_g
, r0
51 @ CHECK-V7M
: error
: invalid operand for instruction
52 @ CHECK-V7M-NEXT
: msr xpsr_nzcvqg
, r0