[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / Disassembler / AMDGPU / trap_vi.txt
blobeb254134cc53ea80fbf318d0d443feedb64344e7
1 # RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
3 #===----------------------------------------------------------------------===#
4 # Trap Handler related - 32 bit registers
5 #===----------------------------------------------------------------------===#
7 # VI:   s_add_u32 ttmp0, ttmp0, 4       ; encoding: [0x70,0x84,0x70,0x80]
8 0x70,0x84,0x70,0x80
10 # VI:   s_add_u32 ttmp4, 8, ttmp4       ; encoding: [0x88,0x74,0x74,0x80]
11 0x88,0x74,0x74,0x80
13 # VI:   s_add_u32 ttmp4, ttmp4, 0x100   ; encoding: [0x74,0xff,0x74,0x80,0x00,0x01,0x00,0x00]
14 0x74,0xff,0x74,0x80,0x00,0x01,0x00,0x00
16 # VI:   s_add_u32 ttmp4, ttmp4, 4       ; encoding: [0x74,0x84,0x74,0x80]
17 0x74,0x84,0x74,0x80
19 # VI:   s_add_u32 ttmp4, ttmp8, ttmp4   ; encoding: [0x78,0x74,0x74,0x80]
20 0x78,0x74,0x74,0x80
22 # VI:   s_and_b32 ttmp10, ttmp8, 0x80   ; encoding: [0x78,0xff,0x7a,0x86,0x80,0x00,0x00,0x00]
23 0x78,0xff,0x7a,0x86,0x80,0x00,0x00,0x00
25 # VI:   s_and_b32 ttmp9, tma_hi, 0xffff ; encoding: [0x6f,0xff,0x79,0x86,0xff,0xff,0x00,0x00]
26 0x6f,0xff,0x79,0x86,0xff,0xff,0x00,0x00
28 # VI:   s_and_b32 ttmp9, ttmp9, 0x1ff   ; encoding: [0x79,0xff,0x79,0x86,0xff,0x01,0x00,0x00]
29 0x79,0xff,0x79,0x86,0xff,0x01,0x00,0x00
31 # VI:   s_and_b32 ttmp9, tma_lo, 0xffff0000 ; encoding: [0x6e,0xff,0x79,0x86,0x00,0x00,0xff,0xff]
32 0x6e,0xff,0x79,0x86,0x00,0x00,0xff,0xff
34 # VI:   s_and_b32 ttmp9, ttmp9, ttmp8   ; encoding: [0x79,0x78,0x79,0x86]
35 0x79,0x78,0x79,0x86
37 # VI:   s_and_b32 ttmp8, ttmp1, 0x1000000 ; encoding: [0x71,0xff,0x78,0x86,0x00,0x00,0x00,0x01]
38 0x71,0xff,0x78,0x86,0x00,0x00,0x00,0x01
40 # VI:   s_cmp_eq_i32 ttmp8, 0           ; encoding: [0x78,0x80,0x00,0xbf]
41 0x78,0x80,0x00,0xbf
43 # VI:   s_cmp_eq_i32 ttmp8, 0xfe        ; encoding: [0x78,0xff,0x00,0xbf,0xfe,0x00,0x00,0x00]
44 0x78,0xff,0x00,0xbf,0xfe,0x00,0x00,0x00
46 # VI:   s_lshr_b32 ttmp8, ttmp8, 12     ; encoding: [0x78,0x8c,0x78,0x8f]
47 0x78,0x8c,0x78,0x8f
49 # VI:   v_mov_b32_e32 v1, ttmp8         ; encoding: [0x78,0x02,0x02,0x7e]
50 0x78,0x02,0x02,0x7e
52 # VI:   s_mov_b32 m0, ttmp8             ; encoding: [0x78,0x00,0xfc,0xbe]
53 0x78,0x00,0xfc,0xbe
55 # VI:   s_mov_b32 ttmp10, 0             ; encoding: [0x80,0x00,0xfa,0xbe]
56 0x80,0x00,0xfa,0xbe
58 # VI:   s_mov_b32 ttmp11, 0x1024fac     ; encoding: [0xff,0x00,0xfb,0xbe,0xac,0x4f,0x02,0x01]
59 0xff,0x00,0xfb,0xbe,0xac,0x4f,0x02,0x01
61 # VI:   s_mov_b32 ttmp8, m0             ; encoding: [0x7c,0x00,0xf8,0xbe]
62 0x7c,0x00,0xf8,0xbe
64 # VI:   s_mov_b32 ttmp8, tma_lo         ; encoding: [0x6e,0x00,0xf8,0xbe]
65 0x6e,0x00,0xf8,0xbe
67 # VI:   s_mul_i32 ttmp8, 0x324, ttmp8   ; encoding: [0xff,0x78,0x78,0x92,0x24,0x03,0x00,0x00]
68 0xff,0x78,0x78,0x92,0x24,0x03,0x00,0x00
70 # VI:   s_or_b32 ttmp9, ttmp9, 0x280000 ; encoding: [0x79,0xff,0x79,0x87,0x00,0x00,0x28,0x00]
71 0x79,0xff,0x79,0x87,0x00,0x00,0x28,0x00
73 #===----------------------------------------------------------------------===#
74 # Trap Handler related - Pairs and quadruples of registers
75 #===----------------------------------------------------------------------===#
77 # VI:   s_mov_b64 ttmp[4:5], exec       ; encoding: [0x7e,0x01,0xf4,0xbe]
78 0x7e,0x01,0xf4,0xbe
80 # VI:   s_mov_b64 ttmp[4:5], exec       ; encoding: [0x7e,0x01,0xf4,0xbe]
81 0x7e,0x01,0xf4,0xbe
83 # VI:   s_mov_b64 exec, ttmp[4:5]       ; encoding: [0x74,0x01,0xfe,0xbe]
84 0x74,0x01,0xfe,0xbe
86 # VI:   s_mov_b64 tba, ttmp[4:5]        ; encoding: [0x74,0x01,0xec,0xbe]
87 0x74,0x01,0xec,0xbe
89 # VI:   s_mov_b64 ttmp[4:5], tba        ; encoding: [0x6c,0x01,0xf4,0xbe]
90 0x6c,0x01,0xf4,0xbe
92 # VI:   s_mov_b64 tma, ttmp[4:5]        ; encoding: [0x74,0x01,0xee,0xbe]
93 0x74,0x01,0xee,0xbe
95 # VI:   s_mov_b64 ttmp[4:5], tma        ; encoding: [0x6e,0x01,0xf4,0xbe]
96 0x6e,0x01,0xf4,0xbe
98 #===----------------------------------------------------------------------===#
99 # Trap Handler related - Some specific instructions
100 #===----------------------------------------------------------------------===#
102 # VI:   s_setpc_b64 ttmp[2:3]           ; encoding: [0x72,0x1d,0x80,0xbe]
103 0x72,0x1d,0x80,0xbe
105 # VI:   v_readfirstlane_b32 ttmp8, v1   ; encoding: [0x01,0x05,0xf0,0x7e]
106 0x01,0x05,0xf0,0x7e
108 # VI:   buffer_atomic_inc v1, off, ttmp[8:11], 56  glc ; encoding: [0x00,0x40,0x2c,0xe1,0x00,0x01,0x1e,0xb8]
109 0x00,0x40,0x2c,0xe1,0x00,0x01,0x1e,0xb8
111 #===----------------------------------------------------------------------===#
112 # Trap Handler related - 8-dword registers
113 #===----------------------------------------------------------------------===#
115 # VI:   s_buffer_load_dwordx8 ttmp[0:7], s[0:3], s0 ; encoding: [0x00,0x1c,0x2c,0xc0,0x00,0x00,0x00,0x00]
116 0x00,0x1c,0x2c,0xc0,0x00,0x00,0x00,0x00
118 # VI:   s_buffer_load_dwordx8 ttmp[4:11], s[0:3], s0 ; encoding: [0x00,0x1d,0x2c,0xc0,0x00,0x00,0x00,0x00]
119 0x00,0x1d,0x2c,0xc0,0x00,0x00,0x00,0x00
121 # VI:   s_load_dwordx8 ttmp[0:7], s[0:1], s0 ; encoding: [0x00,0x1c,0x0c,0xc0,0x00,0x00,0x00,0x00]
122 0x00,0x1c,0x0c,0xc0,0x00,0x00,0x00,0x00
124 # VI:   s_load_dwordx8 ttmp[4:11], s[0:1], s0 ; encoding: [0x00,0x1d,0x0c,0xc0,0x00,0x00,0x00,0x00]
125 0x00,0x1d,0x0c,0xc0,0x00,0x00,0x00,0x00