[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / MC / MachO / ARM / thumb2-movw-fixup.s
blob3191a90852bb8d0887252465d6cb4561a4b365b3
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple thumbv7-apple-darwin10 -filetype=obj -o - < %s | llvm-readobj -r --expand-relocs | FileCheck %s
3 @ rdar://10038370
5 .syntax unified
6 .text
7 .align 2
8 .code 16
9 .thumb_func _foo
10 movw r2, :lower16:L1
11 movt r2, :upper16:L1
12 movw r12, :lower16:L2
13 movt r12, :upper16:L2
14 .space 70000
16 .data
17 L1: .long 0
18 L2: .long 0
20 @ CHECK: Format: Mach-O arm
21 @ CHECK: Arch: arm
22 @ CHECK: AddressSize: 32bit
23 @ CHECK: Relocations [
24 @ CHECK: Section __text {
25 @ CHECK: Relocation {
26 @ CHECK: Offset: 0xC
27 @ CHECK: PCRel: 0
28 @ CHECK: Length: 3
29 @ CHECK: Type: ARM_RELOC_HALF (8)
30 @ CHECK: Section: __data (2)
31 @ CHECK: }
32 @ CHECK: Relocation {
33 @ CHECK: Offset: 0x1184
34 @ CHECK: PCRel: 0
35 @ CHECK: Length: 3
36 @ CHECK: Type: ARM_RELOC_PAIR (1)
37 @ CHECK: Section: - (16777215)
38 @ CHECK: }
39 @ CHECK: Relocation {
40 @ CHECK: Offset: 0x8
41 @ CHECK: PCRel: 0
42 @ CHECK: Length: 2
43 @ CHECK: Type: ARM_RELOC_HALF (8)
44 @ CHECK: Section: __data (2)
45 @ CHECK: }
46 @ CHECK: Relocation {
47 @ CHECK: Offset: 0x1
48 @ CHECK: PCRel: 0
49 @ CHECK: Length: 2
50 @ CHECK: Type: ARM_RELOC_PAIR (1)
51 @ CHECK: Section: - (16777215)
52 @ CHECK: }
53 @ CHECK: Relocation {
54 @ CHECK: Offset: 0x4
55 @ CHECK: PCRel: 0
56 @ CHECK: Length: 3
57 @ CHECK: Type: ARM_RELOC_HALF (8)
58 @ CHECK: Section: __data (2)
59 @ CHECK: }
60 @ CHECK: Relocation {
61 @ CHECK: Offset: 0x1180
62 @ CHECK: PCRel: 0
63 @ CHECK: Length: 3
64 @ CHECK: Type: ARM_RELOC_PAIR (1)
65 @ CHECK: Section: - (16777215)
66 @ CHECK: }
67 @ CHECK: Relocation {
68 @ CHECK: Offset: 0x0
69 @ CHECK: PCRel: 0
70 @ CHECK: Length: 2
71 @ CHECK: Type: ARM_RELOC_HALF (8)
72 @ CHECK: Section: __data (2)
73 @ CHECK: }
74 @ CHECK: Relocation {
75 @ CHECK: Offset: 0x1
76 @ CHECK: PCRel: 0
77 @ CHECK: Length: 2
78 @ CHECK: Type: ARM_RELOC_PAIR (1)
79 @ CHECK: Section: - (16777215)
80 @ CHECK: }
81 @ CHECK: }
82 @ CHECK: ]