1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -instcombine -S | FileCheck %s
4 ; There should be no 'and' instructions left in any test.
6 define i32 @test1(i32 %A) {
8 ; CHECK-NEXT: ret i32 0
14 define i32 @test2(i32 %A) {
15 ; CHECK-LABEL: @test2(
16 ; CHECK-NEXT: ret i32 %A
22 define i1 @test3(i1 %A) {
23 ; CHECK-LABEL: @test3(
24 ; CHECK-NEXT: ret i1 false
30 define i1 @test4(i1 %A) {
31 ; CHECK-LABEL: @test4(
32 ; CHECK-NEXT: ret i1 %A
38 define i32 @test5(i32 %A) {
39 ; CHECK-LABEL: @test5(
40 ; CHECK-NEXT: ret i32 %A
46 define i1 @test6(i1 %A) {
47 ; CHECK-LABEL: @test6(
48 ; CHECK-NEXT: ret i1 %A
55 define i32 @test7(i32 %A) {
56 ; CHECK-LABEL: @test7(
57 ; CHECK-NEXT: ret i32 0
59 %NotA = xor i32 %A, -1
60 %B = and i32 %A, %NotA
65 define i8 @test8(i8 %A) {
66 ; CHECK-LABEL: @test8(
67 ; CHECK-NEXT: ret i8 0
74 ; Test of sign bit, convert to setle %A, 0
75 define i1 @test9(i32 %A) {
76 ; CHECK-LABEL: @test9(
77 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %A, 0
78 ; CHECK-NEXT: ret i1 [[C]]
80 %B = and i32 %A, -2147483648
81 %C = icmp ne i32 %B, 0
85 ; Test of sign bit, convert to setle %A, 0
86 define i1 @test9a(i32 %A) {
87 ; CHECK-LABEL: @test9a(
88 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %A, 0
89 ; CHECK-NEXT: ret i1 [[C]]
91 %B = and i32 %A, -2147483648
92 %C = icmp ne i32 %B, 0
96 define i32 @test10(i32 %A) {
97 ; CHECK-LABEL: @test10(
98 ; CHECK-NEXT: ret i32 1
102 ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
107 define i32 @test11(i32 %A, i32* %P) {
108 ; CHECK-LABEL: @test11(
109 ; CHECK-NEXT: [[B:%.*]] = or i32 %A, 3
110 ; CHECK-NEXT: [[C:%.*]] = xor i32 [[B]], 12
111 ; CHECK-NEXT: store i32 [[C]], i32* %P, align 4
112 ; CHECK-NEXT: ret i32 3
116 ; additional use of C
117 store i32 %C, i32* %P
118 ; %C = and uint %B, 3 --> 3
123 define i1 @test12(i32 %A, i32 %B) {
124 ; CHECK-LABEL: @test12(
125 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %A, %B
126 ; CHECK-NEXT: ret i1 [[TMP1]]
128 %C1 = icmp ult i32 %A, %B
129 %C2 = icmp ule i32 %A, %B
130 ; (A < B) & (A <= B) === (A < B)
135 define i1 @test13(i32 %A, i32 %B) {
136 ; CHECK-LABEL: @test13(
137 ; CHECK-NEXT: ret i1 false
139 %C1 = icmp ult i32 %A, %B
140 %C2 = icmp ugt i32 %A, %B
141 ; (A < B) & (A > B) === false
146 define i1 @test14(i8 %A) {
147 ; CHECK-LABEL: @test14(
148 ; CHECK-NEXT: [[C:%.*]] = icmp slt i8 %A, 0
149 ; CHECK-NEXT: ret i1 [[C]]
152 %C = icmp ne i8 %B, 0
156 define i8 @test15(i8 %A) {
157 ; CHECK-LABEL: @test15(
158 ; CHECK-NEXT: ret i8 0
166 define i8 @test16(i8 %A) {
167 ; CHECK-LABEL: @test16(
168 ; CHECK-NEXT: ret i8 0
175 define i1 @test18(i32 %A) {
176 ; CHECK-LABEL: @test18(
177 ; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %A, 127
178 ; CHECK-NEXT: ret i1 [[C]]
180 %B = and i32 %A, -128
182 %C = icmp ne i32 %B, 0
186 define <2 x i1> @test18_vec(<2 x i32> %A) {
187 ; CHECK-LABEL: @test18_vec(
188 ; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> %A, <i32 127, i32 127>
189 ; CHECK-NEXT: ret <2 x i1> [[C]]
191 %B = and <2 x i32> %A, <i32 -128, i32 -128>
192 %C = icmp ne <2 x i32> %B, zeroinitializer
196 define i1 @test18a(i8 %A) {
197 ; CHECK-LABEL: @test18a(
198 ; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %A, 2
199 ; CHECK-NEXT: ret i1 [[C]]
202 %C = icmp eq i8 %B, 0
206 define <2 x i1> @test18a_vec(<2 x i8> %A) {
207 ; CHECK-LABEL: @test18a_vec(
208 ; CHECK-NEXT: [[C:%.*]] = icmp ult <2 x i8> %A, <i8 2, i8 2>
209 ; CHECK-NEXT: ret <2 x i1> [[C]]
211 %B = and <2 x i8> %A, <i8 -2, i8 -2>
212 %C = icmp eq <2 x i8> %B, zeroinitializer
216 define i32 @test19(i32 %A) {
217 ; CHECK-LABEL: @test19(
218 ; CHECK-NEXT: [[B:%.*]] = shl i32 %A, 3
219 ; CHECK-NEXT: ret i32 [[B]]
222 ;; Clearing a zero bit
227 define i8 @test20(i8 %A) {
228 ; CHECK-LABEL: @test20(
229 ; CHECK-NEXT: [[C:%.*]] = lshr i8 %A, 7
230 ; CHECK-NEXT: ret i8 [[C]]
238 define i1 @test23(i32 %A) {
239 ; CHECK-LABEL: @test23(
240 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 %A, 2
241 ; CHECK-NEXT: ret i1 [[TMP1]]
243 %B = icmp sgt i32 %A, 1
244 %C = icmp sle i32 %A, 2
249 ; FIXME: Vectors should fold too.
250 define <2 x i1> @test23vec(<2 x i32> %A) {
251 ; CHECK-LABEL: @test23vec(
252 ; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 1, i32 1>
253 ; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> %A, <i32 3, i32 3>
254 ; CHECK-NEXT: [[D:%.*]] = and <2 x i1> [[B]], [[C]]
255 ; CHECK-NEXT: ret <2 x i1> [[D]]
257 %B = icmp sgt <2 x i32> %A, <i32 1, i32 1>
258 %C = icmp sle <2 x i32> %A, <i32 2, i32 2>
259 %D = and <2 x i1> %B, %C
263 define i1 @test24(i32 %A) {
264 ; CHECK-LABEL: @test24(
265 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %A, 2
266 ; CHECK-NEXT: ret i1 [[TMP1]]
268 %B = icmp sgt i32 %A, 1
269 %C = icmp ne i32 %A, 2
275 define i1 @test25(i32 %A) {
276 ; CHECK-LABEL: @test25(
277 ; CHECK-NEXT: [[A_OFF:%.*]] = add i32 %A, -50
278 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
279 ; CHECK-NEXT: ret i1 [[TMP1]]
281 %B = icmp sge i32 %A, 50
282 %C = icmp slt i32 %A, 100
287 ; FIXME: Vectors should fold too.
288 define <2 x i1> @test25vec(<2 x i32> %A) {
289 ; CHECK-LABEL: @test25vec(
290 ; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 49, i32 49>
291 ; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> %A, <i32 100, i32 100>
292 ; CHECK-NEXT: [[D:%.*]] = and <2 x i1> [[B]], [[C]]
293 ; CHECK-NEXT: ret <2 x i1> [[D]]
295 %B = icmp sge <2 x i32> %A, <i32 50, i32 50>
296 %C = icmp slt <2 x i32> %A, <i32 100, i32 100>
297 %D = and <2 x i1> %B, %C
301 define i8 @test27(i8 %A) {
302 ; CHECK-LABEL: @test27(
303 ; CHECK-NEXT: ret i8 0
313 ;; This is just a zero-extending shr.
314 define i32 @test28(i32 %X) {
315 ; CHECK-LABEL: @test28(
316 ; CHECK-NEXT: [[Y1:%.*]] = lshr i32 %X, 24
317 ; CHECK-NEXT: ret i32 [[Y1]]
321 ;; Mask out sign bits
326 define i32 @test29(i8 %X) {
327 ; CHECK-LABEL: @test29(
328 ; CHECK-NEXT: [[Y:%.*]] = zext i8 %X to i32
329 ; CHECK-NEXT: ret i32 [[Y]]
331 %Y = zext i8 %X to i32
332 ;; Zero extend makes this unneeded.
337 define i32 @test30(i1 %X) {
338 ; CHECK-LABEL: @test30(
339 ; CHECK-NEXT: [[Y:%.*]] = zext i1 %X to i32
340 ; CHECK-NEXT: ret i32 [[Y]]
342 %Y = zext i1 %X to i32
347 define i32 @test31(i1 %X) {
348 ; CHECK-LABEL: @test31(
349 ; CHECK-NEXT: [[Z:%.*]] = select i1 [[X:%.*]], i32 16, i32 0
350 ; CHECK-NEXT: ret i32 [[Z]]
352 %Y = zext i1 %X to i32
358 ; Demanded bit analysis allows us to eliminate the add.
360 define <2 x i32> @and_demanded_bits_splat_vec(<2 x i32> %x) {
361 ; CHECK-LABEL: @and_demanded_bits_splat_vec(
362 ; CHECK-NEXT: [[Z:%.*]] = and <2 x i32> %x, <i32 7, i32 7>
363 ; CHECK-NEXT: ret <2 x i32> [[Z]]
365 %y = add <2 x i32> %x, <i32 8, i32 8>
366 %z = and <2 x i32> %y, <i32 7, i32 7>
370 ; zext (x >> 8) has all zeros in the high 24-bits: 0x000000xx
371 ; (y | 255) has all ones in the low 8-bits: 0xyyyyyyff
372 ; 'and' of those is all known bits - it's just 'z'.
374 define i32 @and_zext_demanded(i16 %x, i32 %y) {
375 ; CHECK-LABEL: @and_zext_demanded(
376 ; CHECK-NEXT: [[S:%.*]] = lshr i16 %x, 8
377 ; CHECK-NEXT: [[Z:%.*]] = zext i16 [[S]] to i32
378 ; CHECK-NEXT: ret i32 [[Z]]
381 %z = zext i16 %s to i32
387 define i32 @test32(i32 %In) {
388 ; CHECK-LABEL: @test32(
389 ; CHECK-NEXT: ret i32 0
397 ;; Code corresponding to one-bit bitfield ^1.
398 define i32 @test33(i32 %b) {
399 ; CHECK-LABEL: @test33(
400 ; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 %b, 1
401 ; CHECK-NEXT: ret i32 [[TMP_13]]
403 %tmp.4.mask = and i32 %b, 1
404 %tmp.10 = xor i32 %tmp.4.mask, 1
405 %tmp.12 = and i32 %b, -2
406 %tmp.13 = or i32 %tmp.12, %tmp.10
410 define i32 @test33b(i32 %b) {
411 ; CHECK-LABEL: @test33b(
412 ; CHECK-NEXT: [[TMP_13:%.*]] = xor i32 [[B:%.*]], 1
413 ; CHECK-NEXT: ret i32 [[TMP_13]]
415 %tmp.4.mask = and i32 %b, 1
416 %tmp.10 = xor i32 %tmp.4.mask, 1
417 %tmp.12 = and i32 %b, -2
418 %tmp.13 = or i32 %tmp.10, %tmp.12
422 define <2 x i32> @test33vec(<2 x i32> %b) {
423 ; CHECK-LABEL: @test33vec(
424 ; CHECK-NEXT: [[TMP_13:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
425 ; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
427 %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
428 %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
429 %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
430 %tmp.13 = or <2 x i32> %tmp.12, %tmp.10
431 ret <2 x i32> %tmp.13
434 define <2 x i32> @test33vecb(<2 x i32> %b) {
435 ; CHECK-LABEL: @test33vecb(
436 ; CHECK-NEXT: [[TMP_13:%.*]] = xor <2 x i32> [[B:%.*]], <i32 1, i32 1>
437 ; CHECK-NEXT: ret <2 x i32> [[TMP_13]]
439 %tmp.4.mask = and <2 x i32> %b, <i32 1, i32 1>
440 %tmp.10 = xor <2 x i32> %tmp.4.mask, <i32 1, i32 1>
441 %tmp.12 = and <2 x i32> %b, <i32 -2, i32 -2>
442 %tmp.13 = or <2 x i32> %tmp.10, %tmp.12
443 ret <2 x i32> %tmp.13
446 define i32 @test34(i32 %A, i32 %B) {
447 ; CHECK-LABEL: @test34(
448 ; CHECK-NEXT: ret i32 %B
450 %tmp.2 = or i32 %B, %A
451 %tmp.4 = and i32 %tmp.2, %B
455 ; FIXME: This test should only need -instsimplify (ValueTracking / computeKnownBits), not -instcombine.
457 define <2 x i32> @PR24942(<2 x i32> %x) {
458 ; CHECK-LABEL: @PR24942(
459 ; CHECK-NEXT: ret <2 x i32> zeroinitializer
461 %lshr = lshr <2 x i32> %x, <i32 31, i32 31>
462 %and = and <2 x i32> %lshr, <i32 2, i32 2>
466 define i64 @test35(i32 %X) {
467 ; CHECK-LABEL: @test35(
468 ; CHECK-NEXT: %[[sub:.*]] = sub i32 0, %X
469 ; CHECK-NEXT: %[[and:.*]] = and i32 %[[sub]], 240
470 ; CHECK-NEXT: %[[cst:.*]] = zext i32 %[[and]] to i64
471 ; CHECK-NEXT: ret i64 %[[cst]]
472 %zext = zext i32 %X to i64
473 %zsub = sub i64 0, %zext
474 %res = and i64 %zsub, 240
478 define i64 @test36(i32 %X) {
479 ; CHECK-LABEL: @test36(
480 ; CHECK-NEXT: %[[sub:.*]] = add i32 %X, 7
481 ; CHECK-NEXT: %[[and:.*]] = and i32 %[[sub]], 240
482 ; CHECK-NEXT: %[[cst:.*]] = zext i32 %[[and]] to i64
483 ; CHECK-NEXT: ret i64 %[[cst]]
484 %zext = zext i32 %X to i64
485 %zsub = add i64 %zext, 7
486 %res = and i64 %zsub, 240
490 define i64 @test37(i32 %X) {
491 ; CHECK-LABEL: @test37(
492 ; CHECK-NEXT: %[[sub:.*]] = mul i32 %X, 7
493 ; CHECK-NEXT: %[[and:.*]] = and i32 %[[sub]], 240
494 ; CHECK-NEXT: %[[cst:.*]] = zext i32 %[[and]] to i64
495 ; CHECK-NEXT: ret i64 %[[cst]]
496 %zext = zext i32 %X to i64
497 %zsub = mul i64 %zext, 7
498 %res = and i64 %zsub, 240
502 define i64 @test38(i32 %X) {
503 ; CHECK-LABEL: @test38(
504 ; CHECK-NEXT: %[[and:.*]] = and i32 %X, 240
505 ; CHECK-NEXT: %[[cst:.*]] = zext i32 %[[and]] to i64
506 ; CHECK-NEXT: ret i64 %[[cst]]
507 %zext = zext i32 %X to i64
508 %zsub = xor i64 %zext, 7
509 %res = and i64 %zsub, 240
513 define i64 @test39(i32 %X) {
514 ; CHECK-LABEL: @test39(
515 ; CHECK-NEXT: %[[and:.*]] = and i32 %X, 240
516 ; CHECK-NEXT: %[[cst:.*]] = zext i32 %[[and]] to i64
517 ; CHECK-NEXT: ret i64 %[[cst]]
518 %zext = zext i32 %X to i64
519 %zsub = or i64 %zext, 7
520 %res = and i64 %zsub, 240
524 define i32 @test40(i1 %C) {
525 ; CHECK-LABEL: @test40(
526 ; CHECK-NEXT: [[A:%.*]] = select i1 [[C:%.*]], i32 104, i32 10
527 ; CHECK-NEXT: ret i32 [[A]]
529 %A = select i1 %C, i32 1000, i32 10
534 define <2 x i32> @test40vec(i1 %C) {
535 ; CHECK-LABEL: @test40vec(
536 ; CHECK-NEXT: [[A:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 104, i32 104>, <2 x i32> <i32 10, i32 10>
537 ; CHECK-NEXT: ret <2 x i32> [[A]]
539 %A = select i1 %C, <2 x i32> <i32 1000, i32 1000>, <2 x i32> <i32 10, i32 10>
540 %V = and <2 x i32> %A, <i32 123, i32 123>
544 define <2 x i32> @test40vec2(i1 %C) {
545 ; CHECK-LABEL: @test40vec2(
546 ; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], <2 x i32> <i32 104, i32 324>, <2 x i32> <i32 10, i32 12>
547 ; CHECK-NEXT: ret <2 x i32> [[V]]
549 %A = select i1 %C, <2 x i32> <i32 1000, i32 2500>, <2 x i32> <i32 10, i32 30>
550 %V = and <2 x i32> %A, <i32 123, i32 333>
554 define i32 @test41(i1 %which) {
555 ; CHECK-LABEL: @test41(
557 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
559 ; CHECK-NEXT: br label [[FINAL]]
561 ; CHECK-NEXT: [[A:%.*]] = phi i32 [ 104, [[ENTRY:%.*]] ], [ 10, [[DELAY]] ]
562 ; CHECK-NEXT: ret i32 [[A]]
565 br i1 %which, label %final, label %delay
571 %A = phi i32 [ 1000, %entry ], [ 10, %delay ]
572 %value = and i32 %A, 123
576 define <2 x i32> @test41vec(i1 %which) {
577 ; CHECK-LABEL: @test41vec(
579 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
581 ; CHECK-NEXT: br label [[FINAL]]
583 ; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 104, i32 104>, [[ENTRY:%.*]] ], [ <i32 10, i32 10>, [[DELAY]] ]
584 ; CHECK-NEXT: ret <2 x i32> [[A]]
587 br i1 %which, label %final, label %delay
593 %A = phi <2 x i32> [ <i32 1000, i32 1000>, %entry ], [ <i32 10, i32 10>, %delay ]
594 %value = and <2 x i32> %A, <i32 123, i32 123>
598 define <2 x i32> @test41vec2(i1 %which) {
599 ; CHECK-LABEL: @test41vec2(
601 ; CHECK-NEXT: br i1 [[WHICH:%.*]], label [[FINAL:%.*]], label [[DELAY:%.*]]
603 ; CHECK-NEXT: br label [[FINAL]]
605 ; CHECK-NEXT: [[A:%.*]] = phi <2 x i32> [ <i32 104, i32 324>, [[ENTRY:%.*]] ], [ <i32 10, i32 12>, [[DELAY]] ]
606 ; CHECK-NEXT: ret <2 x i32> [[A]]
609 br i1 %which, label %final, label %delay
615 %A = phi <2 x i32> [ <i32 1000, i32 2500>, %entry ], [ <i32 10, i32 30>, %delay ]
616 %value = and <2 x i32> %A, <i32 123, i32 333>
620 define i32 @test42(i32 %a, i32 %c, i32 %d) {
621 ; CHECK-LABEL: @test42(
622 ; CHECK-NEXT: [[FORCE:%.*]] = mul i32 [[C:%.*]], [[D:%.*]]
623 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[FORCE]], [[A:%.*]]
624 ; CHECK-NEXT: ret i32 [[AND]]
626 %force = mul i32 %c, %d ; forces the complexity sorting
627 %or = or i32 %a, %force
628 %nota = xor i32 %a, -1
629 %xor = xor i32 %nota, %force
630 %and = and i32 %xor, %or
634 define i32 @test43(i32 %a, i32 %c, i32 %d) {
635 ; CHECK-LABEL: @test43(
636 ; CHECK-NEXT: [[FORCE:%.*]] = mul i32 [[C:%.*]], [[D:%.*]]
637 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[FORCE]], [[A:%.*]]
638 ; CHECK-NEXT: ret i32 [[AND]]
640 %force = mul i32 %c, %d ; forces the complexity sorting
641 %or = or i32 %a, %force
642 %nota = xor i32 %a, -1
643 %xor = xor i32 %nota, %force
644 %and = and i32 %or, %xor
648 ; (~y | x) & y -> x & y
649 define i32 @test44(i32 %x, i32 %y) nounwind {
650 ; CHECK-LABEL: @test44(
651 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
652 ; CHECK-NEXT: ret i32 [[A]]
660 ; (x | ~y) & y -> x & y
661 define i32 @test45(i32 %x, i32 %y) nounwind {
662 ; CHECK-LABEL: @test45(
663 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
664 ; CHECK-NEXT: ret i32 [[A]]
672 ; y & (~y | x) -> y | x
673 define i32 @test46(i32 %x, i32 %y) nounwind {
674 ; CHECK-LABEL: @test46(
675 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
676 ; CHECK-NEXT: ret i32 [[A]]
684 ; y & (x | ~y) -> y | x
685 define i32 @test47(i32 %x, i32 %y) nounwind {
686 ; CHECK-LABEL: @test47(
687 ; CHECK-NEXT: [[A:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
688 ; CHECK-NEXT: ret i32 [[A]]
696 ; In the next 4 tests, vary the types and predicates for extra coverage.
697 ; (X & (Y | ~X)) -> (X & Y), where 'not' is an inverted cmp
699 define i1 @and_orn_cmp_1(i32 %a, i32 %b, i32 %c) {
700 ; CHECK-LABEL: @and_orn_cmp_1(
701 ; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
702 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
703 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
704 ; CHECK-NEXT: ret i1 [[AND]]
706 %x = icmp sgt i32 %a, %b
707 %x_inv = icmp sle i32 %a, %b
708 %y = icmp ugt i32 %c, 42 ; thwart complexity-based ordering
709 %or = or i1 %y, %x_inv
710 %and = and i1 %x, %or
715 ; ((Y | ~X) & X) -> (X & Y), where 'not' is an inverted cmp
717 define <2 x i1> @and_orn_cmp_2(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
718 ; CHECK-LABEL: @and_orn_cmp_2(
719 ; CHECK-NEXT: [[X:%.*]] = icmp sge <2 x i32> [[A:%.*]], [[B:%.*]]
720 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt <2 x i32> [[C:%.*]], <i32 42, i32 47>
721 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i1> [[Y]], [[X]]
722 ; CHECK-NEXT: ret <2 x i1> [[AND]]
724 %x = icmp sge <2 x i32> %a, %b
725 %x_inv = icmp slt <2 x i32> %a, %b
726 %y = icmp ugt <2 x i32> %c, <i32 42, i32 47> ; thwart complexity-based ordering
727 %or = or <2 x i1> %y, %x_inv
728 %and = and <2 x i1> %or, %x
733 ; (X & (~X | Y)) -> (X & Y), where 'not' is an inverted cmp
735 define i1 @and_orn_cmp_3(i72 %a, i72 %b, i72 %c) {
736 ; CHECK-LABEL: @and_orn_cmp_3(
737 ; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
738 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
739 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
740 ; CHECK-NEXT: ret i1 [[AND]]
742 %x = icmp ugt i72 %a, %b
743 %x_inv = icmp ule i72 %a, %b
744 %y = icmp ugt i72 %c, 42 ; thwart complexity-based ordering
745 %or = or i1 %x_inv, %y
746 %and = and i1 %x, %or
751 ; ((~X | Y) & X) -> (X & Y), where 'not' is an inverted cmp
753 define <3 x i1> @or_andn_cmp_4(<3 x i32> %a, <3 x i32> %b, <3 x i32> %c) {
754 ; CHECK-LABEL: @or_andn_cmp_4(
755 ; CHECK-NEXT: [[X:%.*]] = icmp eq <3 x i32> [[A:%.*]], [[B:%.*]]
756 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt <3 x i32> [[C:%.*]], <i32 42, i32 43, i32 -1>
757 ; CHECK-NEXT: [[AND:%.*]] = and <3 x i1> [[Y]], [[X]]
758 ; CHECK-NEXT: ret <3 x i1> [[AND]]
760 %x = icmp eq <3 x i32> %a, %b
761 %x_inv = icmp ne <3 x i32> %a, %b
762 %y = icmp ugt <3 x i32> %c, <i32 42, i32 43, i32 -1> ; thwart complexity-based ordering
763 %or = or <3 x i1> %x_inv, %y
764 %and = and <3 x i1> %or, %x
768 ; In the next 4 tests, vary the types and predicates for extra coverage.
769 ; (~X & (Y | X)) -> (~X & Y), where 'not' is an inverted cmp
771 define i1 @andn_or_cmp_1(i37 %a, i37 %b, i37 %c) {
772 ; CHECK-LABEL: @andn_or_cmp_1(
773 ; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
774 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
775 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
776 ; CHECK-NEXT: ret i1 [[AND]]
778 %x = icmp sgt i37 %a, %b
779 %x_inv = icmp sle i37 %a, %b
780 %y = icmp ugt i37 %c, 42 ; thwart complexity-based ordering
782 %and = and i1 %x_inv, %or
787 ; ((Y | X) & ~X) -> (~X & Y), where 'not' is an inverted cmp
789 define i1 @andn_or_cmp_2(i16 %a, i16 %b, i16 %c) {
790 ; CHECK-LABEL: @andn_or_cmp_2(
791 ; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
792 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
793 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
794 ; CHECK-NEXT: ret i1 [[AND]]
796 %x = icmp sge i16 %a, %b
797 %x_inv = icmp slt i16 %a, %b
798 %y = icmp ugt i16 %c, 42 ; thwart complexity-based ordering
800 %and = and i1 %or, %x_inv
805 ; (~X & (X | Y)) -> (~X & Y), where 'not' is an inverted cmp
807 define <4 x i1> @andn_or_cmp_3(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
808 ; CHECK-LABEL: @andn_or_cmp_3(
809 ; CHECK-NEXT: [[X_INV:%.*]] = icmp ule <4 x i32> [[A:%.*]], [[B:%.*]]
810 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt <4 x i32> [[C:%.*]], <i32 42, i32 0, i32 1, i32 -1>
811 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i1> [[X_INV]], [[Y]]
812 ; CHECK-NEXT: ret <4 x i1> [[AND]]
814 %x = icmp ugt <4 x i32> %a, %b
815 %x_inv = icmp ule <4 x i32> %a, %b
816 %y = icmp ugt <4 x i32> %c, <i32 42, i32 0, i32 1, i32 -1> ; thwart complexity-based ordering
817 %or = or <4 x i1> %x, %y
818 %and = and <4 x i1> %x_inv, %or
823 ; ((X | Y) & ~X) -> (~X & Y), where 'not' is an inverted cmp
825 define i1 @andn_or_cmp_4(i32 %a, i32 %b, i32 %c) {
826 ; CHECK-LABEL: @andn_or_cmp_4(
827 ; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
828 ; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
829 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
830 ; CHECK-NEXT: ret i1 [[AND]]
832 %x = icmp eq i32 %a, %b
833 %x_inv = icmp ne i32 %a, %b
834 %y = icmp ugt i32 %c, 42 ; thwart complexity-based ordering
836 %and = and i1 %or, %x_inv