1 ; RUN: opt -loop-unswitch -verify-loop-info -verify-dom-info -disable-output < %s
2 ; RUN: opt -loop-unswitch -enable-mssa-loop-dependency=true -verify-memoryssa -verify-loop-info -verify-dom-info -disable-output < %s
4 ; Loop unswitch should be able to unswitch these loops and
5 ; preserve LCSSA and LoopSimplify forms.
7 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
8 target triple = "armv6-apple-darwin9"
10 @delim1 = external global i32 ; <i32*> [#uses=1]
11 @delim2 = external global i32 ; <i32*> [#uses=1]
13 define i32 @ineqn(i8* %s, i8* %p) nounwind readonly {
15 %0 = load i32, i32* @delim1, align 4 ; <i32> [#uses=1]
16 %1 = load i32, i32* @delim2, align 4 ; <i32> [#uses=1]
20 %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1]
21 br i1 %2, label %bb10, label %bb2
24 %3 = getelementptr inbounds i8, i8* %p_addr.0, i32 1 ; <i8*> [#uses=3]
25 switch i32 %ineq.0.ph, label %bb8.backedge [
30 bb8.backedge: ; preds = %bb6, %bb5, %bb2
34 %4 = icmp eq i32 %8, %0 ; <i1> [#uses=1]
35 br i1 %4, label %bb8.outer.loopexit, label %bb5
38 br i1 %6, label %bb6, label %bb8.backedge
40 bb6: ; preds = %bb5, %bb2
41 %5 = icmp eq i32 %8, %1 ; <i1> [#uses=1]
42 br i1 %5, label %bb7, label %bb8.backedge
45 %.lcssa1 = phi i8* [ %3, %bb6 ] ; <i8*> [#uses=1]
46 br label %bb8.outer.backedge
48 bb8.outer.backedge: ; preds = %bb8.outer.loopexit, %bb7
49 %.lcssa2 = phi i8* [ %.lcssa1, %bb7 ], [ %.lcssa, %bb8.outer.loopexit ] ; <i8*> [#uses=1]
50 %ineq.0.ph.be = phi i32 [ 0, %bb7 ], [ 1, %bb8.outer.loopexit ] ; <i32> [#uses=1]
53 bb8.outer.loopexit: ; preds = %bb3
54 %.lcssa = phi i8* [ %3, %bb3 ] ; <i8*> [#uses=1]
55 br label %bb8.outer.backedge
57 bb8.outer: ; preds = %bb8.outer.backedge, %entry
58 %ineq.0.ph = phi i32 [ 0, %entry ], [ %ineq.0.ph.be, %bb8.outer.backedge ] ; <i32> [#uses=3]
59 %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1]
60 %6 = icmp eq i32 %ineq.0.ph, 1 ; <i1> [#uses=1]
63 bb8: ; preds = %bb8.outer, %bb8.backedge
64 %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3]
65 %7 = load i8, i8* %p_addr.0, align 1 ; <i8> [#uses=2]
66 %8 = sext i8 %7 to i32 ; <i32> [#uses=2]
67 %9 = icmp eq i8 %7, 0 ; <i1> [#uses=1]
68 br i1 %9, label %bb10, label %bb
70 bb10: ; preds = %bb8, %bb
71 %.0 = phi i32 [ %ineq.0.ph, %bb ], [ 0, %bb8 ] ; <i32> [#uses=1]
75 ; This is a simplified form of ineqn from above. It triggers some
76 ; different cases in the loop-unswitch code.
78 define void @simplified_ineqn() nounwind readonly {
82 bb8.outer: ; preds = %bb6, %bb2, %entry
83 %x = phi i32 [ 0, %entry ], [ 0, %bb6 ], [ 1, %bb2 ] ; <i32> [#uses=1]
84 br i1 undef, label %return, label %bb2
87 switch i32 %x, label %bb6 [
88 i32 0, label %bb8.outer
92 br i1 undef, label %bb8.outer, label %bb2
94 return: ; preds = %bb8, %bb
98 ; This function requires special handling to preserve LCSSA form.
101 define void @pnp_check_irq() nounwind noredzone {
103 %conv56 = trunc i64 undef to i32 ; <i32> [#uses=1]
104 br label %while.cond.i
106 while.cond.i: ; preds = %while.cond.i.backedge, %entry
107 %call.i25 = call i8* @pci_get_device() nounwind noredzone ; <i8*> [#uses=2]
108 br i1 undef, label %if.then65, label %while.body.i
110 while.body.i: ; preds = %while.cond.i
111 br i1 undef, label %if.then31.i.i, label %while.cond.i.backedge
113 while.cond.i.backedge: ; preds = %if.then31.i.i, %while.body.i
114 br label %while.cond.i
116 if.then31.i.i: ; preds = %while.body.i
117 switch i32 %conv56, label %while.cond.i.backedge [
118 i32 14, label %if.then42.i.i
119 i32 15, label %if.then42.i.i
122 if.then42.i.i: ; preds = %if.then31.i.i, %if.then31.i.i
123 %call.i25.lcssa48 = phi i8* [ %call.i25, %if.then31.i.i ], [ %call.i25, %if.then31.i.i ] ; <i8*> [#uses=0]
126 if.then65: ; preds = %while.cond.i
130 declare i8* @pci_get_device() noredzone