| blob | 0441e8a93659790346f161973185793e3d446d53 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; REQUIRES: powerpc-registered-target
3 ; RUN: opt -mtriple=powerpc64le-unknown-unknown -O2 -S < %s | FileCheck %s
4 ; RUN: opt -mtriple=powerpc64le-unknown-unknown -passes='default<O2>' -S < %s \
5 ; RUN: | FileCheck %s --check-prefix=NPM
7 target datalayout = "e-m:e-i64:64-n32:64"
8 target triple = "powerpc64le-unknown-linux-gnu"
10 define dso_local i64 @func(i64 %blah, i64 %limit) #0 {
11 ; CHECK-LABEL: @func(
12 ; CHECK-NEXT: entry:
13 ; CHECK-NEXT: [[CMP4:%.*]] = icmp eq i64 [[LIMIT:%.*]], 0
14 ; CHECK-NEXT: br i1 [[CMP4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
15 ; CHECK: for.body.lr.ph:
16 ; CHECK-NEXT: [[CONV:%.*]] = and i64 [[BLAH:%.*]], 4294967295
17 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LIMIT]], -1
18 ; CHECK-NEXT: [[XTRAITER:%.*]] = and i64 [[LIMIT]], 7
19 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP0]], 7
20 ; CHECK-NEXT: br i1 [[TMP1]], label [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_BODY_LR_PH_NEW:%.*]]
21 ; CHECK: for.body.lr.ph.new:
22 ; CHECK-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[LIMIT]], [[XTRAITER]]
23 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
24 ; CHECK: for.cond.cleanup.loopexit.unr-lcssa:
25 ; CHECK-NEXT: [[ADD_LCSSA_PH:%.*]] = phi i64 [ undef, [[FOR_BODY_LR_PH]] ], [ [[ADD_7:%.*]], [[FOR_BODY]] ]
26 ; CHECK-NEXT: [[K_05_UNR:%.*]] = phi i64 [ 1, [[FOR_BODY_LR_PH]] ], [ [[AND:%.*]], [[FOR_BODY]] ]
27 ; CHECK-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
28 ; CHECK-NEXT: br i1 [[LCMP_MOD]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_EPIL:%.*]]
29 ; CHECK: for.body.epil:
30 ; CHECK-NEXT: [[G_06_EPIL:%.*]] = phi i64 [ [[ADD_EPIL:%.*]], [[FOR_BODY_EPIL]] ], [ [[ADD_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
31 ; CHECK-NEXT: [[K_05_EPIL:%.*]] = phi i64 [ [[AND_EPIL:%.*]], [[FOR_BODY_EPIL]] ], [ [[K_05_UNR]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
32 ; CHECK-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ [[EPIL_ITER_SUB:%.*]], [[FOR_BODY_EPIL]] ], [ [[XTRAITER]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
33 ; CHECK-NEXT: [[AND_EPIL]] = and i64 [[CONV]], [[K_05_EPIL]]
34 ; CHECK-NEXT: [[ADD_EPIL]] = add i64 [[AND_EPIL]], [[G_06_EPIL]]
35 ; CHECK-NEXT: [[EPIL_ITER_SUB]] = add i64 [[EPIL_ITER]], -1
36 ; CHECK-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp eq i64 [[EPIL_ITER_SUB]], 0
37 ; CHECK-NEXT: br i1 [[EPIL_ITER_CMP]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_EPIL]], !llvm.loop !0
38 ; CHECK: for.cond.cleanup:
39 ; CHECK-NEXT: [[G_0_LCSSA:%.*]] = phi i64 [ undef, [[ENTRY:%.*]] ], [ [[ADD_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ], [ [[ADD_EPIL]], [[FOR_BODY_EPIL]] ]
40 ; CHECK-NEXT: ret i64 [[G_0_LCSSA]]
41 ; CHECK: for.body:
42 ; CHECK-NEXT: [[G_06:%.*]] = phi i64 [ undef, [[FOR_BODY_LR_PH_NEW]] ], [ [[ADD_7]], [[FOR_BODY]] ]
43 ; CHECK-NEXT: [[K_05:%.*]] = phi i64 [ 1, [[FOR_BODY_LR_PH_NEW]] ], [ [[AND]], [[FOR_BODY]] ]
44 ; CHECK-NEXT: [[NITER:%.*]] = phi i64 [ [[UNROLL_ITER]], [[FOR_BODY_LR_PH_NEW]] ], [ [[NITER_NSUB_7:%.*]], [[FOR_BODY]] ]
45 ; CHECK-NEXT: [[AND]] = and i64 [[CONV]], [[K_05]]
46 ; CHECK-NEXT: [[ADD:%.*]] = add i64 [[AND]], [[G_06]]
47 ; CHECK-NEXT: [[ADD_1:%.*]] = add i64 [[AND]], [[ADD]]
48 ; CHECK-NEXT: [[ADD_2:%.*]] = add i64 [[AND]], [[ADD_1]]
49 ; CHECK-NEXT: [[ADD_3:%.*]] = add i64 [[AND]], [[ADD_2]]
50 ; CHECK-NEXT: [[ADD_4:%.*]] = add i64 [[AND]], [[ADD_3]]
51 ; CHECK-NEXT: [[ADD_5:%.*]] = add i64 [[AND]], [[ADD_4]]
52 ; CHECK-NEXT: [[ADD_6:%.*]] = add i64 [[AND]], [[ADD_5]]
53 ; CHECK-NEXT: [[ADD_7]] = add i64 [[AND]], [[ADD_6]]
54 ; CHECK-NEXT: [[NITER_NSUB_7]] = add i64 [[NITER]], -8
55 ; CHECK-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NSUB_7]], 0
56 ; CHECK-NEXT: br i1 [[NITER_NCMP_7]], label [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]], label [[FOR_BODY]]
57 ;
58 ; NPM-LABEL: @func(
59 ; NPM-NEXT: entry:
60 ; NPM-NEXT: [[CMP4:%.*]] = icmp eq i64 [[LIMIT:%.*]], 0
61 ; NPM-NEXT: br i1 [[CMP4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
62 ; NPM: for.body.lr.ph:
63 ; NPM-NEXT: [[CONV:%.*]] = and i64 [[BLAH:%.*]], 4294967295
64 ; NPM-NEXT: [[TMP0:%.*]] = add i64 [[LIMIT]], -1
65 ; NPM-NEXT: [[XTRAITER:%.*]] = and i64 [[LIMIT]], 7
66 ; NPM-NEXT: [[TMP1:%.*]] = icmp ult i64 [[TMP0]], 7
67 ; NPM-NEXT: br i1 [[TMP1]], label [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_BODY_LR_PH_NEW:%.*]]
68 ; NPM: for.body.lr.ph.new:
69 ; NPM-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[LIMIT]], [[XTRAITER]]
70 ; NPM-NEXT: [[AND_0:%.*]] = and i64 [[CONV]], 1
71 ; NPM-NEXT: br label [[FOR_BODY:%.*]]
72 ; NPM: for.cond.cleanup.loopexit.unr-lcssa:
73 ; NPM-NEXT: [[ADD_LCSSA_PH:%.*]] = phi i64 [ undef, [[FOR_BODY_LR_PH]] ], [ [[ADD_7:%.*]], [[FOR_BODY]] ]
74 ; NPM-NEXT: [[K_05_UNR:%.*]] = phi i64 [ 1, [[FOR_BODY_LR_PH]] ], [ [[AND_PHI:%.*]], [[FOR_BODY]] ]
75 ; NPM-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
76 ; NPM-NEXT: br i1 [[LCMP_MOD]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_EPIL:%.*]]
77 ; NPM: for.body.epil:
78 ; NPM-NEXT: [[G_06_EPIL:%.*]] = phi i64 [ [[ADD_EPIL:%.*]], [[FOR_BODY_EPIL]] ], [ [[ADD_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
79 ; NPM-NEXT: [[K_05_EPIL:%.*]] = phi i64 [ [[AND_EPIL:%.*]], [[FOR_BODY_EPIL]] ], [ [[K_05_UNR]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
80 ; NPM-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ [[EPIL_ITER_SUB:%.*]], [[FOR_BODY_EPIL]] ], [ [[XTRAITER]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ]
81 ; NPM-NEXT: [[AND_EPIL]] = and i64 [[CONV]], [[K_05_EPIL]]
82 ; NPM-NEXT: [[ADD_EPIL]] = add i64 [[AND_EPIL]], [[G_06_EPIL]]
83 ; NPM-NEXT: [[EPIL_ITER_SUB]] = add i64 [[EPIL_ITER]], -1
84 ; NPM-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp eq i64 [[EPIL_ITER_SUB]], 0
85 ; NPM-NEXT: br i1 [[EPIL_ITER_CMP]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_EPIL]], !llvm.loop !0
86 ; NPM: for.cond.cleanup:
87 ; NPM-NEXT: [[G_0_LCSSA:%.*]] = phi i64 [ undef, [[ENTRY:%.*]] ], [ [[ADD_LCSSA_PH]], [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]] ], [ [[ADD_EPIL]], [[FOR_BODY_EPIL]] ]
88 ; NPM-NEXT: ret i64 [[G_0_LCSSA]]
89 ; NPM: for.body:
90 ; NPM-NEXT: [[G_06:%.*]] = phi i64 [ undef, [[FOR_BODY_LR_PH_NEW]] ], [ [[ADD_7]], [[FOR_BODY_FOR_BODY_CRIT_EDGE:%.*]] ]
91 ; NPM-NEXT: [[AND_PHI]] = phi i64 [ [[AND_0]], [[FOR_BODY_LR_PH_NEW]] ], [ [[AND_1:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE]] ]
92 ; NPM-NEXT: [[NITER:%.*]] = phi i64 [ [[UNROLL_ITER]], [[FOR_BODY_LR_PH_NEW]] ], [ [[NITER_NSUB_7:%.*]], [[FOR_BODY_FOR_BODY_CRIT_EDGE]] ]
93 ; NPM-NEXT: [[ADD:%.*]] = add i64 [[AND_PHI]], [[G_06]]
94 ; NPM-NEXT: [[ADD_1:%.*]] = add i64 [[AND_PHI]], [[ADD]]
95 ; NPM-NEXT: [[ADD_2:%.*]] = add i64 [[AND_PHI]], [[ADD_1]]
96 ; NPM-NEXT: [[ADD_3:%.*]] = add i64 [[AND_PHI]], [[ADD_2]]
97 ; NPM-NEXT: [[ADD_4:%.*]] = add i64 [[AND_PHI]], [[ADD_3]]
98 ; NPM-NEXT: [[ADD_5:%.*]] = add i64 [[AND_PHI]], [[ADD_4]]
99 ; NPM-NEXT: [[ADD_6:%.*]] = add i64 [[AND_PHI]], [[ADD_5]]
100 ; NPM-NEXT: [[ADD_7]] = add i64 [[AND_PHI]], [[ADD_6]]
101 ; NPM-NEXT: [[NITER_NSUB_7]] = add i64 [[NITER]], -8
102 ; NPM-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NSUB_7]], 0
103 ; NPM-NEXT: br i1 [[NITER_NCMP_7]], label [[FOR_COND_CLEANUP_LOOPEXIT_UNR_LCSSA]], label [[FOR_BODY_FOR_BODY_CRIT_EDGE]]
104 ; NPM: for.body.for.body_crit_edge:
105 ; NPM-NEXT: [[AND_1]] = and i64 [[CONV]], [[AND_PHI]]
106 ; NPM-NEXT: br label [[FOR_BODY]]
107 ;
108 entry:
109 %blah.addr = alloca i64, align 8
110 %limit.addr = alloca i64, align 8
111 %k = alloca i32, align 4
112 %g = alloca i64, align 8
113 %i = alloca i64, align 8
114 store i64 %blah, i64* %blah.addr, align 8
115 store i64 %limit, i64* %limit.addr, align 8
116 store i32 1, i32* %k, align 4
117 store i64 0, i64* %i, align 8
118 br label %for.cond
120 for.cond: ; preds = %for.body, %entry
121 %0 = load i64, i64* %i, align 8
122 %1 = load i64, i64* %limit.addr, align 8
123 %cmp = icmp ult i64 %0, %1
124 br i1 %cmp, label %for.body, label %for.cond.cleanup
126 for.cond.cleanup: ; preds = %for.cond
127 %2 = load i64, i64* %g, align 8
128 ret i64 %2
130 for.body: ; preds = %for.cond
131 %3 = load i64, i64* %blah.addr, align 8
132 %4 = load i32, i32* %k, align 4
133 %conv = zext i32 %4 to i64
134 %and = and i64 %conv, %3
135 %conv1 = trunc i64 %and to i32
136 store i32 %conv1, i32* %k, align 4
137 %5 = load i32, i32* %k, align 4
138 %conv2 = zext i32 %5 to i64
139 %6 = load i64, i64* %g, align 8
140 %add = add i64 %6, %conv2
141 store i64 %add, i64* %g, align 8
142 %7 = load i64, i64* %i, align 8
143 %inc = add i64 %7, 1
144 store i64 %inc, i64* %i, align 8
145 br label %for.cond
146 }
148 ; Function Attrs: argmemonly nounwind
149 declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
151 ; Function Attrs: argmemonly nounwind
152 declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
154 attributes #0 = { "use-soft-float"="false" }
155 attributes #1 = { argmemonly nounwind }