1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -simplifycfg -switch-to-lookup -S | FileCheck %s
3 ; RUN: opt < %s -passes='simplify-cfg<switch-to-lookup>' -S | FileCheck %s
5 target datalayout = "e-n32"
7 define i32 @test1(i32 %a) {
9 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[A:%.*]], 97
10 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 2
11 ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP1]], 30
12 ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
13 ; CHECK-NEXT: switch i32 [[TMP4]], label [[DEF:%.*]] [
14 ; CHECK-NEXT: i32 0, label [[ONE:%.*]]
15 ; CHECK-NEXT: i32 1, label [[TWO:%.*]]
16 ; CHECK-NEXT: i32 2, label [[THREE:%.*]]
17 ; CHECK-NEXT: i32 3, label [[THREE]]
20 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
21 ; CHECK-NEXT: ret i32 [[MERGE]]
23 ; CHECK-NEXT: br label [[DEF]]
25 ; CHECK-NEXT: br label [[DEF]]
27 ; CHECK-NEXT: br label [[DEF]]
29 switch i32 %a, label %def [
47 ; Optimization shouldn't trigger; bitwidth > 64
48 define i128 @test2(i128 %a) {
49 ; CHECK-LABEL: @test2(
50 ; CHECK-NEXT: switch i128 [[A:%.*]], label [[DEF:%.*]] [
51 ; CHECK-NEXT: i128 97, label [[ONE:%.*]]
52 ; CHECK-NEXT: i128 101, label [[TWO:%.*]]
53 ; CHECK-NEXT: i128 105, label [[THREE:%.*]]
54 ; CHECK-NEXT: i128 109, label [[THREE]]
57 ; CHECK-NEXT: [[MERGE:%.*]] = phi i128 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
58 ; CHECK-NEXT: ret i128 [[MERGE]]
60 ; CHECK-NEXT: br label [[DEF]]
62 ; CHECK-NEXT: br label [[DEF]]
64 ; CHECK-NEXT: br label [[DEF]]
66 switch i128 %a, label %def [
69 i128 105, label %three
70 i128 109, label %three
84 ; Optimization shouldn't trigger; no holes present
85 define i32 @test3(i32 %a) {
86 ; CHECK-LABEL: @test3(
87 ; CHECK-NEXT: switch i32 [[A:%.*]], label [[DEF:%.*]] [
88 ; CHECK-NEXT: i32 97, label [[ONE:%.*]]
89 ; CHECK-NEXT: i32 98, label [[TWO:%.*]]
90 ; CHECK-NEXT: i32 99, label [[THREE:%.*]]
93 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
94 ; CHECK-NEXT: ret i32 [[MERGE]]
96 ; CHECK-NEXT: br label [[DEF]]
98 ; CHECK-NEXT: br label [[DEF]]
100 ; CHECK-NEXT: br label [[DEF]]
102 switch i32 %a, label %def [
119 ; Optimization shouldn't trigger; not an arithmetic progression
120 define i32 @test4(i32 %a) {
121 ; CHECK-LABEL: @test4(
122 ; CHECK-NEXT: switch i32 [[A:%.*]], label [[DEF:%.*]] [
123 ; CHECK-NEXT: i32 97, label [[ONE:%.*]]
124 ; CHECK-NEXT: i32 102, label [[TWO:%.*]]
125 ; CHECK-NEXT: i32 105, label [[THREE:%.*]]
126 ; CHECK-NEXT: i32 109, label [[THREE]]
129 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
130 ; CHECK-NEXT: ret i32 [[MERGE]]
132 ; CHECK-NEXT: br label [[DEF]]
134 ; CHECK-NEXT: br label [[DEF]]
136 ; CHECK-NEXT: br label [[DEF]]
138 switch i32 %a, label %def [
141 i32 105, label %three
142 i32 109, label %three
156 ; Optimization shouldn't trigger; not a power of two
157 define i32 @test5(i32 %a) {
158 ; CHECK-LABEL: @test5(
159 ; CHECK-NEXT: switch i32 [[A:%.*]], label [[DEF:%.*]] [
160 ; CHECK-NEXT: i32 97, label [[ONE:%.*]]
161 ; CHECK-NEXT: i32 102, label [[TWO:%.*]]
162 ; CHECK-NEXT: i32 107, label [[THREE:%.*]]
163 ; CHECK-NEXT: i32 112, label [[THREE]]
166 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
167 ; CHECK-NEXT: ret i32 [[MERGE]]
169 ; CHECK-NEXT: br label [[DEF]]
171 ; CHECK-NEXT: br label [[DEF]]
173 ; CHECK-NEXT: br label [[DEF]]
175 switch i32 %a, label %def [
178 i32 107, label %three
179 i32 112, label %three
193 define i32 @test6(i32 %a) optsize {
194 ; CHECK-LABEL: @test6(
195 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[A:%.*]], -109
196 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 2
197 ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP1]], 30
198 ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
199 ; CHECK-NEXT: switch i32 [[TMP4]], label [[DEF:%.*]] [
200 ; CHECK-NEXT: i32 3, label [[ONE:%.*]]
201 ; CHECK-NEXT: i32 2, label [[TWO:%.*]]
202 ; CHECK-NEXT: i32 1, label [[THREE:%.*]]
203 ; CHECK-NEXT: i32 0, label [[THREE]]
206 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
207 ; CHECK-NEXT: ret i32 [[MERGE]]
209 ; CHECK-NEXT: br label [[DEF]]
211 ; CHECK-NEXT: br label [[DEF]]
213 ; CHECK-NEXT: br label [[DEF]]
215 switch i32 %a, label %def [
218 i32 -105, label %three
219 i32 -109, label %three
233 define i8 @test7(i8 %a) optsize {
234 ; CHECK-LABEL: @test7(
235 ; CHECK-NEXT: [[TMP1:%.*]] = sub i8 [[A:%.*]], -36
236 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP1]], 2
237 ; CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP1]], 6
238 ; CHECK-NEXT: [[TMP4:%.*]] = or i8 [[TMP2]], [[TMP3]]
239 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i8 [[TMP4]], 4
240 ; CHECK-NEXT: br i1 [[TMP5]], label [[SWITCH_LOOKUP:%.*]], label [[DEF:%.*]]
241 ; CHECK: switch.lookup:
242 ; CHECK-NEXT: [[SWITCH_CAST:%.*]] = zext i8 [[TMP4]] to i32
243 ; CHECK-NEXT: [[SWITCH_SHIFTAMT:%.*]] = mul i32 [[SWITCH_CAST]], 8
244 ; CHECK-NEXT: [[SWITCH_DOWNSHIFT:%.*]] = lshr i32 -943228976, [[SWITCH_SHIFTAMT]]
245 ; CHECK-NEXT: [[SWITCH_MASKED:%.*]] = trunc i32 [[SWITCH_DOWNSHIFT]] to i8
246 ; CHECK-NEXT: ret i8 [[SWITCH_MASKED]]
248 ; CHECK-NEXT: ret i8 -93
250 switch i8 %a, label %def [
268 define i32 @test8(i32 %a) optsize {
269 ; CHECK-LABEL: @test8(
270 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[A:%.*]], 97
271 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 2
272 ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP1]], 30
273 ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
274 ; CHECK-NEXT: switch i32 [[TMP4]], label [[DEF:%.*]] [
275 ; CHECK-NEXT: i32 0, label [[ONE:%.*]]
276 ; CHECK-NEXT: i32 1, label [[TWO:%.*]]
277 ; CHECK-NEXT: i32 2, label [[THREE:%.*]]
278 ; CHECK-NEXT: i32 4, label [[THREE]]
281 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
282 ; CHECK-NEXT: ret i32 [[MERGE]]
284 ; CHECK-NEXT: br label [[DEF]]
286 ; CHECK-NEXT: br label [[DEF]]
288 ; CHECK-NEXT: br label [[DEF]]
290 switch i32 %a, label %def [
293 i32 105, label %three
294 i32 113, label %three
308 define i32 @test9(i32 %a) {
309 ; CHECK-LABEL: @test9(
310 ; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[A:%.*]], 6
311 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], 1
312 ; CHECK-NEXT: [[TMP3:%.*]] = shl i32 [[TMP1]], 31
313 ; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP2]], [[TMP3]]
314 ; CHECK-NEXT: switch i32 [[TMP4]], label [[DEF:%.*]] [
315 ; CHECK-NEXT: i32 6, label [[ONE:%.*]]
316 ; CHECK-NEXT: i32 7, label [[TWO:%.*]]
317 ; CHECK-NEXT: i32 0, label [[THREE:%.*]]
318 ; CHECK-NEXT: i32 2, label [[THREE]]
321 ; CHECK-NEXT: [[MERGE:%.*]] = phi i32 [ 8867, [[TMP0:%.*]] ], [ 11984, [[ONE]] ], [ 1143, [[TWO]] ], [ 99783, [[THREE]] ]
322 ; CHECK-NEXT: ret i32 [[MERGE]]
324 ; CHECK-NEXT: br label [[DEF]]
326 ; CHECK-NEXT: br label [[DEF]]
328 ; CHECK-NEXT: br label [[DEF]]
330 switch i32 %a, label %def [