[InstCombine] Signed saturation patterns
[llvm-complete.git] / test / tools / llvm-mca / X86 / Barcelona / int-to-fpu-forwarding-2.s
blobc5b1019a6ddbda2f5509d612202f0d5acbab5043
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=500 < %s | FileCheck %s
4 # LLVM-MCA-BEGIN
5 cvtsi2ss %ecx, %xmm0
6 # LLVM-MCA-END
8 # LLVM-MCA-BEGIN
9 cvtsi2sd %ecx, %xmm0
10 # LLVM-MCA-END
12 # LLVM-MCA-BEGIN
13 movd %ecx, %xmm0
14 # LLVM-MCA-END
16 # LLVM-MCA-BEGIN
17 movq %rcx, %xmm0
18 # LLVM-MCA-END
20 # CHECK: [0] Code Region
22 # CHECK: Iterations: 500
23 # CHECK-NEXT: Instructions: 500
24 # CHECK-NEXT: Total Cycles: 2503
25 # CHECK-NEXT: Total uOps: 1500
27 # CHECK: Dispatch Width: 4
28 # CHECK-NEXT: uOps Per Cycle: 0.60
29 # CHECK-NEXT: IPC: 0.20
30 # CHECK-NEXT: Block RThroughput: 2.0
32 # CHECK: Instruction Info:
33 # CHECK-NEXT: [1]: #uOps
34 # CHECK-NEXT: [2]: Latency
35 # CHECK-NEXT: [3]: RThroughput
36 # CHECK-NEXT: [4]: MayLoad
37 # CHECK-NEXT: [5]: MayStore
38 # CHECK-NEXT: [6]: HasSideEffects (U)
40 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
41 # CHECK-NEXT: 3 5 2.00 cvtsi2ss %ecx, %xmm0
43 # CHECK: Resources:
44 # CHECK-NEXT: [0] - SBDivider
45 # CHECK-NEXT: [1] - SBFPDivider
46 # CHECK-NEXT: [2] - SBPort0
47 # CHECK-NEXT: [3] - SBPort1
48 # CHECK-NEXT: [4] - SBPort4
49 # CHECK-NEXT: [5] - SBPort5
50 # CHECK-NEXT: [6.0] - SBPort23
51 # CHECK-NEXT: [6.1] - SBPort23
53 # CHECK: Resource pressure per iteration:
54 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
55 # CHECK-NEXT: - - - 1.00 - 2.00 - -
57 # CHECK: Resource pressure by instruction:
58 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
59 # CHECK-NEXT: - - - 1.00 - 2.00 - - cvtsi2ss %ecx, %xmm0
61 # CHECK: [1] Code Region
63 # CHECK: Iterations: 500
64 # CHECK-NEXT: Instructions: 500
65 # CHECK-NEXT: Total Cycles: 2003
66 # CHECK-NEXT: Total uOps: 1000
68 # CHECK: Dispatch Width: 4
69 # CHECK-NEXT: uOps Per Cycle: 0.50
70 # CHECK-NEXT: IPC: 0.25
71 # CHECK-NEXT: Block RThroughput: 1.0
73 # CHECK: Instruction Info:
74 # CHECK-NEXT: [1]: #uOps
75 # CHECK-NEXT: [2]: Latency
76 # CHECK-NEXT: [3]: RThroughput
77 # CHECK-NEXT: [4]: MayLoad
78 # CHECK-NEXT: [5]: MayStore
79 # CHECK-NEXT: [6]: HasSideEffects (U)
81 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
82 # CHECK-NEXT: 2 4 1.00 cvtsi2sd %ecx, %xmm0
84 # CHECK: Resources:
85 # CHECK-NEXT: [0] - SBDivider
86 # CHECK-NEXT: [1] - SBFPDivider
87 # CHECK-NEXT: [2] - SBPort0
88 # CHECK-NEXT: [3] - SBPort1
89 # CHECK-NEXT: [4] - SBPort4
90 # CHECK-NEXT: [5] - SBPort5
91 # CHECK-NEXT: [6.0] - SBPort23
92 # CHECK-NEXT: [6.1] - SBPort23
94 # CHECK: Resource pressure per iteration:
95 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
96 # CHECK-NEXT: - - - 1.00 - 1.00 - -
98 # CHECK: Resource pressure by instruction:
99 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
100 # CHECK-NEXT: - - - 1.00 - 1.00 - - cvtsi2sd %ecx, %xmm0
102 # CHECK: [2] Code Region
104 # CHECK: Iterations: 500
105 # CHECK-NEXT: Instructions: 500
106 # CHECK-NEXT: Total Cycles: 503
107 # CHECK-NEXT: Total uOps: 500
109 # CHECK: Dispatch Width: 4
110 # CHECK-NEXT: uOps Per Cycle: 0.99
111 # CHECK-NEXT: IPC: 0.99
112 # CHECK-NEXT: Block RThroughput: 1.0
114 # CHECK: Instruction Info:
115 # CHECK-NEXT: [1]: #uOps
116 # CHECK-NEXT: [2]: Latency
117 # CHECK-NEXT: [3]: RThroughput
118 # CHECK-NEXT: [4]: MayLoad
119 # CHECK-NEXT: [5]: MayStore
120 # CHECK-NEXT: [6]: HasSideEffects (U)
122 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
123 # CHECK-NEXT: 1 1 1.00 movd %ecx, %xmm0
125 # CHECK: Resources:
126 # CHECK-NEXT: [0] - SBDivider
127 # CHECK-NEXT: [1] - SBFPDivider
128 # CHECK-NEXT: [2] - SBPort0
129 # CHECK-NEXT: [3] - SBPort1
130 # CHECK-NEXT: [4] - SBPort4
131 # CHECK-NEXT: [5] - SBPort5
132 # CHECK-NEXT: [6.0] - SBPort23
133 # CHECK-NEXT: [6.1] - SBPort23
135 # CHECK: Resource pressure per iteration:
136 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
137 # CHECK-NEXT: - - - - - 1.00 - -
139 # CHECK: Resource pressure by instruction:
140 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
141 # CHECK-NEXT: - - - - - 1.00 - - movd %ecx, %xmm0
143 # CHECK: [3] Code Region
145 # CHECK: Iterations: 500
146 # CHECK-NEXT: Instructions: 500
147 # CHECK-NEXT: Total Cycles: 503
148 # CHECK-NEXT: Total uOps: 500
150 # CHECK: Dispatch Width: 4
151 # CHECK-NEXT: uOps Per Cycle: 0.99
152 # CHECK-NEXT: IPC: 0.99
153 # CHECK-NEXT: Block RThroughput: 1.0
155 # CHECK: Instruction Info:
156 # CHECK-NEXT: [1]: #uOps
157 # CHECK-NEXT: [2]: Latency
158 # CHECK-NEXT: [3]: RThroughput
159 # CHECK-NEXT: [4]: MayLoad
160 # CHECK-NEXT: [5]: MayStore
161 # CHECK-NEXT: [6]: HasSideEffects (U)
163 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
164 # CHECK-NEXT: 1 1 1.00 movq %rcx, %xmm0
166 # CHECK: Resources:
167 # CHECK-NEXT: [0] - SBDivider
168 # CHECK-NEXT: [1] - SBFPDivider
169 # CHECK-NEXT: [2] - SBPort0
170 # CHECK-NEXT: [3] - SBPort1
171 # CHECK-NEXT: [4] - SBPort4
172 # CHECK-NEXT: [5] - SBPort5
173 # CHECK-NEXT: [6.0] - SBPort23
174 # CHECK-NEXT: [6.1] - SBPort23
176 # CHECK: Resource pressure per iteration:
177 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
178 # CHECK-NEXT: - - - - - 1.00 - -
180 # CHECK: Resource pressure by instruction:
181 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
182 # CHECK-NEXT: - - - - - 1.00 - - movq %rcx, %xmm0