1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -instruction-tables < %s | FileCheck %s
8 # CHECK: Instruction Info:
9 # CHECK-NEXT: [1]: #uOps
10 # CHECK-NEXT: [2]: Latency
11 # CHECK-NEXT: [3]: RThroughput
12 # CHECK-NEXT: [4]: MayLoad
13 # CHECK-NEXT: [5]: MayStore
14 # CHECK-NEXT: [6]: HasSideEffects (U)
16 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
17 # CHECK-NEXT: 1 100 0.33 U rdrandw %ax
18 # CHECK-NEXT: 1 100 0.33 U rdrandl %eax
19 # CHECK-NEXT: 1 100 0.33 U rdrandq %rax
22 # CHECK-NEXT: [0] - SBDivider
23 # CHECK-NEXT: [1] - SBFPDivider
24 # CHECK-NEXT: [2] - SBPort0
25 # CHECK-NEXT: [3] - SBPort1
26 # CHECK-NEXT: [4] - SBPort4
27 # CHECK-NEXT: [5] - SBPort5
28 # CHECK-NEXT: [6.0] - SBPort23
29 # CHECK-NEXT: [6.1] - SBPort23
31 # CHECK: Resource pressure per iteration:
32 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
33 # CHECK-NEXT: - - 1.00 1.00 - 1.00 - -
35 # CHECK: Resource pressure by instruction:
36 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
37 # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandw %ax
38 # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandl %eax
39 # CHECK-NEXT: - - 0.33 0.33 - 0.33 - - rdrandq %rax