1 //===-- Target.cpp ----------------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 // The PowerPC ExegesisTarget.
8 //===----------------------------------------------------------------------===//
10 #include "../Latency.h"
12 #include "PPCRegisterInfo.h"
17 #include "PPCGenExegesis.inc"
20 class ExegesisPowerPCTarget
: public ExegesisTarget
{
22 ExegesisPowerPCTarget() : ExegesisTarget(PPCCpuPfmCounters
) {}
25 std::vector
<MCInst
> setRegTo(const MCSubtargetInfo
&STI
, unsigned Reg
,
26 const APInt
&Value
) const override
;
27 bool matchesArch(Triple::ArchType Arch
) const override
{
28 return Arch
== Triple::ppc64le
;
31 } // end anonymous namespace
33 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth
) {
34 switch (RegBitWidth
) {
40 llvm_unreachable("Invalid Value Width");
43 // Generates instruction to load an immediate value into a register.
44 static MCInst
loadImmediate(unsigned Reg
, unsigned RegBitWidth
,
46 if (Value
.getBitWidth() > RegBitWidth
)
47 llvm_unreachable("Value must fit in the Register");
48 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth
))
50 .addImm(Value
.getZExtValue());
53 std::vector
<MCInst
> ExegesisPowerPCTarget::setRegTo(const MCSubtargetInfo
&STI
,
55 const APInt
&Value
) const {
56 if (PPC::GPRCRegClass
.contains(Reg
))
57 return {loadImmediate(Reg
, 32, Value
)};
58 if (PPC::G8RCRegClass
.contains(Reg
))
59 return {loadImmediate(Reg
, 64, Value
)};
60 errs() << "setRegTo is not implemented, results will be unreliable\n";
64 static ExegesisTarget
*getTheExegesisPowerPCTarget() {
65 static ExegesisPowerPCTarget Target
;
69 void InitializePowerPCExegesisTarget() {
70 ExegesisTarget::registerTarget(getTheExegesisPowerPCTarget());
73 } // namespace exegesis