[yaml2obj/obj2yaml] - Add support for .stack_sizes sections.
[llvm-complete.git] / lib / Target / PowerPC / PPCAsmPrinter.cpp
blobc835df3cabc656244ee459ff7384c499bbbaad42
1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
11 // the output mechanism used by `llc'.
13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
16 //===----------------------------------------------------------------------===//
18 #include "MCTargetDesc/PPCInstPrinter.h"
19 #include "MCTargetDesc/PPCMCExpr.h"
20 #include "MCTargetDesc/PPCMCTargetDesc.h"
21 #include "MCTargetDesc/PPCPredicates.h"
22 #include "PPC.h"
23 #include "PPCInstrInfo.h"
24 #include "PPCMachineFunctionInfo.h"
25 #include "PPCSubtarget.h"
26 #include "PPCTargetMachine.h"
27 #include "PPCTargetStreamer.h"
28 #include "TargetInfo/PowerPCTargetInfo.h"
29 #include "llvm/ADT/MapVector.h"
30 #include "llvm/ADT/StringRef.h"
31 #include "llvm/ADT/Triple.h"
32 #include "llvm/ADT/Twine.h"
33 #include "llvm/BinaryFormat/ELF.h"
34 #include "llvm/BinaryFormat/MachO.h"
35 #include "llvm/CodeGen/AsmPrinter.h"
36 #include "llvm/CodeGen/MachineBasicBlock.h"
37 #include "llvm/CodeGen/MachineFunction.h"
38 #include "llvm/CodeGen/MachineInstr.h"
39 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
40 #include "llvm/CodeGen/MachineOperand.h"
41 #include "llvm/CodeGen/MachineRegisterInfo.h"
42 #include "llvm/CodeGen/StackMaps.h"
43 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
44 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/Module.h"
47 #include "llvm/MC/MCAsmInfo.h"
48 #include "llvm/MC/MCContext.h"
49 #include "llvm/MC/MCExpr.h"
50 #include "llvm/MC/MCInst.h"
51 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSectionMachO.h"
54 #include "llvm/MC/MCSectionXCOFF.h"
55 #include "llvm/MC/MCStreamer.h"
56 #include "llvm/MC/MCSymbol.h"
57 #include "llvm/MC/MCSymbolELF.h"
58 #include "llvm/MC/MCSymbolXCOFF.h"
59 #include "llvm/MC/SectionKind.h"
60 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/CodeGen.h"
62 #include "llvm/Support/Debug.h"
63 #include "llvm/Support/ErrorHandling.h"
64 #include "llvm/Support/TargetRegistry.h"
65 #include "llvm/Support/raw_ostream.h"
66 #include "llvm/Target/TargetMachine.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cstdint>
70 #include <memory>
71 #include <new>
73 using namespace llvm;
75 #define DEBUG_TYPE "asmprinter"
77 namespace {
79 class PPCAsmPrinter : public AsmPrinter {
80 protected:
81 MapVector<MCSymbol *, MCSymbol *> TOC;
82 const PPCSubtarget *Subtarget;
83 StackMaps SM;
85 public:
86 explicit PPCAsmPrinter(TargetMachine &TM,
87 std::unique_ptr<MCStreamer> Streamer)
88 : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
90 StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
92 MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
94 bool doInitialization(Module &M) override {
95 if (!TOC.empty())
96 TOC.clear();
97 return AsmPrinter::doInitialization(M);
100 void EmitInstruction(const MachineInstr *MI) override;
102 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
103 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
104 /// The \p MI would be INLINEASM ONLY.
105 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
107 void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
108 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
109 const char *ExtraCode, raw_ostream &O) override;
110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
111 const char *ExtraCode, raw_ostream &O) override;
113 void EmitEndOfAsmFile(Module &M) override;
115 void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
116 void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
117 void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
118 bool runOnMachineFunction(MachineFunction &MF) override {
119 Subtarget = &MF.getSubtarget<PPCSubtarget>();
120 bool Changed = AsmPrinter::runOnMachineFunction(MF);
121 emitXRayTable();
122 return Changed;
126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
127 class PPCLinuxAsmPrinter : public PPCAsmPrinter {
128 public:
129 explicit PPCLinuxAsmPrinter(TargetMachine &TM,
130 std::unique_ptr<MCStreamer> Streamer)
131 : PPCAsmPrinter(TM, std::move(Streamer)) {}
133 StringRef getPassName() const override {
134 return "Linux PPC Assembly Printer";
137 bool doFinalization(Module &M) override;
138 void EmitStartOfAsmFile(Module &M) override;
140 void EmitFunctionEntryLabel() override;
142 void EmitFunctionBodyStart() override;
143 void EmitFunctionBodyEnd() override;
144 void EmitInstruction(const MachineInstr *MI) override;
147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
148 /// OS X
149 class PPCDarwinAsmPrinter : public PPCAsmPrinter {
150 public:
151 explicit PPCDarwinAsmPrinter(TargetMachine &TM,
152 std::unique_ptr<MCStreamer> Streamer)
153 : PPCAsmPrinter(TM, std::move(Streamer)) {}
155 StringRef getPassName() const override {
156 return "Darwin PPC Assembly Printer";
159 bool doFinalization(Module &M) override;
160 void EmitStartOfAsmFile(Module &M) override;
163 class PPCAIXAsmPrinter : public PPCAsmPrinter {
164 public:
165 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
166 : PPCAsmPrinter(TM, std::move(Streamer)) {}
168 StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }
170 void EmitGlobalVariable(const GlobalVariable *GV) override;
173 } // end anonymous namespace
175 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
176 raw_ostream &O) {
177 // Computing the address of a global symbol, not calling it.
178 const GlobalValue *GV = MO.getGlobal();
179 MCSymbol *SymToPrint;
181 // External or weakly linked global variables need non-lazily-resolved stubs
182 if (Subtarget->hasLazyResolverStub(GV)) {
183 SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
184 MachineModuleInfoImpl::StubValueTy &StubSym =
185 MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(
186 SymToPrint);
187 if (!StubSym.getPointer())
188 StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
189 !GV->hasInternalLinkage());
190 } else {
191 SymToPrint = getSymbol(GV);
194 SymToPrint->print(O, MAI);
196 printOffset(MO.getOffset(), O);
199 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
200 raw_ostream &O) {
201 const DataLayout &DL = getDataLayout();
202 const MachineOperand &MO = MI->getOperand(OpNo);
204 switch (MO.getType()) {
205 case MachineOperand::MO_Register: {
206 // The MI is INLINEASM ONLY and UseVSXReg is always false.
207 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
209 // Linux assembler (Others?) does not take register mnemonics.
210 // FIXME - What about special registers used in mfspr/mtspr?
211 if (!Subtarget->isDarwin())
212 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
213 O << RegName;
214 return;
216 case MachineOperand::MO_Immediate:
217 O << MO.getImm();
218 return;
220 case MachineOperand::MO_MachineBasicBlock:
221 MO.getMBB()->getSymbol()->print(O, MAI);
222 return;
223 case MachineOperand::MO_ConstantPoolIndex:
224 O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
225 << MO.getIndex();
226 return;
227 case MachineOperand::MO_BlockAddress:
228 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
229 return;
230 case MachineOperand::MO_GlobalAddress: {
231 PrintSymbolOperand(MO, O);
232 return;
235 default:
236 O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
237 return;
241 /// PrintAsmOperand - Print out an operand for an inline asm expression.
243 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
244 const char *ExtraCode, raw_ostream &O) {
245 // Does this asm operand have a single letter operand modifier?
246 if (ExtraCode && ExtraCode[0]) {
247 if (ExtraCode[1] != 0) return true; // Unknown modifier.
249 switch (ExtraCode[0]) {
250 default:
251 // See if this is a generic print operand
252 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
253 case 'L': // Write second word of DImode reference.
254 // Verify that this operand has two consecutive registers.
255 if (!MI->getOperand(OpNo).isReg() ||
256 OpNo+1 == MI->getNumOperands() ||
257 !MI->getOperand(OpNo+1).isReg())
258 return true;
259 ++OpNo; // Return the high-part.
260 break;
261 case 'I':
262 // Write 'i' if an integer constant, otherwise nothing. Used to print
263 // addi vs add, etc.
264 if (MI->getOperand(OpNo).isImm())
265 O << "i";
266 return false;
267 case 'x':
268 if(!MI->getOperand(OpNo).isReg())
269 return true;
270 // This operand uses VSX numbering.
271 // If the operand is a VMX register, convert it to a VSX register.
272 Register Reg = MI->getOperand(OpNo).getReg();
273 if (PPCInstrInfo::isVRRegister(Reg))
274 Reg = PPC::VSX32 + (Reg - PPC::V0);
275 else if (PPCInstrInfo::isVFRegister(Reg))
276 Reg = PPC::VSX32 + (Reg - PPC::VF0);
277 const char *RegName;
278 RegName = PPCInstPrinter::getRegisterName(Reg);
279 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
280 O << RegName;
281 return false;
285 printOperand(MI, OpNo, O);
286 return false;
289 // At the moment, all inline asm memory operands are a single register.
290 // In any case, the output of this routine should always be just one
291 // assembler operand.
293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
294 const char *ExtraCode,
295 raw_ostream &O) {
296 if (ExtraCode && ExtraCode[0]) {
297 if (ExtraCode[1] != 0) return true; // Unknown modifier.
299 switch (ExtraCode[0]) {
300 default: return true; // Unknown modifier.
301 case 'y': // A memory reference for an X-form instruction
303 const char *RegName = "r0";
304 if (!Subtarget->isDarwin())
305 RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
306 O << RegName << ", ";
307 printOperand(MI, OpNo, O);
308 return false;
310 case 'U': // Print 'u' for update form.
311 case 'X': // Print 'x' for indexed form.
313 // FIXME: Currently for PowerPC memory operands are always loaded
314 // into a register, so we never get an update or indexed form.
315 // This is bad even for offset forms, since even if we know we
316 // have a value in -16(r1), we will generate a load into r<n>
317 // and then load from 0(r<n>). Until that issue is fixed,
318 // tolerate 'U' and 'X' but don't output anything.
319 assert(MI->getOperand(OpNo).isReg());
320 return false;
325 assert(MI->getOperand(OpNo).isReg());
326 O << "0(";
327 printOperand(MI, OpNo, O);
328 O << ")";
329 return false;
332 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
333 /// exists for it. If not, create one. Then return a symbol that references
334 /// the TOC entry.
335 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) {
336 MCSymbol *&TOCEntry = TOC[Sym];
337 if (!TOCEntry)
338 TOCEntry = createTempSymbol("C");
339 return TOCEntry;
342 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
343 emitStackMaps(SM);
346 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
347 unsigned NumNOPBytes = MI.getOperand(1).getImm();
349 SM.recordStackMap(MI);
350 assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
352 // Scan ahead to trim the shadow.
353 const MachineBasicBlock &MBB = *MI.getParent();
354 MachineBasicBlock::const_iterator MII(MI);
355 ++MII;
356 while (NumNOPBytes > 0) {
357 if (MII == MBB.end() || MII->isCall() ||
358 MII->getOpcode() == PPC::DBG_VALUE ||
359 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
360 MII->getOpcode() == TargetOpcode::STACKMAP)
361 break;
362 ++MII;
363 NumNOPBytes -= 4;
366 // Emit nops.
367 for (unsigned i = 0; i < NumNOPBytes; i += 4)
368 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
371 // Lower a patchpoint of the form:
372 // [<def>], <id>, <numBytes>, <target>, <numArgs>
373 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
374 SM.recordPatchPoint(MI);
375 PatchPointOpers Opers(&MI);
377 unsigned EncodedBytes = 0;
378 const MachineOperand &CalleeMO = Opers.getCallTarget();
380 if (CalleeMO.isImm()) {
381 int64_t CallTarget = CalleeMO.getImm();
382 if (CallTarget) {
383 assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
384 "High 16 bits of call target should be zero.");
385 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
386 EncodedBytes = 0;
387 // Materialize the jump address:
388 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
389 .addReg(ScratchReg)
390 .addImm((CallTarget >> 32) & 0xFFFF));
391 ++EncodedBytes;
392 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
393 .addReg(ScratchReg)
394 .addReg(ScratchReg)
395 .addImm(32).addImm(16));
396 ++EncodedBytes;
397 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
398 .addReg(ScratchReg)
399 .addReg(ScratchReg)
400 .addImm((CallTarget >> 16) & 0xFFFF));
401 ++EncodedBytes;
402 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
403 .addReg(ScratchReg)
404 .addReg(ScratchReg)
405 .addImm(CallTarget & 0xFFFF));
407 // Save the current TOC pointer before the remote call.
408 int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
409 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
410 .addReg(PPC::X2)
411 .addImm(TOCSaveOffset)
412 .addReg(PPC::X1));
413 ++EncodedBytes;
415 // If we're on ELFv1, then we need to load the actual function pointer
416 // from the function descriptor.
417 if (!Subtarget->isELFv2ABI()) {
418 // Load the new TOC pointer and the function address, but not r11
419 // (needing this is rare, and loading it here would prevent passing it
420 // via a 'nest' parameter.
421 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
422 .addReg(PPC::X2)
423 .addImm(8)
424 .addReg(ScratchReg));
425 ++EncodedBytes;
426 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
427 .addReg(ScratchReg)
428 .addImm(0)
429 .addReg(ScratchReg));
430 ++EncodedBytes;
433 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
434 .addReg(ScratchReg));
435 ++EncodedBytes;
436 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
437 ++EncodedBytes;
439 // Restore the TOC pointer after the call.
440 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
441 .addReg(PPC::X2)
442 .addImm(TOCSaveOffset)
443 .addReg(PPC::X1));
444 ++EncodedBytes;
446 } else if (CalleeMO.isGlobal()) {
447 const GlobalValue *GValue = CalleeMO.getGlobal();
448 MCSymbol *MOSymbol = getSymbol(GValue);
449 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
451 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
452 .addExpr(SymVar));
453 EncodedBytes += 2;
456 // Each instruction is 4 bytes.
457 EncodedBytes *= 4;
459 // Emit padding.
460 unsigned NumBytes = Opers.getNumPatchBytes();
461 assert(NumBytes >= EncodedBytes &&
462 "Patchpoint can't request size less than the length of a call.");
463 assert((NumBytes - EncodedBytes) % 4 == 0 &&
464 "Invalid number of NOP bytes requested!");
465 for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
466 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
469 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
470 /// call to __tls_get_addr to the current output stream.
471 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
472 MCSymbolRefExpr::VariantKind VK) {
473 StringRef Name = "__tls_get_addr";
474 MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name);
475 MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None;
476 const Module *M = MF->getFunction().getParent();
478 assert(MI->getOperand(0).isReg() &&
479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
481 "GETtls[ld]ADDR[32] must define GPR3");
482 assert(MI->getOperand(1).isReg() &&
483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
485 "GETtls[ld]ADDR[32] must read GPR3");
487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
488 isPositionIndependent())
489 Kind = MCSymbolRefExpr::VK_PLT;
490 const MCExpr *TlsRef =
491 MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
493 // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
494 if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&
495 M->getPICLevel() == PICLevel::BigPIC)
496 TlsRef = MCBinaryExpr::createAdd(
497 TlsRef, MCConstantExpr::create(32768, OutContext), OutContext);
498 const MachineOperand &MO = MI->getOperand(2);
499 const GlobalValue *GValue = MO.getGlobal();
500 MCSymbol *MOSymbol = getSymbol(GValue);
501 const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
502 EmitToStreamer(*OutStreamer,
503 MCInstBuilder(Subtarget->isPPC64() ?
504 PPC::BL8_NOP_TLS : PPC::BL_TLS)
505 .addExpr(TlsRef)
506 .addExpr(SymVar));
509 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
510 /// the current output stream.
512 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
513 MCInst TmpInst;
514 bool isDarwin = TM.getTargetTriple().isOSDarwin();
515 const Module *M = MF->getFunction().getParent();
516 PICLevel::Level PL = M->getPICLevel();
518 #ifndef NDEBUG
519 // Validate that SPE and FPU are mutually exclusive in codegen
520 if (!MI->isInlineAsm()) {
521 for (const MachineOperand &MO: MI->operands()) {
522 if (MO.isReg()) {
523 Register Reg = MO.getReg();
524 if (Subtarget->hasSPE()) {
525 if (PPC::F4RCRegClass.contains(Reg) ||
526 PPC::F8RCRegClass.contains(Reg) ||
527 PPC::QBRCRegClass.contains(Reg) ||
528 PPC::QFRCRegClass.contains(Reg) ||
529 PPC::QSRCRegClass.contains(Reg) ||
530 PPC::VFRCRegClass.contains(Reg) ||
531 PPC::VRRCRegClass.contains(Reg) ||
532 PPC::VSFRCRegClass.contains(Reg) ||
533 PPC::VSSRCRegClass.contains(Reg)
535 llvm_unreachable("SPE targets cannot have FPRegs!");
536 } else {
537 if (PPC::SPERCRegClass.contains(Reg))
538 llvm_unreachable("SPE register found in FPU-targeted code!");
543 #endif
544 // Lower multi-instruction pseudo operations.
545 switch (MI->getOpcode()) {
546 default: break;
547 case TargetOpcode::DBG_VALUE:
548 llvm_unreachable("Should be handled target independently");
549 case TargetOpcode::STACKMAP:
550 return LowerSTACKMAP(SM, *MI);
551 case TargetOpcode::PATCHPOINT:
552 return LowerPATCHPOINT(SM, *MI);
554 case PPC::MoveGOTtoLR: {
555 // Transform %lr = MoveGOTtoLR
556 // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
557 // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
558 // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
559 // blrl
560 // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
561 MCSymbol *GOTSymbol =
562 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
563 const MCExpr *OffsExpr =
564 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol,
565 MCSymbolRefExpr::VK_PPC_LOCAL,
566 OutContext),
567 MCConstantExpr::create(4, OutContext),
568 OutContext);
570 // Emit the 'bl'.
571 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
572 return;
574 case PPC::MovePCtoLR:
575 case PPC::MovePCtoLR8: {
576 // Transform %lr = MovePCtoLR
577 // Into this, where the label is the PIC base:
578 // bl L1$pb
579 // L1$pb:
580 MCSymbol *PICBase = MF->getPICBaseSymbol();
582 // Emit the 'bl'.
583 EmitToStreamer(*OutStreamer,
584 MCInstBuilder(PPC::BL)
585 // FIXME: We would like an efficient form for this, so we
586 // don't have to do a lot of extra uniquing.
587 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
589 // Emit the label.
590 OutStreamer->EmitLabel(PICBase);
591 return;
593 case PPC::UpdateGBR: {
594 // Transform %rd = UpdateGBR(%rt, %ri)
595 // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
596 // add %rd, %rt, %ri
597 // or into (if secure plt mode is on):
598 // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
599 // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
600 // Get the offset from the GOT Base Register to the GOT
601 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
602 if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
603 unsigned PICR = TmpInst.getOperand(0).getReg();
604 MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
605 M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
606 : ".LTOC");
607 const MCExpr *PB =
608 MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);
610 const MCExpr *DeltaExpr = MCBinaryExpr::createSub(
611 MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext);
613 const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext);
614 EmitToStreamer(
615 *OutStreamer,
616 MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi));
618 const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext);
619 EmitToStreamer(
620 *OutStreamer,
621 MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));
622 return;
623 } else {
624 MCSymbol *PICOffset =
625 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol();
626 TmpInst.setOpcode(PPC::LWZ);
627 const MCExpr *Exp =
628 MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
629 const MCExpr *PB =
630 MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
631 MCSymbolRefExpr::VK_None,
632 OutContext);
633 const MCOperand TR = TmpInst.getOperand(1);
634 const MCOperand PICR = TmpInst.getOperand(0);
636 // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
637 TmpInst.getOperand(1) =
638 MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext));
639 TmpInst.getOperand(0) = TR;
640 TmpInst.getOperand(2) = PICR;
641 EmitToStreamer(*OutStreamer, TmpInst);
643 TmpInst.setOpcode(PPC::ADD4);
644 TmpInst.getOperand(0) = PICR;
645 TmpInst.getOperand(1) = TR;
646 TmpInst.getOperand(2) = PICR;
647 EmitToStreamer(*OutStreamer, TmpInst);
648 return;
651 case PPC::LWZtoc: {
652 // Transform %r3 = LWZtoc @min1, %r2
653 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
655 // Change the opcode to LWZ, and the global address operand to be a
656 // reference to the GOT entry we will synthesize later.
657 TmpInst.setOpcode(PPC::LWZ);
658 const MachineOperand &MO = MI->getOperand(1);
660 // Map symbol -> label of TOC entry
661 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
662 MCSymbol *MOSymbol = nullptr;
663 if (MO.isGlobal())
664 MOSymbol = getSymbol(MO.getGlobal());
665 else if (MO.isCPI())
666 MOSymbol = GetCPISymbol(MO.getIndex());
667 else if (MO.isJTI())
668 MOSymbol = GetJTISymbol(MO.getIndex());
669 else if (MO.isBlockAddress())
670 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
672 if (PL == PICLevel::SmallPIC) {
673 const MCExpr *Exp =
674 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_GOT,
675 OutContext);
676 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
677 } else {
678 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
680 const MCExpr *Exp =
681 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None,
682 OutContext);
683 const MCExpr *PB =
684 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
685 OutContext);
686 Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
687 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
689 EmitToStreamer(*OutStreamer, TmpInst);
690 return;
692 case PPC::LDtocJTI:
693 case PPC::LDtocCPT:
694 case PPC::LDtocBA:
695 case PPC::LDtoc: {
696 // Transform %x3 = LDtoc @min1, %x2
697 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
699 // Change the opcode to LD, and the global address operand to be a
700 // reference to the TOC entry we will synthesize later.
701 TmpInst.setOpcode(PPC::LD);
702 const MachineOperand &MO = MI->getOperand(1);
704 // Map symbol -> label of TOC entry
705 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
706 MCSymbol *MOSymbol = nullptr;
707 if (MO.isGlobal())
708 MOSymbol = getSymbol(MO.getGlobal());
709 else if (MO.isCPI())
710 MOSymbol = GetCPISymbol(MO.getIndex());
711 else if (MO.isJTI())
712 MOSymbol = GetJTISymbol(MO.getIndex());
713 else if (MO.isBlockAddress())
714 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
716 MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
718 const MCExpr *Exp =
719 MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_PPC_TOC,
720 OutContext);
721 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
722 EmitToStreamer(*OutStreamer, TmpInst);
723 return;
726 case PPC::ADDIStocHA8: {
727 // Transform %xd = ADDIStocHA8 %x2, @sym
728 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
730 // Change the opcode to ADDIS8. If the global address is external, has
731 // common linkage, is a non-local function address, or is a jump table
732 // address, then generate a TOC entry and reference that. Otherwise
733 // reference the symbol directly.
734 TmpInst.setOpcode(PPC::ADDIS8);
735 const MachineOperand &MO = MI->getOperand(2);
736 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
737 MO.isBlockAddress()) &&
738 "Invalid operand for ADDIStocHA8!");
739 MCSymbol *MOSymbol = nullptr;
740 bool GlobalToc = false;
742 if (MO.isGlobal()) {
743 const GlobalValue *GV = MO.getGlobal();
744 MOSymbol = getSymbol(GV);
745 GlobalToc = Subtarget->isGVIndirectSymbol(GV);
746 } else if (MO.isCPI()) {
747 MOSymbol = GetCPISymbol(MO.getIndex());
748 } else if (MO.isJTI()) {
749 MOSymbol = GetJTISymbol(MO.getIndex());
750 } else if (MO.isBlockAddress()) {
751 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
754 if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
755 TM.getCodeModel() == CodeModel::Large)
756 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
758 const MCExpr *Exp =
759 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_HA,
760 OutContext);
762 if (!MO.isJTI() && MO.getOffset())
763 Exp = MCBinaryExpr::createAdd(Exp,
764 MCConstantExpr::create(MO.getOffset(),
765 OutContext),
766 OutContext);
768 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
769 EmitToStreamer(*OutStreamer, TmpInst);
770 return;
772 case PPC::LDtocL: {
773 // Transform %xd = LDtocL @sym, %xs
774 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
776 // Change the opcode to LD. If the global address is external, has
777 // common linkage, or is a jump table address, then reference the
778 // associated TOC entry. Otherwise reference the symbol directly.
779 TmpInst.setOpcode(PPC::LD);
780 const MachineOperand &MO = MI->getOperand(1);
781 assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
782 MO.isBlockAddress()) &&
783 "Invalid operand for LDtocL!");
784 MCSymbol *MOSymbol = nullptr;
786 if (MO.isJTI())
787 MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex()));
788 else if (MO.isBlockAddress()) {
789 MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
790 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
792 else if (MO.isCPI()) {
793 MOSymbol = GetCPISymbol(MO.getIndex());
794 if (TM.getCodeModel() == CodeModel::Large)
795 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
797 else if (MO.isGlobal()) {
798 const GlobalValue *GV = MO.getGlobal();
799 MOSymbol = getSymbol(GV);
800 LLVM_DEBUG(
801 assert((Subtarget->isGVIndirectSymbol(GV)) &&
802 "LDtocL used on symbol that could be accessed directly is "
803 "invalid. Must match ADDIStocHA8."));
804 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
807 const MCExpr *Exp =
808 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO,
809 OutContext);
810 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
811 EmitToStreamer(*OutStreamer, TmpInst);
812 return;
814 case PPC::ADDItocL: {
815 // Transform %xd = ADDItocL %xs, @sym
816 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
818 // Change the opcode to ADDI8. If the global address is external, then
819 // generate a TOC entry and reference that. Otherwise reference the
820 // symbol directly.
821 TmpInst.setOpcode(PPC::ADDI8);
822 const MachineOperand &MO = MI->getOperand(2);
823 assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL");
824 MCSymbol *MOSymbol = nullptr;
826 if (MO.isGlobal()) {
827 const GlobalValue *GV = MO.getGlobal();
828 LLVM_DEBUG(assert(!(Subtarget->isGVIndirectSymbol(GV)) &&
829 "Interposable definitions must use indirect access."));
830 MOSymbol = getSymbol(GV);
831 } else if (MO.isCPI()) {
832 MOSymbol = GetCPISymbol(MO.getIndex());
835 const MCExpr *Exp =
836 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_TOC_LO,
837 OutContext);
838 TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
839 EmitToStreamer(*OutStreamer, TmpInst);
840 return;
842 case PPC::ADDISgotTprelHA: {
843 // Transform: %xd = ADDISgotTprelHA %x2, @sym
844 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
845 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
846 const MachineOperand &MO = MI->getOperand(2);
847 const GlobalValue *GValue = MO.getGlobal();
848 MCSymbol *MOSymbol = getSymbol(GValue);
849 const MCExpr *SymGotTprel =
850 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA,
851 OutContext);
852 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
853 .addReg(MI->getOperand(0).getReg())
854 .addReg(MI->getOperand(1).getReg())
855 .addExpr(SymGotTprel));
856 return;
858 case PPC::LDgotTprelL:
859 case PPC::LDgotTprelL32: {
860 // Transform %xd = LDgotTprelL @sym, %xs
861 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
863 // Change the opcode to LD.
864 TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ);
865 const MachineOperand &MO = MI->getOperand(1);
866 const GlobalValue *GValue = MO.getGlobal();
867 MCSymbol *MOSymbol = getSymbol(GValue);
868 const MCExpr *Exp = MCSymbolRefExpr::create(
869 MOSymbol,
870 Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO
871 : MCSymbolRefExpr::VK_PPC_GOT_TPREL,
872 OutContext);
873 TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
874 EmitToStreamer(*OutStreamer, TmpInst);
875 return;
878 case PPC::PPC32PICGOT: {
879 MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
880 MCSymbol *GOTRef = OutContext.createTempSymbol();
881 MCSymbol *NextInstr = OutContext.createTempSymbol();
883 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
884 // FIXME: We would like an efficient form for this, so we don't have to do
885 // a lot of extra uniquing.
886 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
887 const MCExpr *OffsExpr =
888 MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
889 MCSymbolRefExpr::create(GOTRef, OutContext),
890 OutContext);
891 OutStreamer->EmitLabel(GOTRef);
892 OutStreamer->EmitValue(OffsExpr, 4);
893 OutStreamer->EmitLabel(NextInstr);
894 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
895 .addReg(MI->getOperand(0).getReg()));
896 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
897 .addReg(MI->getOperand(1).getReg())
898 .addImm(0)
899 .addReg(MI->getOperand(0).getReg()));
900 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
901 .addReg(MI->getOperand(0).getReg())
902 .addReg(MI->getOperand(1).getReg())
903 .addReg(MI->getOperand(0).getReg()));
904 return;
906 case PPC::PPC32GOT: {
907 MCSymbol *GOTSymbol =
908 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
909 const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
910 GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
911 const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
912 GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
913 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
914 .addReg(MI->getOperand(0).getReg())
915 .addExpr(SymGotTlsL));
916 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
917 .addReg(MI->getOperand(0).getReg())
918 .addReg(MI->getOperand(0).getReg())
919 .addExpr(SymGotTlsHA));
920 return;
922 case PPC::ADDIStlsgdHA: {
923 // Transform: %xd = ADDIStlsgdHA %x2, @sym
924 // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
925 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
926 const MachineOperand &MO = MI->getOperand(2);
927 const GlobalValue *GValue = MO.getGlobal();
928 MCSymbol *MOSymbol = getSymbol(GValue);
929 const MCExpr *SymGotTlsGD =
930 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA,
931 OutContext);
932 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
933 .addReg(MI->getOperand(0).getReg())
934 .addReg(MI->getOperand(1).getReg())
935 .addExpr(SymGotTlsGD));
936 return;
938 case PPC::ADDItlsgdL:
939 // Transform: %xd = ADDItlsgdL %xs, @sym
940 // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
941 case PPC::ADDItlsgdL32: {
942 // Transform: %rd = ADDItlsgdL32 %rs, @sym
943 // Into: %rd = ADDI %rs, sym@got@tlsgd
944 const MachineOperand &MO = MI->getOperand(2);
945 const GlobalValue *GValue = MO.getGlobal();
946 MCSymbol *MOSymbol = getSymbol(GValue);
947 const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
948 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
949 : MCSymbolRefExpr::VK_PPC_GOT_TLSGD,
950 OutContext);
951 EmitToStreamer(*OutStreamer,
952 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
953 .addReg(MI->getOperand(0).getReg())
954 .addReg(MI->getOperand(1).getReg())
955 .addExpr(SymGotTlsGD));
956 return;
958 case PPC::GETtlsADDR:
959 // Transform: %x3 = GETtlsADDR %x3, @sym
960 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
961 case PPC::GETtlsADDR32: {
962 // Transform: %r3 = GETtlsADDR32 %r3, @sym
963 // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
964 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
965 return;
967 case PPC::ADDIStlsldHA: {
968 // Transform: %xd = ADDIStlsldHA %x2, @sym
969 // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
970 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
971 const MachineOperand &MO = MI->getOperand(2);
972 const GlobalValue *GValue = MO.getGlobal();
973 MCSymbol *MOSymbol = getSymbol(GValue);
974 const MCExpr *SymGotTlsLD =
975 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA,
976 OutContext);
977 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
978 .addReg(MI->getOperand(0).getReg())
979 .addReg(MI->getOperand(1).getReg())
980 .addExpr(SymGotTlsLD));
981 return;
983 case PPC::ADDItlsldL:
984 // Transform: %xd = ADDItlsldL %xs, @sym
985 // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
986 case PPC::ADDItlsldL32: {
987 // Transform: %rd = ADDItlsldL32 %rs, @sym
988 // Into: %rd = ADDI %rs, sym@got@tlsld
989 const MachineOperand &MO = MI->getOperand(2);
990 const GlobalValue *GValue = MO.getGlobal();
991 MCSymbol *MOSymbol = getSymbol(GValue);
992 const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
993 MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
994 : MCSymbolRefExpr::VK_PPC_GOT_TLSLD,
995 OutContext);
996 EmitToStreamer(*OutStreamer,
997 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
998 .addReg(MI->getOperand(0).getReg())
999 .addReg(MI->getOperand(1).getReg())
1000 .addExpr(SymGotTlsLD));
1001 return;
1003 case PPC::GETtlsldADDR:
1004 // Transform: %x3 = GETtlsldADDR %x3, @sym
1005 // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
1006 case PPC::GETtlsldADDR32: {
1007 // Transform: %r3 = GETtlsldADDR32 %r3, @sym
1008 // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
1009 EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
1010 return;
1012 case PPC::ADDISdtprelHA:
1013 // Transform: %xd = ADDISdtprelHA %xs, @sym
1014 // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
1015 case PPC::ADDISdtprelHA32: {
1016 // Transform: %rd = ADDISdtprelHA32 %rs, @sym
1017 // Into: %rd = ADDIS %rs, sym@dtprel@ha
1018 const MachineOperand &MO = MI->getOperand(2);
1019 const GlobalValue *GValue = MO.getGlobal();
1020 MCSymbol *MOSymbol = getSymbol(GValue);
1021 const MCExpr *SymDtprel =
1022 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA,
1023 OutContext);
1024 EmitToStreamer(
1025 *OutStreamer,
1026 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS)
1027 .addReg(MI->getOperand(0).getReg())
1028 .addReg(MI->getOperand(1).getReg())
1029 .addExpr(SymDtprel));
1030 return;
1032 case PPC::ADDIdtprelL:
1033 // Transform: %xd = ADDIdtprelL %xs, @sym
1034 // Into: %xd = ADDI8 %xs, sym@dtprel@l
1035 case PPC::ADDIdtprelL32: {
1036 // Transform: %rd = ADDIdtprelL32 %rs, @sym
1037 // Into: %rd = ADDI %rs, sym@dtprel@l
1038 const MachineOperand &MO = MI->getOperand(2);
1039 const GlobalValue *GValue = MO.getGlobal();
1040 MCSymbol *MOSymbol = getSymbol(GValue);
1041 const MCExpr *SymDtprel =
1042 MCSymbolRefExpr::create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO,
1043 OutContext);
1044 EmitToStreamer(*OutStreamer,
1045 MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
1046 .addReg(MI->getOperand(0).getReg())
1047 .addReg(MI->getOperand(1).getReg())
1048 .addExpr(SymDtprel));
1049 return;
1051 case PPC::MFOCRF:
1052 case PPC::MFOCRF8:
1053 if (!Subtarget->hasMFOCRF()) {
1054 // Transform: %r3 = MFOCRF %cr7
1055 // Into: %r3 = MFCR ;; cr7
1056 unsigned NewOpcode =
1057 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1058 OutStreamer->AddComment(PPCInstPrinter::
1059 getRegisterName(MI->getOperand(1).getReg()));
1060 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1061 .addReg(MI->getOperand(0).getReg()));
1062 return;
1064 break;
1065 case PPC::MTOCRF:
1066 case PPC::MTOCRF8:
1067 if (!Subtarget->hasMFOCRF()) {
1068 // Transform: %cr7 = MTOCRF %r3
1069 // Into: MTCRF mask, %r3 ;; cr7
1070 unsigned NewOpcode =
1071 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1072 unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1073 ->getEncodingValue(MI->getOperand(0).getReg());
1074 OutStreamer->AddComment(PPCInstPrinter::
1075 getRegisterName(MI->getOperand(0).getReg()));
1076 EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1077 .addImm(Mask)
1078 .addReg(MI->getOperand(1).getReg()));
1079 return;
1081 break;
1082 case PPC::LD:
1083 case PPC::STD:
1084 case PPC::LWA_32:
1085 case PPC::LWA: {
1086 // Verify alignment is legal, so we don't create relocations
1087 // that can't be supported.
1088 // FIXME: This test is currently disabled for Darwin. The test
1089 // suite shows a handful of test cases that fail this check for
1090 // Darwin. Those need to be investigated before this sanity test
1091 // can be enabled for those subtargets.
1092 if (!Subtarget->isDarwin()) {
1093 unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1094 const MachineOperand &MO = MI->getOperand(OpNum);
1095 if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
1096 llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1098 // Now process the instruction normally.
1099 break;
1103 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
1104 EmitToStreamer(*OutStreamer, TmpInst);
1107 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) {
1108 if (!Subtarget->isPPC64())
1109 return PPCAsmPrinter::EmitInstruction(MI);
1111 switch (MI->getOpcode()) {
1112 default:
1113 return PPCAsmPrinter::EmitInstruction(MI);
1114 case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1115 // .begin:
1116 // b .end # lis 0, FuncId[16..32]
1117 // nop # li 0, FuncId[0..15]
1118 // std 0, -8(1)
1119 // mflr 0
1120 // bl __xray_FunctionEntry
1121 // mtlr 0
1122 // .end:
1124 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1125 // of instructions change.
1126 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1127 MCSymbol *EndOfSled = OutContext.createTempSymbol();
1128 OutStreamer->EmitLabel(BeginOfSled);
1129 EmitToStreamer(*OutStreamer,
1130 MCInstBuilder(PPC::B).addExpr(
1131 MCSymbolRefExpr::create(EndOfSled, OutContext)));
1132 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1133 EmitToStreamer(
1134 *OutStreamer,
1135 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1136 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1137 EmitToStreamer(*OutStreamer,
1138 MCInstBuilder(PPC::BL8_NOP)
1139 .addExpr(MCSymbolRefExpr::create(
1140 OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1141 OutContext)));
1142 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1143 OutStreamer->EmitLabel(EndOfSled);
1144 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
1145 break;
1147 case TargetOpcode::PATCHABLE_RET: {
1148 unsigned RetOpcode = MI->getOperand(0).getImm();
1149 MCInst RetInst;
1150 RetInst.setOpcode(RetOpcode);
1151 for (const auto &MO :
1152 make_range(std::next(MI->operands_begin()), MI->operands_end())) {
1153 MCOperand MCOp;
1154 if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false))
1155 RetInst.addOperand(MCOp);
1158 bool IsConditional;
1159 if (RetOpcode == PPC::BCCLR) {
1160 IsConditional = true;
1161 } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1162 RetOpcode == PPC::TCRETURNai8) {
1163 break;
1164 } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1165 IsConditional = false;
1166 } else {
1167 EmitToStreamer(*OutStreamer, RetInst);
1168 break;
1171 MCSymbol *FallthroughLabel;
1172 if (IsConditional) {
1173 // Before:
1174 // bgtlr cr0
1176 // After:
1177 // ble cr0, .end
1178 // .p2align 3
1179 // .begin:
1180 // blr # lis 0, FuncId[16..32]
1181 // nop # li 0, FuncId[0..15]
1182 // std 0, -8(1)
1183 // mflr 0
1184 // bl __xray_FunctionExit
1185 // mtlr 0
1186 // blr
1187 // .end:
1189 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1190 // of instructions change.
1191 FallthroughLabel = OutContext.createTempSymbol();
1192 EmitToStreamer(
1193 *OutStreamer,
1194 MCInstBuilder(PPC::BCC)
1195 .addImm(PPC::InvertPredicate(
1196 static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1197 .addReg(MI->getOperand(2).getReg())
1198 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1199 RetInst = MCInst();
1200 RetInst.setOpcode(PPC::BLR8);
1202 // .p2align 3
1203 // .begin:
1204 // b(lr)? # lis 0, FuncId[16..32]
1205 // nop # li 0, FuncId[0..15]
1206 // std 0, -8(1)
1207 // mflr 0
1208 // bl __xray_FunctionExit
1209 // mtlr 0
1210 // b(lr)?
1212 // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1213 // of instructions change.
1214 OutStreamer->EmitCodeAlignment(8);
1215 MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1216 OutStreamer->EmitLabel(BeginOfSled);
1217 EmitToStreamer(*OutStreamer, RetInst);
1218 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1219 EmitToStreamer(
1220 *OutStreamer,
1221 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1222 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1223 EmitToStreamer(*OutStreamer,
1224 MCInstBuilder(PPC::BL8_NOP)
1225 .addExpr(MCSymbolRefExpr::create(
1226 OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1227 OutContext)));
1228 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1229 EmitToStreamer(*OutStreamer, RetInst);
1230 if (IsConditional)
1231 OutStreamer->EmitLabel(FallthroughLabel);
1232 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
1233 break;
1235 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1236 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1237 case TargetOpcode::PATCHABLE_TAIL_CALL:
1238 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1239 // normal function exit from a tail exit.
1240 llvm_unreachable("Tail call is handled in the normal case. See comments "
1241 "around this assert.");
1245 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
1246 if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1247 PPCTargetStreamer *TS =
1248 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1250 if (TS)
1251 TS->emitAbiVersion(2);
1254 if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1255 !isPositionIndependent())
1256 return AsmPrinter::EmitStartOfAsmFile(M);
1258 if (M.getPICLevel() == PICLevel::SmallPIC)
1259 return AsmPrinter::EmitStartOfAsmFile(M);
1261 OutStreamer->SwitchSection(OutContext.getELFSection(
1262 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC));
1264 MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1265 MCSymbol *CurrentPos = OutContext.createTempSymbol();
1267 OutStreamer->EmitLabel(CurrentPos);
1269 // The GOT pointer points to the middle of the GOT, in order to reference the
1270 // entire 64kB range. 0x8000 is the midpoint.
1271 const MCExpr *tocExpr =
1272 MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1273 MCConstantExpr::create(0x8000, OutContext),
1274 OutContext);
1276 OutStreamer->EmitAssignment(TOCSym, tocExpr);
1278 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1281 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
1282 // linux/ppc32 - Normal entry label.
1283 if (!Subtarget->isPPC64() &&
1284 (!isPositionIndependent() ||
1285 MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1286 return AsmPrinter::EmitFunctionEntryLabel();
1288 if (!Subtarget->isPPC64()) {
1289 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1290 if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1291 MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
1292 MCSymbol *PICBase = MF->getPICBaseSymbol();
1293 OutStreamer->EmitLabel(RelocSymbol);
1295 const MCExpr *OffsExpr =
1296 MCBinaryExpr::createSub(
1297 MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1298 OutContext),
1299 MCSymbolRefExpr::create(PICBase, OutContext),
1300 OutContext);
1301 OutStreamer->EmitValue(OffsExpr, 4);
1302 OutStreamer->EmitLabel(CurrentFnSym);
1303 return;
1304 } else
1305 return AsmPrinter::EmitFunctionEntryLabel();
1308 // ELFv2 ABI - Normal entry label.
1309 if (Subtarget->isELFv2ABI()) {
1310 // In the Large code model, we allow arbitrary displacements between
1311 // the text section and its associated TOC section. We place the
1312 // full 8-byte offset to the TOC in memory immediately preceding
1313 // the function global entry point.
1314 if (TM.getCodeModel() == CodeModel::Large
1315 && !MF->getRegInfo().use_empty(PPC::X2)) {
1316 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1318 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1319 MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol();
1320 const MCExpr *TOCDeltaExpr =
1321 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1322 MCSymbolRefExpr::create(GlobalEPSymbol,
1323 OutContext),
1324 OutContext);
1326 OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol());
1327 OutStreamer->EmitValue(TOCDeltaExpr, 8);
1329 return AsmPrinter::EmitFunctionEntryLabel();
1332 // Emit an official procedure descriptor.
1333 MCSectionSubPair Current = OutStreamer->getCurrentSection();
1334 MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1335 ".opd", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1336 OutStreamer->SwitchSection(Section);
1337 OutStreamer->EmitLabel(CurrentFnSym);
1338 OutStreamer->EmitValueToAlignment(8);
1339 MCSymbol *Symbol1 = CurrentFnSymForSize;
1340 // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1341 // entry point.
1342 OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1343 8 /*size*/);
1344 MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1345 // Generates a R_PPC64_TOC relocation for TOC base insertion.
1346 OutStreamer->EmitValue(
1347 MCSymbolRefExpr::create(Symbol2, MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext),
1348 8/*size*/);
1349 // Emit a null environment pointer.
1350 OutStreamer->EmitIntValue(0, 8 /* size */);
1351 OutStreamer->SwitchSection(Current.first, Current.second);
1354 bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
1355 const DataLayout &DL = getDataLayout();
1357 bool isPPC64 = DL.getPointerSizeInBits() == 64;
1359 PPCTargetStreamer &TS =
1360 static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
1362 if (!TOC.empty()) {
1363 MCSectionELF *Section;
1365 if (isPPC64)
1366 Section = OutStreamer->getContext().getELFSection(
1367 ".toc", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1368 else
1369 Section = OutStreamer->getContext().getELFSection(
1370 ".got2", ELF::SHT_PROGBITS, ELF::SHF_WRITE | ELF::SHF_ALLOC);
1371 OutStreamer->SwitchSection(Section);
1373 for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
1374 E = TOC.end(); I != E; ++I) {
1375 OutStreamer->EmitLabel(I->second);
1376 MCSymbol *S = I->first;
1377 if (isPPC64) {
1378 TS.emitTCEntry(*S);
1379 } else {
1380 OutStreamer->EmitValueToAlignment(4);
1381 OutStreamer->EmitSymbolValue(S, 4);
1386 return AsmPrinter::doFinalization(M);
1389 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1390 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
1391 // In the ELFv2 ABI, in functions that use the TOC register, we need to
1392 // provide two entry points. The ABI guarantees that when calling the
1393 // local entry point, r2 is set up by the caller to contain the TOC base
1394 // for this function, and when calling the global entry point, r12 is set
1395 // up by the caller to hold the address of the global entry point. We
1396 // thus emit a prefix sequence along the following lines:
1398 // func:
1399 // .Lfunc_gepNN:
1400 // # global entry point
1401 // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1402 // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1403 // .Lfunc_lepNN:
1404 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1405 // # local entry point, followed by function body
1407 // For the Large code model, we create
1409 // .Lfunc_tocNN:
1410 // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1411 // func:
1412 // .Lfunc_gepNN:
1413 // # global entry point
1414 // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1415 // add r2,r2,r12
1416 // .Lfunc_lepNN:
1417 // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1418 // # local entry point, followed by function body
1420 // This ensures we have r2 set up correctly while executing the function
1421 // body, no matter which entry point is called.
1422 if (Subtarget->isELFv2ABI()
1423 // Only do all that if the function uses r2 in the first place.
1424 && !MF->getRegInfo().use_empty(PPC::X2)) {
1425 // Note: The logic here must be synchronized with the code in the
1426 // branch-selection pass which sets the offset of the first block in the
1427 // function. This matters because it affects the alignment.
1428 const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1430 MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol();
1431 OutStreamer->EmitLabel(GlobalEntryLabel);
1432 const MCSymbolRefExpr *GlobalEntryLabelExp =
1433 MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1435 if (TM.getCodeModel() != CodeModel::Large) {
1436 MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1437 const MCExpr *TOCDeltaExpr =
1438 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1439 GlobalEntryLabelExp, OutContext);
1441 const MCExpr *TOCDeltaHi =
1442 PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext);
1443 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1444 .addReg(PPC::X2)
1445 .addReg(PPC::X12)
1446 .addExpr(TOCDeltaHi));
1448 const MCExpr *TOCDeltaLo =
1449 PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext);
1450 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1451 .addReg(PPC::X2)
1452 .addReg(PPC::X2)
1453 .addExpr(TOCDeltaLo));
1454 } else {
1455 MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol();
1456 const MCExpr *TOCOffsetDeltaExpr =
1457 MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1458 GlobalEntryLabelExp, OutContext);
1460 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1461 .addReg(PPC::X2)
1462 .addExpr(TOCOffsetDeltaExpr)
1463 .addReg(PPC::X12));
1464 EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1465 .addReg(PPC::X2)
1466 .addReg(PPC::X2)
1467 .addReg(PPC::X12));
1470 MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol();
1471 OutStreamer->EmitLabel(LocalEntryLabel);
1472 const MCSymbolRefExpr *LocalEntryLabelExp =
1473 MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1474 const MCExpr *LocalOffsetExp =
1475 MCBinaryExpr::createSub(LocalEntryLabelExp,
1476 GlobalEntryLabelExp, OutContext);
1478 PPCTargetStreamer *TS =
1479 static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1481 if (TS)
1482 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1486 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1487 /// directive.
1489 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
1490 // Only the 64-bit target requires a traceback table. For now,
1491 // we only emit the word of zeroes that GDB requires to find
1492 // the end of the function, and zeroes for the eight-byte
1493 // mandatory fields.
1494 // FIXME: We should fill in the eight-byte mandatory fields as described in
1495 // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1496 // currently make use of these fields).
1497 if (Subtarget->isPPC64()) {
1498 OutStreamer->EmitIntValue(0, 4/*size*/);
1499 OutStreamer->EmitIntValue(0, 8/*size*/);
1503 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
1504 static const char *const CPUDirectives[] = {
1506 "ppc",
1507 "ppc440",
1508 "ppc601",
1509 "ppc602",
1510 "ppc603",
1511 "ppc7400",
1512 "ppc750",
1513 "ppc970",
1514 "ppcA2",
1515 "ppce500",
1516 "ppce500mc",
1517 "ppce5500",
1518 "power3",
1519 "power4",
1520 "power5",
1521 "power5x",
1522 "power6",
1523 "power6x",
1524 "power7",
1525 // FIXME: why is power8 missing here?
1526 "ppc64",
1527 "ppc64le",
1528 "power9"
1531 // Get the numerically largest directive.
1532 // FIXME: How should we merge darwin directives?
1533 unsigned Directive = PPC::DIR_NONE;
1534 for (const Function &F : M) {
1535 const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F);
1536 unsigned FDir = STI.getDarwinDirective();
1537 Directive = Directive > FDir ? FDir : STI.getDarwinDirective();
1538 if (STI.hasMFOCRF() && Directive < PPC::DIR_970)
1539 Directive = PPC::DIR_970;
1540 if (STI.hasAltivec() && Directive < PPC::DIR_7400)
1541 Directive = PPC::DIR_7400;
1542 if (STI.isPPC64() && Directive < PPC::DIR_64)
1543 Directive = PPC::DIR_64;
1546 assert(Directive <= PPC::DIR_64 && "Directive out of range.");
1548 assert(Directive < array_lengthof(CPUDirectives) &&
1549 "CPUDirectives[] might not be up-to-date!");
1550 PPCTargetStreamer &TStreamer =
1551 *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1552 TStreamer.emitMachine(CPUDirectives[Directive]);
1554 // Prime text sections so they are adjacent. This reduces the likelihood a
1555 // large data or debug section causes a branch to exceed 16M limit.
1556 const TargetLoweringObjectFileMachO &TLOFMacho =
1557 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1558 OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
1559 if (TM.getRelocationModel() == Reloc::PIC_) {
1560 OutStreamer->SwitchSection(
1561 OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
1562 MachO::S_SYMBOL_STUBS |
1563 MachO::S_ATTR_PURE_INSTRUCTIONS,
1564 32, SectionKind::getText()));
1565 } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
1566 OutStreamer->SwitchSection(
1567 OutContext.getMachOSection("__TEXT","__symbol_stub1",
1568 MachO::S_SYMBOL_STUBS |
1569 MachO::S_ATTR_PURE_INSTRUCTIONS,
1570 16, SectionKind::getText()));
1572 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1575 bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
1576 bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
1578 // Darwin/PPC always uses mach-o.
1579 const TargetLoweringObjectFileMachO &TLOFMacho =
1580 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1581 if (MMI) {
1582 MachineModuleInfoMachO &MMIMacho =
1583 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1585 if (MAI->doesSupportExceptionHandling()) {
1586 // Add the (possibly multiple) personalities to the set of global values.
1587 // Only referenced functions get into the Personalities list.
1588 for (const Function *Personality : MMI->getPersonalities()) {
1589 if (Personality) {
1590 MCSymbol *NLPSym =
1591 getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr");
1592 MachineModuleInfoImpl::StubValueTy &StubSym =
1593 MMIMacho.getGVStubEntry(NLPSym);
1594 StubSym =
1595 MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true);
1600 // Output stubs for dynamically-linked functions.
1601 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
1603 // Output macho stubs for external and common global variables.
1604 if (!Stubs.empty()) {
1605 // Switch with ".non_lazy_symbol_pointer" directive.
1606 OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1607 EmitAlignment(isPPC64 ? llvm::Align(8) : llvm::Align(4));
1609 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1610 // L_foo$stub:
1611 OutStreamer->EmitLabel(Stubs[i].first);
1612 // .indirect_symbol _foo
1613 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1614 OutStreamer->EmitSymbolAttribute(MCSym.getPointer(),
1615 MCSA_IndirectSymbol);
1617 if (MCSym.getInt())
1618 // External to current translation unit.
1619 OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/);
1620 else
1621 // Internal to current translation unit.
1623 // When we place the LSDA into the TEXT section, the type info
1624 // pointers
1625 // need to be indirect and pc-rel. We accomplish this by using NLPs.
1626 // However, sometimes the types are local to the file. So we need to
1627 // fill in the value for the NLP in those cases.
1628 OutStreamer->EmitValue(
1629 MCSymbolRefExpr::create(MCSym.getPointer(), OutContext),
1630 isPPC64 ? 8 : 4 /*size*/);
1633 Stubs.clear();
1634 OutStreamer->AddBlankLine();
1638 // Funny Darwin hack: This flag tells the linker that no global symbols
1639 // contain code that falls through to other global symbols (e.g. the obvious
1640 // implementation of multiple entry points). If this doesn't occur, the
1641 // linker can safely perform dead code stripping. Since LLVM never generates
1642 // code that does this, it is always safe to set.
1643 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1645 return AsmPrinter::doFinalization(M);
1648 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
1649 // Early error checking limiting what is supported.
1650 if (GV->isThreadLocal())
1651 report_fatal_error("Thread local not yet supported on AIX.");
1653 if (GV->hasSection())
1654 report_fatal_error("Custom section for Data not yet supported.");
1656 if (GV->hasComdat())
1657 report_fatal_error("COMDAT not yet supported by AIX.");
1659 SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM);
1660 if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData())
1661 report_fatal_error("Encountered a global variable kind that is "
1662 "not supported yet.");
1664 // Create the containing csect and switch to it.
1665 MCSectionXCOFF *CSect = cast<MCSectionXCOFF>(
1666 getObjFileLowering().SectionForGlobal(GV, GVKind, TM));
1667 OutStreamer->SwitchSection(CSect);
1669 // Create the symbol, set its storage class, and emit it.
1670 MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV));
1671 GVSym->setStorageClass(
1672 TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV));
1673 GVSym->setContainingCsect(CSect);
1675 const DataLayout &DL = GV->getParent()->getDataLayout();
1677 // Handle common symbols.
1678 if (GVKind.isCommon() || GVKind.isBSSLocal()) {
1679 unsigned Align =
1680 GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV);
1681 uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType());
1683 if (GVKind.isBSSLocal())
1684 OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align);
1685 else
1686 OutStreamer->EmitCommonSymbol(GVSym, Size, Align);
1687 return;
1690 MCSymbol *EmittedInitSym = GVSym;
1691 EmitLinkage(GV, EmittedInitSym);
1692 EmitAlignment(getGVAlignment(GV, DL), GV);
1693 OutStreamer->EmitLabel(EmittedInitSym);
1694 EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
1697 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
1698 /// for a MachineFunction to the given output stream, in a format that the
1699 /// Darwin assembler can deal with.
1701 static AsmPrinter *
1702 createPPCAsmPrinterPass(TargetMachine &tm,
1703 std::unique_ptr<MCStreamer> &&Streamer) {
1704 if (tm.getTargetTriple().isMacOSX())
1705 return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
1706 if (tm.getTargetTriple().isOSAIX())
1707 return new PPCAIXAsmPrinter(tm, std::move(Streamer));
1709 return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
1712 // Force static initialization.
1713 extern "C" void LLVMInitializePowerPCAsmPrinter() {
1714 TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
1715 createPPCAsmPrinterPass);
1716 TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
1717 createPPCAsmPrinterPass);
1718 TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
1719 createPPCAsmPrinterPass);