utils/TableGen/CodeEmitterGen.cpp

   1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // CodeEmitterGen uses the descriptions of instructions and their fields to
  10 // construct an automated code emitter: a function that, given a MachineInstr,
  11 // returns the (currently, 32-bit unsigned) value of the instruction.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #include "CodeGenInstruction.h"
  16 #include "CodeGenTarget.h"
  17 #include "SubtargetFeatureInfo.h"
  18 #include "Types.h"
  19 #include "llvm/ADT/APInt.h"
  20 #include "llvm/ADT/ArrayRef.h"
  21 #include "llvm/ADT/StringExtras.h"
  22 #include "llvm/Support/Casting.h"
  23 #include "llvm/Support/raw_ostream.h"
  24 #include "llvm/TableGen/Record.h"
  25 #include "llvm/TableGen/TableGenBackend.h"
  26 #include <cassert>
  27 #include <cstdint>
  28 #include <map>
  29 #include <set>
  30 #include <string>
  31 #include <utility>
  32 #include <vector>
  33
  34 using namespace llvm;
  35
  36 namespace {
  37
  38 class CodeEmitterGen {
  39   RecordKeeper &Records;
  40
  41 public:
  42   CodeEmitterGen(RecordKeeper &R) : Records(R) {}
  43
  44   void run(raw_ostream &o);
  45
  46 private:
  47   int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
  48   std::string getInstructionCase(Record *R, CodeGenTarget &Target);
  49   std::string getInstructionCaseForEncoding(Record *R, Record *EncodingDef,
  50                                             CodeGenTarget &Target);
  51   void AddCodeToMergeInOperand(Record *R, BitsInit *BI,
  52                                const std::string &VarName,
  53                                unsigned &NumberedOp,
  54                                std::set<unsigned> &NamedOpIndices,
  55                                std::string &Case, CodeGenTarget &Target);
  56
  57   void emitInstructionBaseValues(
  58       raw_ostream &o, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
  59       CodeGenTarget &Target, int HwMode = -1);
  60   unsigned BitWidth;
  61   bool UseAPInt;
  62 };
  63
  64 // If the VarBitInit at position 'bit' matches the specified variable then
  65 // return the variable bit position.  Otherwise return -1.
  66 int CodeEmitterGen::getVariableBit(const std::string &VarName,
  67                                    BitsInit *BI, int bit) {
  68   if (VarBitInit *VBI = dyn_cast<VarBitInit>(BI->getBit(bit))) {
  69     if (VarInit *VI = dyn_cast<VarInit>(VBI->getBitVar()))
  70       if (VI->getName() == VarName)
  71         return VBI->getBitNum();
  72   } else if (VarInit *VI = dyn_cast<VarInit>(BI->getBit(bit))) {
  73     if (VI->getName() == VarName)
  74       return 0;
  75   }
  76
  77   return -1;
  78 }
  79
  80 void CodeEmitterGen::
  81 AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
  82                         unsigned &NumberedOp,
  83                         std::set<unsigned> &NamedOpIndices,
  84                         std::string &Case, CodeGenTarget &Target) {
  85   CodeGenInstruction &CGI = Target.getInstruction(R);
  86
  87   // Determine if VarName actually contributes to the Inst encoding.
  88   int bit = BI->getNumBits()-1;
  89
  90   // Scan for a bit that this contributed to.
  91   for (; bit >= 0; ) {
  92     if (getVariableBit(VarName, BI, bit) != -1)
  93       break;
  94
  95     --bit;
  96   }
  97
  98   // If we found no bits, ignore this value, otherwise emit the call to get the
  99   // operand encoding.
 100   if (bit < 0) return;
 101
 102   // If the operand matches by name, reference according to that
 103   // operand number. Non-matching operands are assumed to be in
 104   // order.
 105   unsigned OpIdx;
 106   if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
 107     // Get the machine operand number for the indicated operand.
 108     OpIdx = CGI.Operands[OpIdx].MIOperandNo;
 109     assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
 110            "Explicitly used operand also marked as not emitted!");
 111   } else {
 112     unsigned NumberOps = CGI.Operands.size();
 113     /// If this operand is not supposed to be emitted by the
 114     /// generated emitter, skip it.
 115     while (NumberedOp < NumberOps &&
 116            (CGI.Operands.isFlatOperandNotEmitted(NumberedOp) ||
 117               (!NamedOpIndices.empty() && NamedOpIndices.count(
 118                 CGI.Operands.getSubOperandNumber(NumberedOp).first)))) {
 119       ++NumberedOp;
 120
 121       if (NumberedOp >= CGI.Operands.back().MIOperandNo +
 122                         CGI.Operands.back().MINumOperands) {
 123         errs() << "Too few operands in record " << R->getName() <<
 124                   " (no match for variable " << VarName << "):\n";
 125         errs() << *R;
 126         errs() << '\n';
 127
 128         return;
 129       }
 130     }
 131
 132     OpIdx = NumberedOp++;
 133   }
 134
 135   std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
 136   std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
 137
 138   if (UseAPInt)
 139     Case += "      op.clearAllBits();\n";
 140
 141   // If the source operand has a custom encoder, use it. This will
 142   // get the encoding for all of the suboperands.
 143   if (!EncoderMethodName.empty()) {
 144     // A custom encoder has all of the information for the
 145     // sub-operands, if there are more than one, so only
 146     // query the encoder once per source operand.
 147     if (SO.second == 0) {
 148       Case += "      // op: " + VarName + "\n";
 149       if (UseAPInt) {
 150         Case += "      " + EncoderMethodName + "(MI, " + utostr(OpIdx);
 151         Case += ", op";
 152       } else {
 153         Case += "      op = " + EncoderMethodName + "(MI, " + utostr(OpIdx);
 154       }
 155       Case += ", Fixups, STI);\n";
 156     }
 157   } else {
 158     Case += "      // op: " + VarName + "\n";
 159     if (UseAPInt) {
 160       Case += "      getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
 161       Case += ", op, Fixups, STI";
 162     } else {
 163       Case += "      op = getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
 164       Case += ", Fixups, STI";
 165     }
 166     Case += ");\n";
 167   }
 168
 169   // Precalculate the number of lits this variable contributes to in the
 170   // operand. If there is a single lit (consecutive range of bits) we can use a
 171   // destructive sequence on APInt that reduces memory allocations.
 172   int numOperandLits = 0;
 173   for (int tmpBit = bit; tmpBit >= 0;) {
 174     int varBit = getVariableBit(VarName, BI, tmpBit);
 175
 176     // If this bit isn't from a variable, skip it.
 177     if (varBit == -1) {
 178       --tmpBit;
 179       continue;
 180     }
 181
 182     // Figure out the consecutive range of bits covered by this operand, in
 183     // order to generate better encoding code.
 184     int beginVarBit = varBit;
 185     int N = 1;
 186     for (--tmpBit; tmpBit >= 0;) {
 187       varBit = getVariableBit(VarName, BI, tmpBit);
 188       if (varBit == -1 || varBit != (beginVarBit - N))
 189         break;
 190       ++N;
 191       --tmpBit;
 192     }
 193     ++numOperandLits;
 194   }
 195
 196   for (; bit >= 0; ) {
 197     int varBit = getVariableBit(VarName, BI, bit);
 198
 199     // If this bit isn't from a variable, skip it.
 200     if (varBit == -1) {
 201       --bit;
 202       continue;
 203     }
 204
 205     // Figure out the consecutive range of bits covered by this operand, in
 206     // order to generate better encoding code.
 207     int beginInstBit = bit;
 208     int beginVarBit = varBit;
 209     int N = 1;
 210     for (--bit; bit >= 0;) {
 211       varBit = getVariableBit(VarName, BI, bit);
 212       if (varBit == -1 || varBit != (beginVarBit - N)) break;
 213       ++N;
 214       --bit;
 215     }
 216
 217     std::string maskStr;
 218     int opShift;
 219
 220     unsigned loBit = beginVarBit - N + 1;
 221     unsigned hiBit = loBit + N;
 222     unsigned loInstBit = beginInstBit - N + 1;
 223     if (UseAPInt) {
 224       std::string extractStr;
 225       if (N >= 64) {
 226         extractStr = "op.extractBits(" + itostr(hiBit - loBit) + ", " +
 227                      itostr(loBit) + ")";
 228         Case += "      Value.insertBits(" + extractStr + ", " +
 229                 itostr(loInstBit) + ");\n";
 230       } else {
 231         extractStr = "op.extractBitsAsZExtValue(" + itostr(hiBit - loBit) +
 232                      ", " + itostr(loBit) + ")";
 233         Case += "      Value.insertBits(" + extractStr + ", " +
 234                 itostr(loInstBit) + ", " + itostr(hiBit - loBit) + ");\n";
 235       }
 236     } else {
 237       uint64_t opMask = ~(uint64_t)0 >> (64 - N);
 238       opShift = beginVarBit - N + 1;
 239       opMask <<= opShift;
 240       maskStr = "UINT64_C(" + utostr(opMask) + ")";
 241       opShift = beginInstBit - beginVarBit;
 242
 243       if (numOperandLits == 1) {
 244         Case += "      op &= " + maskStr + ";\n";
 245         if (opShift > 0) {
 246           Case += "      op <<= " + itostr(opShift) + ";\n";
 247         } else if (opShift < 0) {
 248           Case += "      op >>= " + itostr(-opShift) + ";\n";
 249         }
 250         Case += "      Value |= op;\n";
 251       } else {
 252         if (opShift > 0) {
 253           Case += "      Value |= (op & " + maskStr + ") << " +
 254                   itostr(opShift) + ";\n";
 255         } else if (opShift < 0) {
 256           Case += "      Value |= (op & " + maskStr + ") >> " +
 257                   itostr(-opShift) + ";\n";
 258         } else {
 259           Case += "      Value |= (op & " + maskStr + ");\n";
 260         }
 261       }
 262     }
 263   }
 264 }
 265
 266 std::string CodeEmitterGen::getInstructionCase(Record *R,
 267                                                CodeGenTarget &Target) {
 268   std::string Case;
 269   if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 270     if (auto *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 271       const CodeGenHwModes &HWM = Target.getHwModes();
 272       EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 273       Case += "      switch (HwMode) {\n";
 274       Case += "      default: llvm_unreachable(\"Unhandled HwMode\");\n";
 275       for (auto &KV : EBM.Map) {
 276         Case += "      case " + itostr(KV.first) + ": {\n";
 277         Case += getInstructionCaseForEncoding(R, KV.second, Target);
 278         Case += "      break;\n";
 279         Case += "      }\n";
 280       }
 281       Case += "      }\n";
 282       return Case;
 283     }
 284   }
 285   return getInstructionCaseForEncoding(R, R, Target);
 286 }
 287
 288 std::string CodeEmitterGen::getInstructionCaseForEncoding(Record *R, Record *EncodingDef,
 289                                                           CodeGenTarget &Target) {
 290   std::string Case;
 291   BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");
 292   unsigned NumberedOp = 0;
 293   std::set<unsigned> NamedOpIndices;
 294
 295   // Collect the set of operand indices that might correspond to named
 296   // operand, and skip these when assigning operands based on position.
 297   if (Target.getInstructionSet()->
 298        getValueAsBit("noNamedPositionallyEncodedOperands")) {
 299     CodeGenInstruction &CGI = Target.getInstruction(R);
 300     for (const RecordVal &RV : R->getValues()) {
 301       unsigned OpIdx;
 302       if (!CGI.Operands.hasOperandNamed(RV.getName(), OpIdx))
 303         continue;
 304
 305       NamedOpIndices.insert(OpIdx);
 306     }
 307   }
 308
 309   // Loop over all of the fields in the instruction, determining which are the
 310   // operands to the instruction.
 311   for (const RecordVal &RV : EncodingDef->getValues()) {
 312     // Ignore fixed fields in the record, we're looking for values like:
 313     //    bits<5> RST = { ?, ?, ?, ?, ? };
 314     if (RV.getPrefix() || RV.getValue()->isComplete())
 315       continue;
 316
 317     AddCodeToMergeInOperand(R, BI, RV.getName(), NumberedOp,
 318                             NamedOpIndices, Case, Target);
 319   }
 320
 321   StringRef PostEmitter = R->getValueAsString("PostEncoderMethod");
 322   if (!PostEmitter.empty()) {
 323     Case += "      Value = ";
 324     Case += PostEmitter;
 325     Case += "(MI, Value";
 326     Case += ", STI";
 327     Case += ");\n";
 328   }
 329
 330   return Case;
 331 }
 332
 333 static std::string
 334 getNameForFeatureBitset(const std::vector<Record *> &FeatureBitset) {
 335   std::string Name = "CEFBS";
 336   for (const auto &Feature : FeatureBitset)
 337     Name += ("_" + Feature->getName()).str();
 338   return Name;
 339 }
 340
 341 static void emitInstBits(raw_ostream &OS, const APInt &Bits) {
 342   for (unsigned I = 0; I < Bits.getNumWords(); ++I)
 343     OS << ((I > 0) ? ", " : "") << "UINT64_C(" << utostr(Bits.getRawData()[I])
 344        << ")";
 345 }
 346
 347 void CodeEmitterGen::emitInstructionBaseValues(
 348     raw_ostream &o, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
 349     CodeGenTarget &Target, int HwMode) {
 350   const CodeGenHwModes &HWM = Target.getHwModes();
 351   if (HwMode == -1)
 352     o << "  static const uint64_t InstBits[] = {\n";
 353   else
 354     o << "  static const uint64_t InstBits_" << HWM.getMode(HwMode).Name
 355       << "[] = {\n";
 356
 357   for (const CodeGenInstruction *CGI : NumberedInstructions) {
 358     Record *R = CGI->TheDef;
 359
 360     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 361         R->getValueAsBit("isPseudo")) {
 362       o << "    "; emitInstBits(o, APInt(BitWidth, 0)); o << ",\n";
 363       continue;
 364     }
 365
 366     Record *EncodingDef = R;
 367     if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 368       if (auto *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 369         EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 370         EncodingDef = EBM.get(HwMode);
 371       }
 372     }
 373     BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");
 374
 375     // Start by filling in fixed values.
 376     APInt Value(BitWidth, 0);
 377     for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
 378       if (BitInit *B = dyn_cast<BitInit>(BI->getBit(e - i - 1)))
 379         Value |= APInt(BitWidth, (uint64_t)B->getValue()) << (e - i - 1);
 380     }
 381     o << "    ";
 382     emitInstBits(o, Value);
 383     o << "," << '\t' << "// " << R->getName() << "\n";
 384   }
 385   o << "    UINT64_C(0)\n  };\n";
 386 }
 387
 388 void CodeEmitterGen::run(raw_ostream &o) {
 389   CodeGenTarget Target(Records);
 390   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
 391
 392   // For little-endian instruction bit encodings, reverse the bit order
 393   Target.reverseBitsForLittleEndianEncoding();
 394
 395   ArrayRef<const CodeGenInstruction*> NumberedInstructions =
 396     Target.getInstructionsByEnumValue();
 397
 398   const CodeGenHwModes &HWM = Target.getHwModes();
 399   // The set of HwModes used by instruction encodings.
 400   std::set<unsigned> HwModes;
 401   BitWidth = 0;
 402   for (const CodeGenInstruction *CGI : NumberedInstructions) {
 403     Record *R = CGI->TheDef;
 404     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 405         R->getValueAsBit("isPseudo"))
 406       continue;
 407
 408     if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 409       if (DefInit *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 410         EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 411         for (auto &KV : EBM.Map) {
 412           BitsInit *BI = KV.second->getValueAsBitsInit("Inst");
 413           BitWidth = std::max(BitWidth, BI->getNumBits());
 414           HwModes.insert(KV.first);
 415         }
 416         continue;
 417       }
 418     }
 419     BitsInit *BI = R->getValueAsBitsInit("Inst");
 420     BitWidth = std::max(BitWidth, BI->getNumBits());
 421   }
 422   UseAPInt = BitWidth > 64;
 423
 424   // Emit function declaration
 425   if (UseAPInt) {
 426     o << "void " << Target.getName()
 427       << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
 428       << "    SmallVectorImpl<MCFixup> &Fixups,\n"
 429       << "    APInt &Inst,\n"
 430       << "    APInt &Scratch,\n"
 431       << "    const MCSubtargetInfo &STI) const {\n";
 432   } else {
 433     o << "uint64_t " << Target.getName();
 434     o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
 435       << "    SmallVectorImpl<MCFixup> &Fixups,\n"
 436       << "    const MCSubtargetInfo &STI) const {\n";
 437   }
 438
 439   // Emit instruction base values
 440   if (HwModes.empty()) {
 441     emitInstructionBaseValues(o, NumberedInstructions, Target, -1);
 442   } else {
 443     for (unsigned HwMode : HwModes)
 444       emitInstructionBaseValues(o, NumberedInstructions, Target, (int)HwMode);
 445   }
 446
 447   if (!HwModes.empty()) {
 448     o << "  const uint64_t *InstBits;\n";
 449     o << "  unsigned HwMode = STI.getHwMode();\n";
 450     o << "  switch (HwMode) {\n";
 451     o << "  default: llvm_unreachable(\"Unknown hardware mode!\"); break;\n";
 452     for (unsigned I : HwModes) {
 453       o << "  case " << I << ": InstBits = InstBits_" << HWM.getMode(I).Name
 454         << "; break;\n";
 455     }
 456     o << "  };\n";
 457   }
 458
 459   // Map to accumulate all the cases.
 460   std::map<std::string, std::vector<std::string>> CaseMap;
 461
 462   // Construct all cases statement for each opcode
 463   for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
 464         IC != EC; ++IC) {
 465     Record *R = *IC;
 466     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 467         R->getValueAsBit("isPseudo"))
 468       continue;
 469     std::string InstName =
 470         (R->getValueAsString("Namespace") + "::" + R->getName()).str();
 471     std::string Case = getInstructionCase(R, Target);
 472
 473     CaseMap[Case].push_back(std::move(InstName));
 474   }
 475
 476   // Emit initial function code
 477   if (UseAPInt) {
 478     int NumWords = APInt::getNumWords(BitWidth);
 479     int NumBytes = (BitWidth + 7) / 8;
 480     o << "  const unsigned opcode = MI.getOpcode();\n"
 481       << "  if (Inst.getBitWidth() != " << BitWidth << ")\n"
 482       << "    Inst = Inst.zext(" << BitWidth << ");\n"
 483       << "  if (Scratch.getBitWidth() != " << BitWidth << ")\n"
 484       << "    Scratch = Scratch.zext(" << BitWidth << ");\n"
 485       << "  LoadIntFromMemory(Inst, (uint8_t*)&InstBits[opcode * " << NumWords
 486       << "], " << NumBytes << ");\n"
 487       << "  APInt &Value = Inst;\n"
 488       << "  APInt &op = Scratch;\n"
 489       << "  switch (opcode) {\n";
 490   } else {
 491     o << "  const unsigned opcode = MI.getOpcode();\n"
 492       << "  uint64_t Value = InstBits[opcode];\n"
 493       << "  uint64_t op = 0;\n"
 494       << "  (void)op;  // suppress warning\n"
 495       << "  switch (opcode) {\n";
 496   }
 497
 498   // Emit each case statement
 499   std::map<std::string, std::vector<std::string>>::iterator IE, EE;
 500   for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
 501     const std::string &Case = IE->first;
 502     std::vector<std::string> &InstList = IE->second;
 503
 504     for (int i = 0, N = InstList.size(); i < N; i++) {
 505       if (i) o << "\n";
 506       o << "    case " << InstList[i]  << ":";
 507     }
 508     o << " {\n";
 509     o << Case;
 510     o << "      break;\n"
 511       << "    }\n";
 512   }
 513
 514   // Default case: unhandled opcode
 515   o << "  default:\n"
 516     << "    std::string msg;\n"
 517     << "    raw_string_ostream Msg(msg);\n"
 518     << "    Msg << \"Not supported instr: \" << MI;\n"
 519     << "    report_fatal_error(Msg.str());\n"
 520     << "  }\n";
 521   if (UseAPInt)
 522     o << "  Inst = Value;\n";
 523   else
 524     o << "  return Value;\n";
 525   o << "}\n\n";
 526
 527   const auto &All = SubtargetFeatureInfo::getAll(Records);
 528   std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
 529   SubtargetFeatures.insert(All.begin(), All.end());
 530
 531   o << "#ifdef ENABLE_INSTR_PREDICATE_VERIFIER\n"
 532     << "#undef ENABLE_INSTR_PREDICATE_VERIFIER\n"
 533     << "#include <sstream>\n\n";
 534
 535   // Emit the subtarget feature enumeration.
 536   SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(SubtargetFeatures,
 537                                                            o);
 538
 539   // Emit the name table for error messages.
 540   o << "#ifndef NDEBUG\n";
 541   SubtargetFeatureInfo::emitNameTable(SubtargetFeatures, o);
 542   o << "#endif // NDEBUG\n";
 543
 544   // Emit the available features compute function.
 545   SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
 546       Target.getName(), "MCCodeEmitter", "computeAvailableFeatures",
 547       SubtargetFeatures, o);
 548
 549   std::vector<std::vector<Record *>> FeatureBitsets;
 550   for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
 551     FeatureBitsets.emplace_back();
 552     for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
 553       const auto &I = SubtargetFeatures.find(Predicate);
 554       if (I != SubtargetFeatures.end())
 555         FeatureBitsets.back().push_back(I->second.TheDef);
 556     }
 557   }
 558
 559   llvm::sort(FeatureBitsets, [&](const std::vector<Record *> &A,
 560                                  const std::vector<Record *> &B) {
 561     if (A.size() < B.size())
 562       return true;
 563     if (A.size() > B.size())
 564       return false;
 565     for (const auto &Pair : zip(A, B)) {
 566       if (std::get<0>(Pair)->getName() < std::get<1>(Pair)->getName())
 567         return true;
 568       if (std::get<0>(Pair)->getName() > std::get<1>(Pair)->getName())
 569         return false;
 570     }
 571     return false;
 572   });
 573   FeatureBitsets.erase(
 574       std::unique(FeatureBitsets.begin(), FeatureBitsets.end()),
 575       FeatureBitsets.end());
 576   o << "#ifndef NDEBUG\n"
 577     << "// Feature bitsets.\n"
 578     << "enum : " << getMinimalTypeForRange(FeatureBitsets.size()) << " {\n"
 579     << "  CEFBS_None,\n";
 580   for (const auto &FeatureBitset : FeatureBitsets) {
 581     if (FeatureBitset.empty())
 582       continue;
 583     o << "  " << getNameForFeatureBitset(FeatureBitset) << ",\n";
 584   }
 585   o << "};\n\n"
 586     << "static constexpr FeatureBitset FeatureBitsets[] = {\n"
 587     << "  {}, // CEFBS_None\n";
 588   for (const auto &FeatureBitset : FeatureBitsets) {
 589     if (FeatureBitset.empty())
 590       continue;
 591     o << "  {";
 592     for (const auto &Feature : FeatureBitset) {
 593       const auto &I = SubtargetFeatures.find(Feature);
 594       assert(I != SubtargetFeatures.end() && "Didn't import predicate?");
 595       o << I->second.getEnumBitName() << ", ";
 596     }
 597     o << "},\n";
 598   }
 599   o << "};\n"
 600     << "#endif // NDEBUG\n\n";
 601
 602
 603   // Emit the predicate verifier.
 604   o << "void " << Target.getName()
 605     << "MCCodeEmitter::verifyInstructionPredicates(\n"
 606     << "    const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {\n"
 607     << "#ifndef NDEBUG\n"
 608     << "  static " << getMinimalTypeForRange(FeatureBitsets.size())
 609     << " RequiredFeaturesRefs[] = {\n";
 610   unsigned InstIdx = 0;
 611   for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
 612     o << "    CEFBS";
 613     unsigned NumPredicates = 0;
 614     for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
 615       const auto &I = SubtargetFeatures.find(Predicate);
 616       if (I != SubtargetFeatures.end()) {
 617         o << '_' << I->second.TheDef->getName();
 618         NumPredicates++;
 619       }
 620     }
 621     if (!NumPredicates)
 622       o << "_None";
 623     o << ", // " << Inst->TheDef->getName() << " = " << InstIdx << "\n";
 624     InstIdx++;
 625   }
 626   o << "  };\n\n";
 627   o << "  assert(Inst.getOpcode() < " << InstIdx << ");\n";
 628   o << "  const FeatureBitset &RequiredFeatures = "
 629        "FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];\n";
 630   o << "  FeatureBitset MissingFeatures =\n"
 631     << "      (AvailableFeatures & RequiredFeatures) ^\n"
 632     << "      RequiredFeatures;\n"
 633     << "  if (MissingFeatures.any()) {\n"
 634     << "    std::ostringstream Msg;\n"
 635     << "    Msg << \"Attempting to emit \" << "
 636        "MCII.getName(Inst.getOpcode()).str()\n"
 637     << "        << \" instruction but the \";\n"
 638     << "    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)\n"
 639     << "      if (MissingFeatures.test(i))\n"
 640     << "        Msg << SubtargetFeatureNames[i] << \" \";\n"
 641     << "    Msg << \"predicate(s) are not met\";\n"
 642     << "    report_fatal_error(Msg.str());\n"
 643     << "  }\n"
 644     << "#else\n"
 645     << "// Silence unused variable warning on targets that don't use MCII for "
 646        "other purposes (e.g. BPF).\n"
 647     << "(void)MCII;\n"
 648     << "#endif // NDEBUG\n";
 649   o << "}\n";
 650   o << "#endif\n";
 651 }
 652
 653 } // end anonymous namespace
 654
 655 namespace llvm {
 656
 657 void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
 658   emitSourceFileHeader("Machine Code Emitter", OS);
 659   CodeEmitterGen(RK).run(OS);
 660 }
 661
 662 } // end namespace llvm